THE CHARACTERIZATION AND RELIABILITY ANALYSIS OF GREEN ELECTRONICS MANUFACTURING

PROCESSES FOR HARD DISK DRIVE HEAD ASSEMBLY

LUK CHI FAI

DOCTOR OF PHILOSOPHY

CITY UNIVERSITY OF HONG KONG

NOVEMBER 2006

City University of Hong Kong 香港城市大學

The Characterization and Reliability Analysis of

Green Electronics Manufacturing Processes for Hard Disk Drive Head Assembly

硬碟機磁頭組裝於綠色環保電子生產過程中的特性及其可靠性分析

Submitted to Department of Electronic Engineering

電子工程學系 In Partial Fulfillment of the Requirements

for the Degree of Doctor Philosophy 哲學博士學位

by

Luk Chi Fai 陸志輝

November 2006 二零零六年十一月

i

Abstract

In order to protect our health and the environment, a new European Union (EU) directive

2002/95/EC came into effect on 1st July 2006. All manufacturers of electronic and

electrical equipment sold in Europe should comply with the EU’s restrictions on

hazardous substances as laid down in the (RoHS) Directive. This directive lays down the

maximum concentration level for six hazardous substances which are lead, mercury,

cadmium, chromium (VI) and flame retardants (PBB and PBDE). The immediate

repercussions of non-compliance may include serious fines, damaged brand reputations

and potentially, even jail time.

Among these six banned substances, there is no doubt that the replacement of lead is the

biggest challenge to industry. Lead has been widely used in solder paste and solder bars

for electrical connections and electronic component plating on electrical terminals for

over half of a century., It is hard to find a perfect, lead-free replacement with a

comparably reliable performance. In this project, difficulties and concerns during the

phase- in of lead-free soldering process in hard disk drive products have been discussed.

Different process parameters such as reflow profile settings (pre-heat time, peak

temperature and dwell time); the condition of the inert atmosphere (concentration of

oxygen level) and a new stencil design have been studied.

Since the lead exemptions permitted by the EU for certain high-reliability products such

as military applications, control circuits, servers and telecommunication, some tin- lead

manufacturing will coexist with lead-free manufacturing at the same time. Serious defects

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due to mixing up the usage of lead-free solder and the traditional lead-tin ball grid array

(BGA) solder bumps were evaluated. Lead impurity is a contamination which is the

major cause of the failure of solder joints. Since the melting point of lead-free alloys is

much higher than the eutectic lead-tin alloy, the re-melting problem of the lead-tin solder

bumps causes immediate failure because of “open-circuits” or “open-joints”.

As per the market demands, the size of products such as MP3s, mobile phones, digital

cameras and even personal computers is getting smaller and smaller. However, the

storage memory needs to be increased rapidly for high-quality photo processing and large

amounts of data processing. Head stack suppliers in the hard disk drive industry are

constantly working on high density interconnection technologies to provide faster, higher

capacity and cheaper head stack components for disk drives. As per the prediction, the

I/O pitch for devices will decrease from 60µm in 2004 to 20µm after 2012. The

traditional solder joint electrical connection will have to follow this trend. There is an

urgent need to develop other lead-free interconnection techniques such as gold-to-gold

interconnection flip chip bonding and the adhesive bonding technique using anisotropic

conductive film which have been used in hard disk drive head assembly.

The new method of gold-to-gold bonding for a chip-on-suspension application has been

described in this project. The option of this design will bring exciting new products to the

market and help to keep the hard disk drive industry in business. The reliability

performance of this new technology has also been studied by means of the values of bias

current through the high temperature storage, and by thermal shock testing up to 1000

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hours.

Apart from the gold-to-gold bonding, a low cost method to manufacture hard disk drive

heads using anisotropic conductive film (ACF) bonding for flex-to-flex interconnection

has been developed. Through the finite element analysis (FEA) method, a new bond pad

was designed for the ACF process. The electrical and mechanical properties of the

interconnection were reported, after the pad had passed through several reliability tests.

The FEA software tool ANSYS was used to predict the internal stress of the ACF bonded

joints and samples were built to verify the computation results.

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Contents

Abstract … … … … … … … … … … … … … … … … … … … … … … … … … … … . i

Acknowledgements… … … … … … … … … … … … … … … … … … … … … … . iv

Contents… … … … … … … … … … … … … … … … … … … … … … … … … … … . v

I Glossary… … … … … … … … … … … … … … … … … … … … … … … … … … … . xii

II List of Figures… … … … … … … … … … … … … … … … … … … … … … … … ... xiv

III List of Tables… … … … … … … … … … … … … … … … … … … … … … … … … . xx

1.0 Introduction

1.1 Background to this project… … … … … … … … … … … … … … … … … ... 1

1.2 Scope of this project… … … … … … … … … … … … … … … … … … … … …

1.2.1 A study of problems in implementing lead-free electronic

assemblies in hard disk drive head manufacturing … … … … … … ....

1.2.1.1 The voiding problem in SAC solder manufacturing …

1.2.1.2 Reliability problems in the lead-free solder

processing of lead tin finished flip chip ball grid arrays … …

1.2.2 Study and development of alternative solder processes for

hard disk head assemblies … … … … … … … … … … … … … … … ...…

1.2.2.1 Gold stud bump flip chip thermosonic

interconnections … … … … … … … … … … … … … … … … … ..

1.2.2.2 Anisotropic conductive film (ACF) bonding in flex-

to-flex interconnection … … … … … … … … … … … … … … …

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2

2

3

4

4

5

1.3 About the Author… … … … … … … … … … … … … … … … … … … … … … . 5

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2.0 Background Literature 6

2.1 Hard Disk Drive Development… … … … … … … … … … … … … … … … … 6

2.2 The Need for Green Electronics Manufacturing… … … … … … … … … … 8

2.3 Global Green Policy… … … … … … … … … … … … … … … … … … … … …

2.3.1 United States of America … … … … … … … … … … … … ...… …

2.3.2 Japan … … … … … … … … … … … … … … … … … … … … … … ..

2.3.3 European Union … … … … … … … … … … … … … … … … … …

9

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12

2.4 Lead-free soldering … … … … … … … … … … … … … … … … … … … … … 14

2.5 The challenges of green manufacturing and RoHS compliances ...… … …

2.5.1 Defects associated with lead-free solder … … … … … … … … …

2.5.2 Cost for green manufacturing … … … … … … … … … … … … …

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3.0 Experimental Philosophy

3.1 Problems in implementing lead-free electronic assemblies in hard disk

drive head manufacturing … … … … … … … … … … … … … … … … … … … … .

3.1.1 Study of the solder avoiding problem associated with the lead-

free soldering process

3.1.1.1Sample preparation … … … … … … … … … … .… … .…

3.1.1.2 Lead-free soldering process … … … … … … … … … ....

3.1.1.3 Failure Inspection … … … … … … … … … … … … …

3.1.2 Study of the impurity of lead problem associated with the

lead-free soldering process

3.1.2.1 Sample preparation … … … … … … … … … … … … … .

3.1.2.2 Reflow process … … … … … … … … … … … … … … ...

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3.1.2.3 Failure analysis … … … … … … … … … … … … … … 22

3.2 Study and development of alternative solder processes for hard disk head

assemblies … … … … … … … … … … … … … … … … … … … … … … … … … … .

3.2.1 Gold stud bump flip chip thermosonic interconnection

3.2.1.1 Optimization of the gold-to-gold interconnection … .

3.2.1.2 Reliability study … … … … … … … … … … … … … … ..

3.2.2 Anisotropic conductive film (ACF) bonding in flex-to-flex

interconnection

3.2.2.1 Optimization of the gold-to-gold interconnection … ..

3.2.2.2 Process Parameters … … … … … … … … … … … … … .

3.2.2.3 Reliability Study … … … … … … … … … … … … … … .

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4.0 Voiding in SMT solder joints using lead free alloy (the production of hard

disk drive heads)

4.1 Abstract… … … … … … … … … … … … … … … … … … … … … … … … … ... 26

4.2 Introduction… … … … … … … … … … … … … … … … … … … … … … … … . 26

4.3 Background to this chapter… … … … … … … … … … … … … … … … … … . 27

4.4 Requirements of lead-free reflow soldering… … … … … … … … … … … … 29

4.5 Voiding Mechanism....… … … … … … … … … … … … … … … … … … … … . 30

4.6 Void Minimization… … … … … … … … … … … … … … … … … … … … … ... 32

4.7 Experimental Approach… … ..… … … … … … … … … … … … … … … … … . 33

4.8 Detailed information on the design of the experiments

4.8.1 Stage I: Study of the effect of an inert atmosphere … … … … . 35

4.8.2 Stage II: Study of the effect of different reflow profiles with a

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low oxygen concentration inert atmosphere … … … … … … ...… … … 36

4.8.3 Stage III: Study of the effect of stencil design… … ...… … … ..... 38

4.8.4 Analytical Techniques … … … … … … … … … … … … … … … .. 40

4.8.4.1 X-ray inspection and Cross-section analysis… … ....... 40

4.8.4.1.1 Cross-section procedure… … … … … … … ... 40

4.9 Results

4.9.1 Stage I: Study of the effect of inert

atmosphere… … … … ..… … … … … … … … … … … … … … … … … … .

41

4.9.2 Stage II: Study of the effect of different reflow profiles with a

low oxygen concentration inert atmosphere… … … … … ...… … … … .

46

4.9.3 Stage III: Study of the effect of stencil design… … … ....… … … 54

4.10 Summary … ..… … … … … … … … … … … … … … … … … … … … … … … 56

5.0 Cracking the problem in flip chip BGA with lead tin solder bumps using lead

free solder paste ( the production of hard disk drive heads)

5.1 Abstract … … … … … … … … … … … … … … … … … … … … … … … … … 57

5.2 Introduction … … … … … … … … … … … … … … … … … … … … … … … … 57

5.3 Background of this chapter … … … … … … … … … … … … … … … … … … 59

5.4 Flip chip assembly for magneto-resistive disk drive technology … … … ... 61

5.5 Potential solder joint failure

5.5.1 Thermal expansion coefficient mis-match … … .… … … … … … 62

5.5.2 Problems associated with eutectic solders used in the first

layer (internal layer) of the flip chip BGA … … … … … … … … … …

63

5.5.3 Lead-contamination in lead-free assembly … … … … … … … … 64

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5.6 Experimental approach

5.6.1 Stage 1: Process parameters – material of solder paste plus

reflow profile … … … … … … … … … … … … … … … … … … … … ......

69

5.6.2 Stage 2: Process step – High temperature baking on samples

for thermal analysis … … … … … … … … … … … … … … … …

70

5.6.3 Stage 3: Failure analysis

5.6.3.1 Dye and pry testing procedure … … … … … … … ...… . 70

5.6.3.2 Cross-section procedure … … … … … … … … … … … .. 71

5.7 Result

5.7.1: Stage 1: Process parameters – material of solder paste plus reflow

profile … … … … … … … … … … … … … … … … … … … … … … … … … … ...

73

5.7.2: Stage 2: Process step – High temperature baking on sample for

thermal analysis … … … … … … … … … … … … … … … … … … … … … ..

82

5.8 Summary . … … … … … … … … … … … … … … … … … … … … … … … … .. 87

6.0 Development of gold to gold interconnection flip chip bonding for chip on

suspension assemblies

6.1 Abstract … … … … … … … … … … … … … … … … … … … … … … … … … .. 88

6.2 Introduction … … … … … … … … … … … … … … … … … … … … … … … … 89

6.3 Literature Survey

6.3.1 The Head gimbal assembly … … … … … … … … … … … … … … 89

6.4 Background to this chapter … … … … … … … … … … … … … … … … … … 91

6.5 The gold to gold interconnection process … … … … … … … … … … … … .. 92

6.6 Experimental approach … … … … … … … … … … … … … … … … … … … ... 94

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6.7 Description of chip on suspension assembly components

6.7.1: Integrated circuit chip … … … … … … … … … … … … … … … . 95

6.7.2: Integrated circuit suspension … … … … … … … … … … … … .. 96

6.8 Results and conclusions

6.8.1: Ball shear test … … … … … … … … … … … … … … … … … … . 97

6.8.2: Ball shear test failure modes for gold to gold interconnections 98

6.8.3: Optimization of the thermosonic gold-gold bonding process 100

6.8.4: Co-planarity and alignment … … … … … … … … … … … … … 107

6.8.5: Reliability of the optimal setting of the thermosonic gold-gold

bonding … … … … … … … … … … … … … … … … … … … … … … … ...

109

6.9 Summary ... … … … … … … … … … … … … … … … … … … … … … … … … 112

7.0 Application of adhesive bonding techniques in a hard disk drive head

assembly

7.1 Abstract … … … … … … … … … … … … … … … … … … … … … … … … … . 113

7.2 Introduction … … … … … … … … … … … … … … … … … … … … … … … … 114

7.3 General description and comparison of bonding methods

7.3.1: Interconnection … … … .… … … … … … … … … … … … … … … 115

7.3.2: Ultrasonic TAB bonding interconnection … … … … … … … ... 117

7.3.3: Hot bar soldering interconnection … … … … … … … … … … .. 118

7.3.4: Anisotropic conductive film bonding … … … … … … … … … . 118

7.4 Modeling and experimental verification

7.4.1: Design of experiment … … … … … … … … … … … … … … … …

7.4.2: Bonding surface structures … … … … … … … … … … … … … .

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124

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7.4.3: Prediction of internal stresses using finite element analysis ... 125

7.4.4: Experimental verification of FEA computation … … … … … . 120

7.4.5: The ACF bonding process … … … … … … … … … … … ..… … 131

7.5 Results and discussion

7.5.1: Characterization of critical bonding parameters … … … … … 134

7.5.1.1: Temperature and time settings … … … … … … … … 134

7.5.1.2: Pressure setting … … … … … … … … … … … … … ... 135

7.5.2: Reliability testing … … … … … … … … … … … … … … … … … 137

7.5.2.1: Peel strength test … … … … … … … … … … … … … … 127

7.5.2.2: Contact resistance changes … … … … … … … … … … 138

7.6 Summary … … … … … … … … … … … … … … … … … … … … … … … … … 139

8.0

Conclusions and suggestions for further study

8.1 Conclusions … … … … … … … … … … … … … … … … … … … … … … … …

8.2 Suggestions for further study

141

8.2.1 No-flow underfill for flip chip assembly … … … … … … … …

8.2.2 Long-term reliability analysis of advanced adhesive

bonding … … … … … … … … … … … … … … … … … … … … … … …

8.2.3 Nano-wire anisotropic conductive film for ultra-fine pitch flip

chip interconnection … … … … ..… … … … … … … … … … … … … … .

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References … … … … … … … … … … … … … … … … … … … … … … … … … .... 152

Appendix I: Finite Element Analysis … … .… … … … … … … … … … … … … ..

Appendix II: Percentage of void estimation … … … … … … … … … … … … …

Publications arising from this project … … … … … … … … … … … … … … … ...

158

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I Glossary

AAO Anodic aluminum oxide ACF Anisotropic conductive film is a lead-free and environmentally-friendly epoxy system. ACF works by trapping conductive particles between the corresponding conductive pads on the IC and the substrate. AFC Antiferromagnetically coupled AMR Anisotropic magnetoresistance C4 Controlled Collapse Chip Connection Technology COS Chip on suspension EM Electromigration EU: European Union FPC Flexible printed circuit FEA Finite element analysis GGI Gold to gold interconnection HDD Hard Disk Drive HGA Head gimbal assembly IMC Intermetallic compounds

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MR Magneto-resistive OEM Original Equipment manufacturer SAC Tin-silver-copper alloy which is the most common lead-free solder used by industries SEM Scanning electron microscope SMT Surface mounted technology basically consists of three steps which are: screen printing for paste application, pick and place (component placement) and reflow oven heating (preheating, reflow and cooling). TAB Tape automatic bonding UBM Under bump material of the solder joint

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II List of Figures

Figure 1.1: Internal structure of a Hard Disk Drive

Figure 4.1a: Photograph of the hard disk drive model

Figure 4.1b: X-ray radiograph of a defective sample

Figure 4.2: Comparison of thermal conditions for lead-tin and tin-silver-copper solder.

Figure 4.3: Causes and effect diagram in void

Figure 4.4: Design of experiment flow chart

Figure 4.5: Diagram of the solder paste configuration and the voiding location

Figure 4.6: New stencil opening design

Figure 4.7a: X-ray radiograph for the defective sample

Figure 4.7b: X-ray radiograph for the good sample after test

Figure 4.8a: Cross-sectioning micrograph of a defective sample

Figure 4.8b: Enlarged photo of a defective joint

Figure 4.9a: Cross-sectioning micrograph of a good sample

Figure 4.9b: Enlarged photo of a good joint

Figure 4.10a-d:Stage I reflow profile for DOE-1 to DOE-4

Figure 4.11: X-ray radiography for sample with “High” level preheat soaking time and

dwell time reflow setting

Figure 4.12: X-ray radiograph of a sample with a “high” level preheat soaking time and

a “Medium” level dwell time

Figure 4.13: X-ray radiograph of a sample with a “Medium” level preheat soaking

time and a “High” level dwell time

Figure 4.14: X-ray radiograph of a sample with a “Medium” level preheat soaking

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time and dwell time

Figure 4.15: X-ray radiograph of a sample with a “Low” level preheat soaking time and

a “Medium” level dwell time

Figure 4.16: X-radiograph of samples with a “Low” level preheat soaking time and a

“High” level dwell time

Figure 4.17a-c: Cross-sectioned micrographs of samples using solder paste A under

optimized condition

Figure 4.18a-c: Cross-sectioned micrographs of samples using solder paste B under

optimized condition

Figure 4.19: Diagram of the solder paste configuration with the new stencil design

Figure 4.20a: Photography of cross-sectioned sample using old design stencil

Figure 4.20b: Photography of cross-sectioning sample using newly designed opening of

stencil

Figure 5.1: Flip Chip BGA configuration

Figure 5.2: Photograph of the device

Figure 5.3: X-ray radiograph of a failed sample

Figure 5.4: X-ray radiograph of another failed sample

Figure 5.5: Diagram of solder solidification

Figure 5.6: Thermocouples attached for profile checking

Figure 5.7: Eutectic lead-tin reflow profile

Figure 5.8: Lead free reflow profile

Figure 5.9: Design of experiment flow chart

Figure 5.10: Thermal shock profile

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Figure 5.11a-b:SEM micrograph of a cross-sectioned sample which passed through the

lead-free reflow profile (Lot B) and its enlarged micrograph

Figure 5.12: Cross-sectioned micrograph of a defective Lot B sample with underfill

delamination and the void

Figure 5.13: Cross-sectioned micrograph of a defective Lot B sample with underfill

delamination, solder migrated area and voids

Figure 5.14: Cross-section micrograph for a Lot A sample (using eutectic lead-tin

solder paste) which passed through 100 cycles of thermal shock testing

Figure 5.15: Cross-section micrograph for a Lot A sample (using eutectic lead-tin

solder paste) which passed through 500 cycles of thermal shock testing

Figure 5.16: Cross-section micrograph for a Lot B sample (using lead-free solder paste)

which passed through 100 cycles of thermal shock testing

Figure 5.17: Cross-section micrograph for a Lot B sample (using lead-free solder paste)

which passed through 500 cycles of thermal shock testing

Figure 5.18: Micrograph of a sample after chemical decapsulation from Lot B.

Figure 5.19: SEM photography of the sample after chemical decapsulation from Lot B

Figure 5.20: Micrograph of BGA solder joints after component removal – sample with

lead-free solder – Lot B

Figure 5.21: Micrograph of BGA solder joints after component removal – sample with

lead-free solder – Lot B

Figure 5.21: Micrograph of BGA solder joints after component removal – sample with

eutectic lead-tin solder – Lot A

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Figure 6.1: HGA configuration trends

Figure 6.2: HGA with COS

Figure 6.3: US bonding procedure

Figure 6.4: Design of experiment flow chart

Figure 6.5: Photography of the IC chip

Figure 6.6: Dimension of gold stud bump

Figure 6.7: Cross-section of suspension pads

Figure 6.8: Test set up condition

Figure 6.9: GGI failure modes of the ball shear test

Figure 6.10: Plot of shear load vs ultrasonic time

Figure 6.11: Optical micrograph of a cross-section of a COS sample using 0.1s of

ultrasonic time

Figure 6.12: Optimal micrograph of a cross-section of a COS sample using 0.5s of

ultrasonic time

Figure 6.13: Plot of shear load vs bonding load

Figure 6.14: Optical micrographs of cross-sections of COS samples using different

bonding loads

Figure 6.15: Plot of shear load vs ultrasonic power

Figure 6.16: SEM pictures of the sheared surfaces of a COS sample using ultrasonic

power 26mW

Figure 6.17: Plot of shear load vs substrate temperature

Figure 6.18: Bias current change under high temperature and high humidity storage

Figure 6.19: Bias current change under thermal shock conditions

xviii

Figure 6.20: Bias current change under low temperature storage

Figure 6.21: Bias current change under high temperature storage

Figure 7.1: HDD head assembly

Figure 7.2: HGA Bond

Figure 7.3: FPC pad

Figure 7.4: Cross-section of joint by ultrasonic bonding

Figure 7.5: Cross-section of joints by Hot bar soldering

Figure 7.6: Cross-section joint by ACF bonding

Figure 7.7: Key elements on reliability of adhesive joints

Figure 7.8: Design of experiment flow chart

Figure 7.9: Structure of flex to flex joint

Figure 7.10: Design of experiment flow chart

Figure 7.11: FPC bond pad design for TAB bonding

Figure 7.12: Simplified model of HGA and FPC

Figure 7.13: Stress applied on FPC

Figure 7.14: Improved FPC design

Figure 7.15: FEA model of FPC designed for ultrasonic tab bonding

Figure 7.16: FEA model of FPC designed for ACF bonding

Figure 7.17: Failure mechanism of ACF bonding after reliability test

Figure 7.18: ACF tape flow

Figure 7.19: ACF pre-tacking

Figure 7.20: Temperature profile of ACF bonding cycle

Figure 7.21: Percentage cure of adhesive as a function of temperature / time

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Figure 7.22: Relationship of pressure and resistance

Figure 7.23: Aging life test result

Figure 7.24: Thermal shock test result

Figure 8.1 Schematic diagram of the no-flow underfill assembly process

Figure 8.2 Schematic of nanowire ACF preparation

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III List of Tables

Table 4.1: Solder Paste properties from two different manufacturers A and B

Table 4.2 Test result of stage 1 (control of inert atmosphere of reflow oven)

Table 4.3: Classification of reflow parameters

Table 4.4: Testing result for 27 set of different experiment settings

Table 4.5: Testing result for stage 3 after using the new design stencil

Table 5.1: Description of samples for testing Table 6.1: Bonding parameters vs stand-off height Table 7.1: Comparison of different interconnection methods for HDD head assembly