the simulation platform and verification of emerging ssd2013 pku-eecs urtp workshop the simulation...
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2013 PKU-EECS URTP Workshop
The Simulation Platform and Verification of
Emerging SSD
Yijin Guan, EECS, Peking University Diqi Chen, EECS, Peking University
Advisor：Guangyu Sun, CECA, Peking University
2013 PKU-EECS URTP Workshop
Outline
Page 2
新型高能效固态硬盘（SSD）仿真平台与验证原型设计
Background
Research
Experiments and Verification
On-going Work
2013 PKU-EECS URTP Workshop Page 3
Background
• Survey on SSD
• Motivation
Background
2013 PKU-EECS URTP Workshop
Survey on SSD
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新型高能效固态硬盘（SSD）仿真平台与验证原型设计
Wildly used, Low latency, Low power consumption,
Anti-vibration, etc.
Lifetime limitation
2013 PKU-EECS URTP Workshop
Motivation
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SSD Research
Design Platform
Trace based Emulator
(PCM, multi-channel)
FPGA based Hardware-platform
(flash/PCM, PCIe support)
Expensive ARM-only platform ECC & Multi-channel No support for PCM
Our work
Software-only Simulator
Academia
Commercial
2013 PKU-EECS URTP Workshop Page 6
新型高能效固态硬盘（SSD）仿真平台与验证原型设计
Research
Research
• Trace based Emulator
• FPGA based Hardware-platform
2013 PKU-EECS URTP Workshop
I/O procedure of Simulation platform
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新型高能效固态硬盘（SSD）仿真平台与验证原型设计
delay Memroy
Delay time = sim_time -
mem_time
Ioctl system call
SSD
2013 PKU-EECS URTP Workshop
Structure of Simulation platform
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新型高能效固态硬盘（SSD）仿真平台与验证原型设计
Driver
Timing
Module Library
VFS
Memory
Read/Write Function
2013 PKU-EECS URTP Workshop
Framework
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新型高能效固态硬盘（SSD）仿真平台与验证原型设计
2013 PKU-EECS URTP Workshop
Concepts of NAND Flash
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新型高能效固态硬盘（SSD）仿真平台与验证原型设计
2013 PKU-EECS URTP Workshop
Framework of NAND Flash
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新型高能效固态硬盘（SSD）仿真平台与验证原型设计
Interface
Structure
2013 PKU-EECS URTP Workshop
Basic Operations
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新型高能效固态硬盘（SSD）仿真平台与验证原型设计
2013 PKU-EECS URTP Workshop
Design of Controller
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FSM
Controls on Time Sequence
FIFO Operations
etc.
2013 PKU-EECS URTP Workshop Page 14
Experiments and Verification
Experiments and Verification
• Platform Design
• Results of Simulation
• Results of Verification
2013 PKU-EECS URTP Workshop
Hardware
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新型高能效固态硬盘（SSD）仿真平台与验证原型设计
Samsung NAND Flash board (A)
Model of chip：K9F1G08U0D
Xilinx XUPV5-LX110T Evaluation Platform
2013 PKU-EECS URTP Workshop
Hardware Platform
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Single Channel
Multi-Channel
2013 PKU-EECS URTP Workshop
Software
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新型高能效固态硬盘（SSD）仿真平台与验证原型设计
Design Tool：Xilinx ISE Design Suite 13.2
Programming language：Verilog HDL
Environment for Verification：openSUSE 12.3
Programming language for Verification：C
2013 PKU-EECS URTP Workshop
Results of Simulation
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新型高能效固态硬盘（SSD）仿真平台与验证原型设计
Read Operation
Write Operation(erase before write)
2013 PKU-EECS URTP Workshop
Results of Experiment I
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新型高能效固态硬盘（SSD）仿真平台与验证原型设计
2013 PKU-EECS URTP Workshop
Results of Experiment II
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新型高能效固态硬盘（SSD）仿真平台与验证原型设计
2013 PKU-EECS URTP Workshop
On-going Work
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新型高能效固态硬盘（SSD）仿真平台与验证原型设计
On-going Work
• PCM Controller Platform
• System Level Design with Real Workload
Cooperating with Baidu
PCM Chips
2013 PKU-EECS URTP Workshop Page 22
新型高能效固态硬盘（SSD）仿真平台与验证原型设计
Thanks ！