transistor trường fet

Upload: hidman86

Post on 30-May-2018

222 views

Category:

Documents


0 download

TRANSCRIPT

  • 8/14/2019 transistor trng FET

    1/13

    Chng 6 1

    CHNG 6: TRANSISTOR HIEU NG TRNG FET

    6.1 Gii thieu6.2 Ly thuyet hoat ong cua JFET6.3 Ly thuyet hoat ong cua MOSFET6.4 Giai tch o th va phan cc6.5 Giai tch tn hieu ln S sai dang6.6 Giai tch tn hieu nho6.7 M rong

  • 8/14/2019 transistor trng FET

    2/13

    Chng 6 2

    6.1 Gii thieu

    Transistor hieu ng trng (Field Effect Transistor FET): JFET: Junction FET MOSFET: Metal-Oxid Semiconductor FET (Insulated-Gate IGFET)

    Tnh chat (Phan biet vi BJT) Nhay vi ien ap (voltage-sensitive) Tr khang vao rat cao

    6.2 Ly thuyet hoat ong cua JFET6.2.1 Cau tao (n-channel JFET):

  • 8/14/2019 transistor trng FET

    3/13

    Chng 6 3

    6.2.2 Hoat ong:

    Gia s S va G noi at; vDS > 0: Dong iD : D S: Phu thuoc vao vDS va ien tr kenh n (Rn-Channel)Dong iChannel Gate 0: Do Diode tao bi tiep xuc pn Channel-Gate phan cc nghch

    (a) Khi vDS tang: Vung khuyet (depletion region vung gach cheo) tang Rn-Channel tang

    (b) vDS = Vpo (ien ap nghen: pinch-off voltage): Hai vung khuyet cham nhau: iD = Ipo

  • 8/14/2019 transistor trng FET

    4/13

    Chng 6 4

    (c) vDS > Vpo: Va = Vpo = const iD = Ipo = const

    (d) vDS = BVDSS: ien ap anh thung.o th:

    Gia s vDS = const; vGS thay oi:vGS < 0: Tang vung khuyet i) RChannel tang iD giam

    ii) Vpo giamvGS > 0: Giam vung khuyet i) RChannel giam iD tang

    ii) Vpo tang

  • 8/14/2019 transistor trng FET

    5/13

    Chng 6 5

    Voltage-Sensitive Device

    o th:

    Lu y : n-JFET: Phan cc sao chokhongco dong IChannel-Gate (vGS 0 hoac vGS nho > 0)

    6.2.3 ac tuyen:ien ap vDS tai iem nghen: vDS-Pinch Off = Vp = Vpo + vGS ien ap anh thung: BVDSX BVDSS + vGS ac tuyen VA trong vungbao hoa (Gia ien ap nghen va anh thung: Vp < vDS < BVDSX)

    iD =

    ++

    2 / 3

    23

    1 po

    GS

    po

    GS po V

    v

    V

    v I vi vGS < 0

    Nhan xet: vGS = 0: iD = Ipo

  • 8/14/2019 transistor trng FET

    6/13

    Chng 6 6

    VGS = - Vpo: iD = 0

    Trong vung bao hoa: iD khong phu thuoc vDS Anh hng nhiet o:

    iD =

    ++

    2 / 32 / 30 2

    31'

    po

    GS

    po

    GS po V

    v

    V

    v

    T

    T I

    trong o: Ipo = iD khi vGS = 0 tai nhiet o T0.

    6.3 Ly thuyet hoat ong cua MOSFET6.3.1 Cau tao (n-channel MOSFET):

    Nhan xet: Ban au cha co kenh dan gia D va S (enhancement mode )Cc cong Gate: Metal Oxide Semiconductor (MOS)

  • 8/14/2019 transistor trng FET

    7/13

    Chng 6 7

    6.3.2 Hoat ong:

    Hoat ong loai tang (enhancement mode): vGS > 0: Hnh thanh kenh dan cam ng: vGS > VTN : ien ap ngng Tao kenh dan n cam ng gia S va D

    vGS tang Be rong va ien dan (conductivity) kenh dan tang Thay oi vDS: Tng t JFET:

    (a) Khi vDS tang Tang vung khuyet Rn-Channel tang: Vung tuyen tnh

  • 8/14/2019 transistor trng FET

    8/13

    Chng 6 8

    (b) vDS = Vp = vGS - VTN: ien ap nghen: Rn-Channel (100 K)

  • 8/14/2019 transistor trng FET

    9/13

    Chng 6 9

    (c) vDS > Vp: iD const: Vung bao hoa

    o th:

    Lu y : enhancement mode n-MOSFET: Phan cc vGS VTN

  • 8/14/2019 transistor trng FET

    10/13

    Chng 6 10

    6.3.3 ac tuyen:ien ap v

    DStai iem nghen: v

    DS Pinch Off= V

    p= v

    GS V

    TN= v

    GS+ V

    po(Vi V

    po= - V

    TN< 0)

    ac tuyen VA trong vung tuyen tnh (vDS < vGS - VTN = Vp):])(2[ 2 DSTN GSn DS vV vk i =

    ac tuyen VA trong vung bao hoa (vDS vGS - VTN = Vp):2

    2 1][

    +==

    po

    GS poTN GSn DS

    V

    v I V vk i vi Ipo = knVTN2 va Vpo = - VTN

    Nhan xet: n-JFET: vGS 0, Vpo > 0; Enhancement mode n-MOSFET: v GS > 0, Vpo < 0ac tuyen VA: JFET: Bac 3/2 MOSFET: Bac 2

    Xem gan ung cho ca hai loai FET:2

    2 1][

    +==

    po

    GS poTN GSn DS V

    v I V vk i

    Anh hng nhiet o:2 / 3

    '

    =

    T

    T I I o po po

  • 8/14/2019 transistor trng FET

    11/13

    Chng 6 11

    6.4 Giai tch o th va phan cc

    6.4.1 Phan cc JFET:

    DCLL: VDD = vDS + iD (Rd + Rs) Phng trnh phan cc: vGS = - iD Rs (Xem iG 0)Nhan xet: Mach t phan cc (self-bias): Do vGS < 0 tao ra bi Rs V du: Thiet ke mach vi tnh iem Q: VDSQ = 15V; IDQ = 3,5 mA

    Thay vao DCLL: Rd +Rs = (VDD VDSQ) / IDQ = (30 15) / 3,5 = 4,3 K T ac tuyen VA: VGSQ = -1 V Rs = - VDSQ / IDQ = 1V / 3,5 mA = 286 Rd 4 K Chon Rs = 270 va Rd = 3,9 K

  • 8/14/2019 transistor trng FET

    12/13

  • 8/14/2019 transistor trng FET

    13/13

    Chng 6 13

    T phng trnh:22 / 3

    0' 1

    +

    = po

    GS po D

    V

    v

    T

    T I i

    o nhay:

    po

    S

    po

    DSGGo po

    D DiT

    V

    R

    V

    i RV T T I

    T dT

    idiS D

    ++

    ==

    1) / (21

    2 / 3

    /

    /

    2 / 3'

    Nhan xet: Rs 0 lam giam o nhay iD theo t0 Cai thien o on nhe cc tieu DiT S : VGG = 2VGSQ + Vpo

    Rs = DQ

    poGSQ

    I

    V V +

    6.5 Giai tch tn hieu ln S sai dang