xay dung cac he thong nhung v4-8.2011-bcvt

8/2/2019 Xay Dung Cac He Thong Nhung V4-8.2011-BCVT

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HC VIN CNG NGH BU CHNH VIN THNGKhoa Cng ngh thng TinB mn Khoa hc my Tnh

XY DNG CCH THNG NHNG

H Ni, thng 7 nm 2010


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Xy dng cc h thng nhng: M uv Mc lc

2

Li ni u

Dy v hc hthng nhng l cp ti mt ch c phm vi rng bao gm thit k,mi trng ng dng, loi hnh cng ngh, qui tc cn thit tip cn mt cch c h thng.Lnh vc thit k v ng dng cc h thng nhng bao gm : cc h thng vi iu khin (micro-controller) nh v n gin, cc h thng iu khin, h thng nhng phn tn, h thng trnchip, mng my tnh (c dy v khng dy), cc h thng PC nhng, cc h thng rng bucthi gian, robotic, cc thit b ngoi ca my tnh, x ltn hiu, h thng lnh v iu khin

Nn tng cng ngh hin i l k thut vi in t vi mt tch hp ln v rt ln. Khi munthit k h thng nhng, c nhiu yu t cn tun th ging nh khi thit k my tnh, nhng lib rng buc bi c th ng dng. Thm vo l s an cho ca cc k nng rt cn thit chothit k h thng nhng, c lp vn hnh, thit k vi tiu ch tiu hao nng lng thp, cngngh phn cng, cng ngh phn mm (h thng v ng dng), h thi gian thc, tng tcngi myv i khi c vn an ninh h thng. Nh vy o to v hc h thng nhng cnmt khi lng kin thc tp hp t nht tcc b mn khc nhkhoa hc my tnh (computerscience), khoa hc truyn thng (communication), k thut thit k in t: cc mch tng t vs, s dng tt cc phn mm thit k bo mch (nh Protel, Proteus), kin thc v ch to bndn. V l b mn cng ngh c tnh ng dng caovi bi ton c th, nn li cn c chuyn

mn ca ngnh ngh,m h thng nhng s ng dng. Tm li y l mt ch hp nhtv vic thc hin ch ny thc khng d dng.

Vi lng thi gian nht nh, mn hc XY DNG CC H THNG NHNG s mang li cho ngi hc nhng vn c bn nht v h thng nhng Chng 1. Chng 2 cp ti kin trc phn cng h thng, cch thit k mt s khi chc nng c s c tnh thc tcao. Chng 3 ch yu gii thiu v phn mm ci t trn h thng nhng, bao gm cc trnhiu khin thit b, cc phn mm trung gian, v phn mm h thng c ci t . c bit nhcli mt s yu cu v khi nim ca cc h thng thi gian thc v h iu hnh thi gian thc.Chng 4 gii thiu cc tiu ch v phng php thit k h thng nhng. Cui chng l mt s

cc bi tp ln kiu D n thit k, c th la chn cho thc hnh vi cc kiu kin trc h thngnhng khc nhau.

Nh nu, y l ch rng, mang tnh k thut v kin thc li c tng hp t ccmn khc, nn ti liu ny chc khng th tht s y . Cc phn kin thc no khng c cp su y, ngi hc cn tham kho thm cc ti liu khc, hay t cc mn hc lin quan.


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Tc gi xin chn thnh cm n cc cn b, ging vin Khoa Cng ngh thng tin v bmn Khoa hc my tnh, Hc vin Cng ngh BCVT H Ni gp tc gi hon thnh giotrnh. Tc gi cng xinn nhn cc kin ng gp, ph bnh t ngi c, ngi hc, sao choti liu ny c ch hn. a ch theo e-mail:[email protected].

H Ni, thng 7 nm 2010.

Tc giHunh Thc Cc,

Vin Cng ngh thng tin, VAST, 18, Hong Quc Vit, H Ni.
http://localhost/var/www/apps/[email protected]://localhost/var/www/apps/[email protected]://localhost/var/www/apps/[email protected]://localhost/var/www/apps/[email protected]


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Mc lc

CHNG 1 ................................................................................................................................... 13GII THIU CHUNG V CC H THNG NHNG .............................................................. 13

1.1 KHI NIM V H THNG NHNG (HTN) ........................................................... 131.2 C IM CA HTN ................................................................................................. 141.3 CC YU CU VI HTN ........................................................................................... 161.4 M HNH TNG TH HTN........................................................................................ 171.5 PHN LOI HTN ........................................................................................................ 281.6 KT CHNG V CU HI ..................................................................................... 341.7 CU HI CUI CHNG.......................................................................................... 34

CHNG 2 ................................................................................................................................... 35CC THNH PHN PHN CNG CA H THNG NHNG ............................................. 35

2.1 B X L TRUNG TM (Central Processing Unit-CPU) .......................................... 352.1.1 Cc loi CPU v nguyn l hot ng ................................................................... 36

2.1.2 V d v mt CPU v nguyn l hot ng ............................................................ 362.2 CPU 8085 V H THNG BUS ................................................................................. 452.2.1 Khi nim v bn cht vt l ca cc BUS............................................................ 462.2.2 Bus Driver v Bus Receiver .................................................................................. 482.2.3 Bus ng b (Synchronous bus): ........................................................................... 492.2.4 Bus khng ng b (Asynchronous bus)............................................................... 512.2.5 Trng ti BUS (bus arbitration) ............................................................................. 532.2.6 Bus m rng (Expansion bus) ............................................................................... 552.2.7 Thc hin kthut ca BUS .................................................................................. 59

2.3 BO MCH HTN VI CU HNH TI THIU .......................................................... 622.4 HTN VI CC CPU KHC NHAU ............................................................................ 66

2.4.1 CPU a nng 16 bit................................................................................................ 662.4.2 Bo mch vi CPU HARVARD-microcontroller (MCU), h Intel8051/8052/8xC251 ................................................................................................ 70

2.4.3 Vi mch H thng kh trnh trong mt Chip (Programmable System-on-a-chip-PsoC) v Vi iu khin (Programmable Intelligent Computer-PIC) ..................... 82

2.5 B NH V THIT K B NH .............................................................................. 962.5.1 Mt s thng s chnh ca mch nh.................................................................... 962.5.2 Phn loi b nh.................................................................................................... 992.5.3 Phn cp b nh.................................................................................................. 1072.5.4 T chc b nh vt l v thit k b nh............................................................ 108

2.6 GHP NI VI THIT B NGOI VI ...................................................................... 120

2.6.1 Tng quan ............................................................................................................ 1202.6.2 Ghp ni CPU ch ng ...................................................................................... 1242.6.3 Ghp ni I/O ch ng ........................................................................................ 1292.6.4 Cng vo/ra ......................................................................................................... 1432.6.5 Ghp ni vi th gii tng t (analog) .............................................................. 148

2.6.5.1 Mt s khi nim lin quan ti s ha............................................................. 1492.6.5.2 Bin i tng t thnh s (s ha) ................................................................ 1502.6.5.3 Bin i s thnh tng t (DAC) .................................................................. 150

2.7 KT CHNG ........................................................................................................... 151


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2.8 CU HI V BI TP ............................................................................................. 1512.8.1 Cu hi cui chng............................................................................................ 1512.8.2 Bi tp cui chng ............................................................................................. 152

CHNG 3 ................................................................................................................................. 154

CC THNH PHN PHN MM CA H THNG NHNG ............................................. 1543.1 TRNH IU KHIN THIT B ( vit tt: TKTB) ................................................ 1543.1.1 Tng quan ............................................................................................................ 1543.1.2 Cc loi TKTB.................................................................................................. 1583.1.3 Hot ng ca TKTB ....................................................................................... 1583.1.4 Pht trin TKTB ............................................................................................... 1593.1.5 Mt s v d v TKTB...................................................................................... 160

3.2 H THNG NHNG THI GIAN THC ................................................................ 1623.2.1 H iu hnh a nhim (multitasking) ................................................................ 1623.2.2 H thng thi gian thc ....................................................................................... 1793.2.3 H iu hnh thi gian thc (RTOS)................................................................... 183

3.3 PHN MM TRUNG GIAN (middleware) ............................................................... 1893.4 PHN MM NG DNG ......................................................................................... 1913.5 KT CHNG ........................................................................................................... 1923.6 CU HI CUI CHNG........................................................................................ 192

CHNG 4 ................................................................................................................................. 194THIT K V CI T CC H THNG NHNG ............................................................. 194

4.1 THIT K H THNG ............................................................................................... 1944.1.1 Cc nn tng c bn khi xy dng kin trc HTN .............................................. 1984.1.2 Phn hoch thit k phn cng, phn mm ......................................................... 2034.1.3 Xy dng bo mch khi pht trin h thng ......................................................... 208

4.2 CI T V TH NGHIM HTN ........................................................................... 212

4.2.1 Chn CPU cho thit k ............................................................................................... 2124.2.2 Pht trin HTN .................................................................................................... 2134.2.3 H pht trin, cng c xy dng phn mm v np vo HTN ch..................... 2144.2.4 Khi ng h thng ............................................................................................. 2184.2.5 V d pht trin HTN........................................................................................... 236

4.3 KT CHNG ........................................................................................................... 2364.4 CU HI CUI CHNG........................................................................................ 237

PH LC p n cc bi tp cui chng.


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Mt s ch vit tt

CPU Central Processing Unit n v x l trung tm

ROM Read Only Memory B nh chi c

EPROM Erasable programmable read-

only memory

B nh ch c xa v lp

trnh c

RAM Random Access Memory b nh truycp ngu nhin

FLASH non-volatile computer storage

(memory cards, USB flash

drives, solid-state drives -SSD)

B nh bn daaxnkhoong b

mt ni dung ngay c khi

khng cung cp ngun nui

OS Operating System H iu hnh

RTOS Real Time Operating System H iu hnh thi gian thc

ES Embedded System H thng nhng

HTN Embedded System H thng nhng

OS hay HH Operating System H iu Hnh

TKTB Device Driver Trnh iu khin thit b

PLC Programmable Logic

Controller

b iu khin logickh trnh

PIC Programmable Intelligent

Computer

My tnh kh trnh thng minh

PSoCProgrammable System - on -Chip

H thng kh trinh trn vi

mch

ASICApplication-SpecificIntegrated Circuit

ASIC l mt vi mch cthit k dnh cho mt ngdng c th.
http://tratu.vn/dict/en_vn/Erasable_programmable_read-only_memory_%28EPROM%29http://tratu.vn/dict/en_vn/Erasable_programmable_read-only_memory_%28EPROM%29http://en.wikipedia.org/wiki/Non-volatile_memoryhttp://en.wikipedia.org/wiki/Computer_storagehttp://en.wikipedia.org/wiki/Memory_cardhttp://en.wikipedia.org/wiki/USB_flash_drivehttp://en.wikipedia.org/wiki/USB_flash_drivehttp://en.wikipedia.org/wiki/Solid-state_drivehttp://vi.wikipedia.org/w/index.php?title=B%E1%BB%99_%C4%91i%E1%BB%81u_khi%E1%BB%83n_logic&action=edit&redlink=1http://vi.wikipedia.org/w/index.php?title=B%E1%BB%99_%C4%91i%E1%BB%81u_khi%E1%BB%83n_logic&action=edit&redlink=1http://www.cypress.com/psochttp://www.cypress.com/psochttp://www.cypress.com/psochttp://www.cypress.com/psochttp://vi.wikipedia.org/w/index.php?title=B%E1%BB%99_%C4%91i%E1%BB%81u_khi%E1%BB%83n_logic&action=edit&redlink=1http://en.wikipedia.org/wiki/Solid-state_drivehttp://en.wikipedia.org/wiki/USB_flash_drivehttp://en.wikipedia.org/wiki/USB_flash_drivehttp://en.wikipedia.org/wiki/Memory_cardhttp://en.wikipedia.org/wiki/Computer_storagehttp://en.wikipedia.org/wiki/Non-volatile_memoryhttp://tratu.vn/dict/en_vn/Erasable_programmable_read-only_memory_%28EPROM%29http://tratu.vn/dict/en_vn/Erasable_programmable_read-only_memory_%28EPROM%29


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MCUMicrocontroller Unit

Vi iu khin

CICSComplex Instruction Set

Tp lnh y

RISC Reduced Instruction Set Tp lnh rt gn

SPISerial PeripheralInterface

ng linkt d liu ni

tip, ng b, hot ng theo

kiu Ch/t (Master/Slave)

I2CInter-Integrated Circuit

Bus dng ni gia cc vi

mch in t

USART Universal Serial AynchronousReceiver/Transmitter

B thu/pht ni tip di b anng

ISRInterrupt Service Routine

Chng trnh con x l ngt

hay Dch v x l ngt

MACMedia Access Control

iu khin truy nhp mi

trng (mng my tnh). V

d:MAC address: a ch vt

l ca thit b mng.

MIPSMillion instructions persecond

Triu lnh my trong mt giy

IDEIntegrated DevelopmentEnvironment, hoc:

Integrated Design

Environmenthoc:

Integrated DebuggingEnvironment

L tp cc phn mm h tr

cc cng c, tin ch pht

trin phn mm my tnh, bao

gm:

Son tho m ngun, trnh

thng dch, trnh bin dch,

trnh g ri

ICEIn-Circuit Emulator

L loi thit b phn cng

dng g ri khi pht trin
http://en.wikipedia.org/wiki/Complex_instruction_set_computerhttp://en.wikipedia.org/wiki/Reduced_instruction_set_computerhttp://en.wikipedia.org/wiki/Million_instructions_per_secondhttp://en.wikipedia.org/wiki/Million_instructions_per_secondhttp://en.wikipedia.org/wiki/Million_instructions_per_secondhttp://en.wikipedia.org/wiki/Million_instructions_per_secondhttp://en.wikipedia.org/wiki/Reduced_instruction_set_computerhttp://en.wikipedia.org/wiki/Complex_instruction_set_computer


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phn cng v phn mm hp

nht, nhHTN. Vid d nh

Logic anlyzer, phn mm

MPLAB ca Microchip

Danh sch cc hnh v

Hnh Chng 1 Trang

1.1 M hnh tng qut bo mch ch 17

1.2 Ngun nui cho h my tnh 18

1.3 HTN xy dng t xy dng t vi x l (Microprocessor-based) v vi iu

khin (microcontroller based)19

1.4 Hai kiu HTN vi 2 loi kin trc CPU 21

1.5 M hnh nhn ca kin trc Havard 21

1.6 Havard CPU ARM 920T ca Amtel 22

1.7 M hnh tng qut HTN 23

1.8 Kin trc tru tng HTN 241.9 S khi CPU DSP-MP3 27

1.10 B MP3 vi CPU BlackFin ca ANALOG DEVICES 27

1.11 Mt s HTN thng mi 29

Chng 2

2.1 Intel CPU 8085 34

2.2 Cc khi chc nng ca CPU 8080/8085 35

2.3 Cc khi nin qui chiu theo CPU Clock 41

2.4 Lu thi gian c s ca CPU 8085 (Theo ti liu ca hng Intel) 42

2.5 Biu thi gian ca chu k tm lnh 43

2.6 Cu hnh ti thiu: CPU 8085 v to BUS h thng 44

2.7 CPU Bus v BUS h thng 46


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2.8 Chu k c ng b 47

2.9 BUS khng ng b, hot ng ng b bi i thoi gia

cc tn hiu iu khin. 50

2.10 BUSchui quay vng(daisy chaining) 52

2.11 Trng ti BUS 52

2.12 Trng ti Bus khng tp trung trong multibus 53

2.13 Lin kt qua bus SPI 56

2.14 Lin kt qua bus I2C 56

2.15 Cc mch logic thng dng trong thitk k thut s 57

2.16 Cc kiu ni u ra, u ra tr khng cao 58

2.17 Vi mch 3 trng thi: hai trng thi logic v trng thi th 3 HZ: u ra b

tch khi BUS.59

2.18 Mch cht (hay nh, gi li) kiu D, lm vic theo mc hay sn ln caxungng h CK. (Xem thm chi tit mach SN 7474). 59

2.19 Cht 4 bit vi D-Flip/flop 60

2.20 Cng khuych i (driver) cht hai chiu 60

2.21 Cu hnh ti thiu bo mch CPU 8085, RAM/ROM/Ports 62

2.22 Mch in cho hnh 2.21 632.23 CPU Intel x86 64

2.24 24 Bo mch vi ti thiu vi CPU 8086:BUS controller, Ngt controller,

RAM67

2.25 CPU 8086 timing: lnh c 67

2.26 M hnh kin trc Havard

2.27 Cc khi chc nng ca CPU 8051/8052 69

2.28 CPU 8051:EEPROM, RAM bn trong v kh nng m rng b nh ti 64KB 70

2.29 Bo mch vi CPU 8051/8052 72

2.30 Cc khi chc nng ca nhn 8Xc251 73

2.31 CPU 8051 75

2.32 Phn hoch a ch trong CPU 8051 76


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2.33 Bo mch vi CPU Intel 8051 v RAM, ROM m rng bn ngoi 77

2.34 M hnh mt vi iu khin kiu PsoC hay PIC 80

2.35 Vi iu khin PSoC CY8C29466 822.36 Vi iu khin PIC 16F882/883/886/887 84

2.37 M hnh u vo/ra ca phn t nh 87

2.38 Phn loi b nh 88

2.39 Cc loi b nh ROM 89

2.40 Cc loi RAM 89

2.41 1 chip RAM 32K x 8 (32K byte) 90

2.42 Phn t DRAM 912.43 M hnh hot ng ca RAM cache 93

2.44 S v ngoi mt vi mch (chip) nh (pin-out) 94

2.45 S khi chc nng bn trong chip 16K x 1 bit 96

2.46 S thit k bng nh SRAM 16K x 8, vi Chip 16Kx1 96

2.47 S khi chc nng ca 1 chip DRAM thng mi 4164Kb 97

2.48 Quan h cc tn hiu iu khin DRAM 4164x1 thng mi 98

2.49 CPU 8080/8085 Module DRAM 64 KB ton phn 99

2.50 Chip ROM 2764 thng mi 100

2.51 S thit k ROM 32KB t 4 Chip 2764 102

2.52 V d v cch phn b b nh trong my tnh PC 103

2.53 M hnh k thut ghp ni 106

2.54 Cc kiu ghp ni 106

2.55 c d liu vo: D liu_t thit b vo ACC sau vo RAM 107

2.56 a d liu t RAM vo ACC sau ACC ra thit b 108

2.57 Trao i d liu c vo c iu kin 109

2.58 Lu iu khin c d liu v c iu kin 110

2.59 Lu iu khin c d liu kiu quay vng 111

2.60 Cc kiu ngt 112


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2.61 Thit kt vi ngt cng che c INTR ca CPU 113

2.62 Vector ngt v chuyn x l ti ISR 114

2.63 T chc ngt vi iu khin ngt 1152.64 M rng s ngt vi 2 vi mch 8259 116

2.65 Nguyn l DMA 118

2.66 DMA v hot ng ca CPU l c lp 119

2.67 Lu DMA ghi d liu t RAM ra thit b ngoi 120

2.68 Cng song song trn PC v gii ngha cc chn cng 122

2.69 Lu cc tn hiu cng song song 122

2.70 Cng song song hai chiu 1232.71 u ni RS 232 cc loi DB9, DB 25 v DEC MMJ 124

2.72 PC lm h pht trin phn mm cho HTN, ph hp tn hiu gia RS-232 ca

PC v cng SI-P ca HTN ang pht trin126

2.73 Cng SI-P n gin, dng ngun t RS 232 ca PC 126

2.74 ADC v ghp vo HTN 128

2.75 HTN v DAC 128

2.76 Bi tp thit k ghp ni ADC, cng LPT vo my tnh PC 131Chng 3

3.1 M hnh tng qut cc phn mm trn my tnh 133

3.2 M hnh tng qut cc cc kiu sp xp phn mm trn my tnh 134

3.3 Cc kiu tc v 141

3.4 Biu thc hin mt tc v 143

3.5 Phn loi cc gii thut lp lch thc hin tc v 144

3.6 Quay vng kt hp u tin v chen ngang 146

3.7 Gii thut vi gim st nh thi (ch canh chng) 148

3.8 S kin v p ng 151

3.9 RTOS nhn thi gian thc v RTOS a nng 155

3.10 Cc chc nng nhn RTOS 156


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3.11 Cc h iu hnh RTOS 156

3.12 H thng nhng thi gian thc 157

3.13 V tr cua PMTD HTN 1583.14 M hnh cc lp mng theo TCP/IP, OSI v nh x vo HTN 159

3.15 Cc ng dng WEB trong HTN, t lp phn mm ng dng 160

Chng 4

4.1 Kch bn m phng hiu nng khi thit k HTN 164

4.2 Cc cu trckiu 4+1 165

4.3 Cc pha thit k HTN 166

4.4 Gii thut thit k my in laser: phn hoch cng/mm 1674.5 Phn hoch thit k phn cng v phn mm 168

4.6 Xy dng m hnh hnh thc: Bc sng lc s dng cch tng hp phncng v phn mm chuyn ha xc nh chc nng vo m hnh phncng ca thit k.

171

4.7 Bo mch HTN 172

4.8 H pht trin HTN 176

4.9 Qui trnh pht trin phn mm cho HTN 177

4.10 S n gin h thng v nh x b nh vo HTN ch 177

4.11 nh x thc thi chuyn vo b nh ca h thng 178


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Chng 1: Gii thiu chung v h thng nhng

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CHNG 1

GII THIU CHUNG V CC H THNG NHNG

1.1KHI NIM V H THNG NHNG (HTN)

Nhn li nhng nm 70 th k trc, x l thng tin thng phi s dng cc my tnh lnhay my tnh mini (v d dng my mini PDP 11 ca hng DECmt h thng thng tr trongtruyn thng). Cho ti nhng nm 80, khi vi x lv my tnh c nhn (PC bn v xch tay)ra i, my tnh tr thnh cng c c dng cho x l thng tin bi kh nng tnh ton nhanh,gn nh v di ng linh hot. Giai on tip theo l kh nng ch to vi mch kch thc vi trmmicro mt v nano mt ca nhng nm chn mi, thc y xu hng nh ha

(miniaturization) v a dng cc dng vi x l, pht trin mnh m. Cc b vi x la nng v

s xut hin cc vi x lchuyn bit (ASIC- application-specific integrated circuit) c ch tovi s lng ln cha tng thy. Vic s dng cc b vi x l chuyn bit to ra cc thit b

chuyn x lmt hay mt vi bi ton kthut, to ra mt nghnh cng ngh mi, gi l cngngh nhng. Sn phm ca cng ngh nhng ny l cc h thng nhng.

Vy h thng nhng (HTN-Embedded system) l g ?

C nhiu nh ngha v HTN, nhng nu ta ly tiu ch m t HTN lm ci g v s dng n nhth no, th c th ni v HTN nh sau:

H thng nhng l mt thut ng ch mt h thng c kh nng hot ng t tr cnhng vo trong mt mi trng hay mt h thng khc qui m phc tp hn. l cc h thngtch hp c phn cng (l mt h thng my tnh c xy dng trn c s s dng vi x l -

microprocessor-based system) v phn phm nhng trong phn cng , thc hin cc biton chuynbit.

Hay theo nh ngha ca t chcIEEE th h thng nhng l mt h tnh ton (my tnhs) nm trong (hay c nhngvo) sn phm khc ln hn v rng thng thng n i vingi s dng. Ni rng ra, v n gin hn, khi mt h tnh ton (c th l PC, IPC, PLC, vi xl, vi h thng (microcontroller), DSP v.v...) c nhng vo trong mt sn phm hay mt h

thng no v thc hin mt s chc nng c th ca h thng , th ta gi h tnh ton lmt h thng nhng.Tuy nhin tht khng d g nh ngha cho tht ng v HTN, nh nghatrn rt t ni ti cng ngh v cng rt n gin. Hin nay cha c nh ngha no tht tha ngv HTN,v dnu ly chc nng x l thng tin, th HTN l mt phn x l thng tin nhngtrong cc h thng ln hn v phc tp hn, hay cng c th l mt h thng c lp vn hnh tng. V d gn gi ta c: my tnh c nhn, hay my ch,l mt h thng phc tp c xydng t cc thnh phn hot ng c lp nhng c ng b vi nhau. V iu khin ha,


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c vi iu khin rt mnhx l ha, v iu khin trn a cng c vi iu khin chuyn dng x ltn hiu, ghi/c d liu t a t tnh theo yu cu ca h iu hnh, v mng cng lmt vi iu khin tinh vix l tn hiu l cc h thng conc nhngtrong h thng my

tnh ni chung. Mc d vy ta cng s nu ra y mt s im chung v HTN.

1.2C IM CA HTN

hiu r hn v HTN, ta nu ra mt s c im nhn bit v mt h thng nhng:

L mt kiu my tnh ng dng c bit, rt gii hn v phn cng v phn mm khi sosnh vi cc mytnh a nng, nh my tnh c nhn, my ch, siu my tnh. iu niln rng hiu nng x l, nng lng tiu th, b nh, cc phn cng khc u hn ch. Cnphn mm hn ch, hay phn mm l c nh,c ngha h iu hnh c thit k ph hp

vi cc x l nh. Hin nay h iu hnh thng s dng l h iu hnh a nhim (nhDOS 6.X h tra nhim trn cc loi HTN dng PC 104), hay h iu hnh thi gian thc. Nu khng c h iu hnh, th cng l mt kiu chng trnh iu khin chung (monitor)no . Phn mm vit ra khng c cc phn m c mc tru tng hay c cng mcthp.M thc thi (gm h iu hnh v cc ng dng) c np vo b nh ROM. Nhnchung m thc thi c kch thc nh v ti u v ROM c dung lng nh. Tuy nhin vi s pht trin nhanh chng ca cng ngh, cch nu trn c th thay i, bi s c cc HTN rttinh xo v mc phc tp rt cao, b nh c th n vi chc mega bytes.

HTN c thit k thc hin mt hay vi ng dng xc nh, chuyn bit(Applicationspecific), v d cc thit b nhng cng nghipnh robot thuc loi ny. Tuy nhin c nhngthit b nhng khc nh cc PDA, in thoi di ng, l cc HTN c kh nng thc hinnhiu chc nng hn. Hay cc Tivi k thut s li c th thc hin cc ng dng tng tcvi mn hnh cm ng, v.v Tuy nhin xu hng hin nay l to ra cc HTNkh trnh cgiao din kt ni vi mt h pht trin khc nng cp phn mm.

HTN tng tc vi mi trng ng dng qua nhiu phng thc:

Qua cc b cm bin (sensor), ghp ni vo HTN bng dy dn, hay khng dy; Pht trin cc giao thc truyn tin ring bit, hay theo cc giao thc chun trao

i thng tin vi cc thit b khc, c th c h trni mng LAN; HTN thuc loi thit b thng minh t phn ng(reactive),b ng nhng tng

tc lin tcvi mi trng v c p ng kp thi vi nhng tin trin (s kin)m mi trng xc lp.

Tng tc ngi-my rt n gin nu c v HTN chy c lp v thng tin vi hthng ln hn l chnh. Ngy nay xu hng WEB ha giao din tng tc l phbin, v d cc thit b kt ni mng Internet nh ADSL dng SOHO (Small


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Office-Home Office), c WEB lm cu hnh v qun tr.Tng t, cc HTNcng nghip cng pht trin theo xu hng ny d qun tr t trung tm iu

khin. HTN hot ng c lp, do ccc im sau y: tin cy, l tng l khng c s c hng hc. Bo tr: thi gian bo tr nhanh chng. C tnh sn sng cao, l kt qu ca s tin cy v bo tr. An ton: nu c s c xy ra, HTN khng gy ra nhng tc hi khc ca ton h

thng. An ninh: d liu ca HTN c bo mt, truy nhp phi c xc nhn (v d, HTN

l cc thit b truyn thng, SOHO). HTN l mt kiu my tnh c yu cu v cht lng v tin cy rt cao, hot ng ctrong cc mi trng khc nghitv nhit (cao, hay rt thp), m cao, rung ng

ln, nhiu sng in t v.v V d cc my tnh trong cng nghip, cc thit b truyn thng,trm BTS chng hn, hay cc my tnh iu khin trn my bay (fly by wire)

Phn ln cc h thng nhng hot ng vi s rng buc thi gian: yu cu c thi giancho (p ng) u ra nhanh, ng thi im, trong mi tng quan vi thi im xut hinca (s kin) u vo. Kiu hot ng nh vy gi l to p ng theo thi gian thc. Thigian thc c th chia ra lm hai kiu:

Nhy cm vi thi gian (time- sensitive): s kin ch c x ltrong mt khung

thi gian nht nh;

Thi gian ti hn (time critical): khi c s kin, h thng phi phn ng ngay, chuyn nhanh nht n m chng trnh ng vi s kin x l, ni cchkhc trong mt ca s thi gian cho php, x l phi c thc hin v phi cp ng u ra. V d nu vng phn hi trong cc h c iu khin HTN lb iu khin chy gii thut iu khinkhng nhanh (x l, tnh ton qu lu),h thng tr nn khng n nh.

C hiu nng cao. Cc s o sau y se phn nh c tnh ny:

S dng nng lng thp v hiu qu. C th thy im ny cc thit b di ng.

M phn mm c kch thc rt ti u, v m phi ci ton b trn HTN. Thi gian x ltc v (run-time) phi nhanh, s dng t ti nguyn phn cng (v

lin quan ti tiu hao nng lng). Trng lng nh. y l mt trong nhng lc chn khi mua mt HNT. Gi thnh rt cnh tranh. Mun vy thit k v s dng phn cng, phn mm cn

quan tm ti hiu qu.


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Di y l cc v d v cc HTN nhn gc s dng:

Lnh vc ng

dng

Thit b nhng

t nh la in t, iu khin ng c, h thng phanh, h s

in t tiu dng Tivi analog, Tivi s, CD, DVD, VCR,

PDA, in thoi di ng, CAMCODER, GPS, t iu ha, t lnh,

l vi sng

Cng nghip Robot, dy chuyn sn xut t ng, SCADA agents

Y t My thm tch, my pha-lc, my th, my tr tim, my qut ct

lt, rt nhiu thit b y t hin iMng thng tin

(WAN, LAN,

thoi)

B nh tuyn, gateway, chuyn mch mng, cc thit b truyn

thng-mng, trm chuyn tip, BTS di ng

Vn phng My Fax, my potocopy, my in (kim, laser, phun), my qut, mn

hnh LCD

Cc lnh vc khc:

an ninh, quc

phng, hng

khng, hng hi

c hp nht trong rt nhiu kh ti hin i ca tt c cc binh

chng .

1.3CC YU CU VI HTN

HTN thc t l mt loi my tnh dng x lthng tin dng s. HTN c th lmt h thng c lp nh mt thit b tch cc trong m hnh iu khin, tc HTN l mtregulator s, thc hin cc chc nng caPID regulator, khi cc chc nng ny c th hin

bi thut ton v chuyn ha dng m chng trnh trong HTN. Trong khi HTN li l mtphn ca mt qui trnh cng ngh trong cng nghip. Nh trn lit k cc c im chung mcc h thng nhng thng c, t nhin ta c th rt ra c nhng yu cu cn c trn mt hthng nhng.

1. Kh nng p ngvi s kin bn ngoi (t cc tc nhn b kim sot) phi nhanhnhy, kp thi, tc l kh nng theo thi gian thc:

Cc tc v c p ng rng buc bi thi hn cht (deadline);


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Thi gian pht hin li phi rt ngn (ti thiu);

Khi chy cc chu trnh vng lp iu khin bng phn mmphi c p ngu rang thi hn;

2.

C kh nng lm mi trng khc nghit.3. Cgi thnhthp hay hiu qu hot ng/gi thnh hp l.

4. Kch thcnh gn,nh, d mang d vn chuyn, lp t.

5. Tiu th nng lng thp, kh nng s dng ngun pin, c qui (tt nhin ph thuc vodung lng ca pin, c qui).

6. Hot ng tin cy, chu li cao

Tin cy: p ng dch v yu cu ng thi hn sau thi gian tt0n t;

Cho hng s ca t s s c trong thi gian 1 gi ng h l e (e/h), th biu

din t s s c l R(t)=exp

(-e(t-t0))

, sau thi gian gia 2 ln s c (MeanTime To Failure- MTTF) s l 1/R(t);

tin cy cao nu t ~10-9s c /gi.

Tnh sn sng cao: Nu thi gian sa cha s c trung bnh l MTTR, th tnhsn sng (availability) A=MTTF/(MTTF+MTTR).

7. An ton v bo mt.

8. Kh nng nng cp phn mm v d phng nng cp phn cng (m rng qua khecm d tr, v d cc thit b mng thng c tnh nng ny).

1.4M HNH TNG TH HTN

Nh nu trong nh ngha ca HTN, th HTN c kin trc ca mt my tnh s, do vy skhng c g khc bit khi m t m hnh kin trc ca HTN ni chung. C khc chng l chitit ca tng HTN c th.

M hnh chc nng ca my tnh

Di y ta nu ra m hnh tng qut ca my tnh theo nguyn l Von Neumman. HTN cngchia s kintrc ny trong mt s trng hp. M hnh cho thy cc khi chc nng cbn cnc. Trong thc t c nhng CPU nhng c kin trc c th khc nhau, nhng khi m t cc khi

chc nng, th hon ton thng nht.


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B vi x l trungtm

(CENTRAL

PROCESSING

UNIT)

ng h thchanh nhp chun

Ngun nui mtchiu

H thng ng dy d liu (DATA BUS)

H thng ng dy iu khin (CONTROL BUS)

H thng ng dy a ch (ADDRES BUS )

B nh Ghi/c(RAM)

B nh ch c(ROM)

Ghp ni ra (O) Ghp ni vo (I)

Hnh 1.1-M hnh tng qut bo mch ch

n v x l trung tm (Central Processing UnitCPU) l khi chc nng c bn nht tonn mt h vi x l, HNT hay my tnh c nhn (Personal ComputerPC).

CPU thc hin chc nng x l d liu theo nguyn tc thc hin chng trnh my tnhci trong b nh ROM hay np vo b nh RAM.Vic thc hin nh sau:CPU c m

lnh (OPCODE) t b nh (ROM hay RAM) .

Gii m lnh, to cc tn hiu (xung) iu khin tng ng vi m lnh iu khinhot ng ca cc khi chc nng khc trong CPU v bn ngoi CPU.

Thc hin tng bc cc thao tc x l d liu nh ngha trong m lnh.

b) B nh chnh (ROM/RAM) c t chc t cc t nh n, kp. Theo chunca IBM/PC t nh n (c s) c di 1 byte (8 bits). B nh ny gm cc chipnh ch c ROM (Read Only Memory) v cc chip nh truy xut ngu nhinRAM (Random Access Memory) c tc truy cp nhanh. B nh c s dng

cha cc chng trnh v cc d liu cn x l. Cc chng trnh ng dng vd liu c th c cha ROM hoc RAM, cc kt qu trung gian hay kt qucui cng ca cc thao tc x l c th c cha trong cc thanh ghi a dnghoc trong RAM.

Cc mch ghp ni vo/ra (I/O) l cc mch in t cho php CPU trao i d liu vicc thit b ngoi vi nh bn phm, mn hnh, my inlm giao din vi ngi dng hoccc b chuyn i s-tng t DAC (Digital/Analog Converter), chuyn i tng t-s


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ADC (Analog/Digital Converter), cc mch vo/ra d liu dng s DO (Digital Outputs),DI (Digital Inputs)

H vi x l cn c mt mch to xung nhp gi l CPU Clock. B to xung ny c iukhin bng mt mch thch anh c tn s thch hp v m bo tn s lm vic n nh ,vi tn s chnh xc cao. CPU c mt chn pht xung cho cc vi mch cn li, gi l ngh h thng (SystemClock), ng h ny ni ti tt c cc vi mch iu khin chnh trnbo mch, ng b ton b hot ngvi CPU.

Mt khi ngun nui (Power Supply) cung cp nng lng cho h thng t mng inli, hay s dng pin. B ngun ca cc h vi x l thng thng l b ngun xung vik thut ng-ngt dng linh kin bn dn cng sut (Switching Power Supply), va gnnh, cng sut ln, hiu sut cao.

Hnh 1.2-Ngun nui cho h my tnh

Phn loi trn c s vi mchTuy nhin khi cp ti cu trc ca HTNc xy dng trn cng ngheejnvi mch, cth c hai loi khc bit:

H thng nhng da trn b vi x l

trn bo mch

Microprocessor-based Embedded

System

Vi vi iu khin trn bo mch

Microcontroller-based Embedded

System

C CPU c lp, c th l CPU anng ph bin (Intel 8080/8085,Motorola 6800),

C RAM, ROM, nh thi , I/Oc lp,

Kh nng m rng RAM, ROM,

CPU dng li chuyn bit, RAM,ROM, nh thi,I/O trong mt vi mchn,

RAM, ROM c dung lng c nh,I/O cho mc ch s dng,

n mc ch, ng dng xc nh,


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I/O ty ,

a nng, t tin.

Kin trc gn nh mt my tnh

nhng c kch thc nh.Thit k chc nng:

Cn phi c cc vi mch RAM,ROM hpthnh t bn ngoi vi mch.

Khng th kt ni vi ngoi vingoi vi, cn c thm cc vi mch htrcho chc nng ny.

Tuy nhin nng lc tnh tonmnh.

tiu hao t nng lng, gi c hp lcho ng dng nhng.

Kch thc nh, gn.

Thit k chc nng:

c thit k c tt c trongmt Chip !

Nng lc tnh ton c thit k tiu cho ng dng xc nh.

Rt ph hp xy dng cc HTN

Tit kim gian thit k.

Microcontroller differs from a microprocessor in many ways. First and the most important

is its functionality. In order for a microprocessorto be used, other components such as

memory, or components for receiving and sending data must be added to it. In short that

means that microprocessor is the very heart of the computer. On the other hand,

microcontroller is designed to be all of that in one. No other external components are

needed for its application because all necessary peripherals are already built into it. Thus,

we save the time and space needed to construct devices.

Hnh 1.3 HTN xy dng t xy dng t vi x l(Microprocessor-based) v vi iu khin(microcontroller based)


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Microcontroller v cc thnh phn c bn, BUS kt ni bn trong.

Kin trc ca CPU

Phn nhiu cc ti liu khi cp ti thit k HTN, u dnh mt s ch v kin trc v

cch thit k ch to CPU. y l mt vn chuyn v rt su, ti liu ny s khng dn

xut. Ti liu ch gii hn gii thiu cc kiu CPU c th s dng thit k HTN. Cc kiu

CPU ny rt ph bin trn th trng, rt a dngvi nng lc x lkhc nhau v ph hp cho

mi loi ng dng nhng.Di y l mt trong cc quan im nhn nhn CPU:

Tp lnh: c th l CISC hay RISC, trong RISC l ph bin.

Hot ng theo kiu Von Neumman, v d in hnh nh hnh v trn, trong Hthng BUS a ch v BUS d liu, BUS iu khin chung cho ton b h thng, b

nh chia s chung cho ton h thng vi vng m lnh (code) v d liu (data) trn

cng khng gian a ch b nh v BUS d liu khng th truyn ng thi m lnh v

d liu cng mt thi im. Qu trnh thc hin mt lnh my nh sau:


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1) c m lnh t ROM/RAM qua BUS d liu vo CPU, gi m xc nh lm

g tip theo;

2) c d liu tip theo l mt phn ca lnh (operands) nu c qua BUS d liu;

3) Thc hin lnh khi c ht cc operands ca lnh; 4) Lu kt qu ra RAM qua Data BUS.

Nh vy BUS d liu l knh duy nht trao i d liu, do vy ta ni BUS

d liu b bo ha, hiu nng tnh ton b hn ch. Vi cc CPU hin i

BUS d liu c ci tin rt nhiu, c bit l giao thc BUS v ng h BUS

c nng cao ci thin hn ch ni trn.

V hot ng kiu Harvardvi mts c im khc bit :

Howard Aiken (1900-1973) khi xy dng my tnh vi cc rel tch cc b nh

d liu (RAM) v b nh chng trnh vi cc bus ring r truy cp vo b nh

d liu (RAM) v b nh chng trnh (NVM Non Volatile Memory: ROM,

FLASH) cha phn mm nhng (h iu hnh, Device drivers, ng dng nhng ).

Cc bus iu hnh c lp, cc ch dn chng trnh v d liu c th c a ra

cng mt lc, ci thin tc so vi thit k vi ch mt bus.

Phn bit r rng b nh d liu v b nh chng trnh, CPU c th va c mt

lnh, va truy cp d liu t b nh cng lc.

Do cc BUS c lp, CPU c kh nng tm trc (instruction prefetch), nn vi

kin trc Harvard chng trnh chy nhanh hn, bi v n c th thc hin ngay

lnh tip theo khi va kt thc lnh trc .

Tuy nhin v kin trc c phn phc tp hn trong phn cng, nhng cho hiu qu

hn cho cc ng dng nhng. L loi ph bin thit k cc HTN.


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Hnh 1.4-Hai kiu HTN vi 2 loi kin trc CPU

Harvard, Modified Harvard, or von Neumann?

Three characteristics may be used to distinguish Modified Harvard machines from Harvard andvon Neumann machines:

Instruction and data memories occupy different address spaces. For pure Harvardmachines, there is an address 'zero' in instruction space that refers to an instruction storagelocation and a separate address 'zero' in data space that refers to a distinct data storage

location. By contrast, von Neumann and modified Harvard machines store bothinstructions and data in a single address space, so address 'zero' refers to only one thingand whether the binary pattern in that location is interpreted as an instruction or data isdefined by how the program is written. This characteristic unambiguously identifies apure Harvard machine.

o By a strict interpretation of this distinction, for example, the Microchip PIC17 andPIC18 architectures, as well as the Atmel 8-bit AVR architecture, would beregarded aspure Harvard Architecture machines because they do, in fact, maintaina distinct separation between code and data spaces, and address 'zero' of eachdoes, in fact, refer to a physically different piece of memory. However, thedistinction is made ambiguous by the colloquial use of the term "modified Harvard

Architecture" to refer to such machines' inclusion of special instructions to readand/or write the contents of code space as though it were data.[1]

Instruction and data memories have separate hardware pathways to the centralprocessing unit (CPU). This is the point of pure or modified Harvard machines, and whythey co-exist with the more flexible and general von Neumann architecture: separatememory pathways to the CPU allow instructions to be fetched and data to be accessed atthe same time, improving throughput. The pure Harvard machines have separate pathwayswith separate address spaces. Modified Harvard machines have such separate access paths
http://en.wikipedia.org/wiki/Modified_Harvard_architecture#cite_note-avr-libc-0http://en.wikipedia.org/wiki/Modified_Harvard_architecture#cite_note-avr-libc-0http://en.wikipedia.org/wiki/Modified_Harvard_architecture#cite_note-avr-libc-0http://en.wikipedia.org/wiki/Modified_Harvard_architecture#cite_note-avr-libc-0


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forCPU cachesor other tightly coupled memories, but a unified address space covers therest of thememory hierarchy. A von Neumann processor has only that unified addressspace. From a programmer's point-of-view, a modified Harvard processor is usuallytreated as a von Neumann machine untilcache coherencybecomes an issue, as withself-

modifying codeand program loading. This can be confusing, but such issues are usuallyvisible only tosystems programmersandintegrators.[clarification needed]

Instruction and data memories may be accessed in different ways. The originalHarvard machine, theMark I, stored instructions on apunched paper tapeand data inelectro-mechanical counters. This, however, was entirely due to the limitations oftechnology available at the time. Today a Harvard machine such as thePICmicrocontrollermight use 12-bit wideflash memoryfor instructions, and 8-bit wideSRAMfor data. In contrast, a von Neumann microcontroller such as anARM7TDMI, or amodified HarvardARM9core, necessarily provides uniform access to flash and SRAM(as 8 bit bytes, in those cases).

Modern uses of the Modified Harvard architecture

Outside of applications where a cachelessDSPormicrocontrolleris required, most modernprocessors have aCPU cachewhich partitions instruction and data. Accordingly, they are hybridsof the Harvard and von Neumann models, and are best viewed as implementing a ModifiedHarvard Architecture. Examples include thex86processors found in most desktop computers,andARMcores embedded as applications processors in cell phones.MIPS,Blackfin,PowerPC,and many other processor families implement this flavor of Modified Harvard Architecture.

There are also processors which are Harvard machines by the most rigorous definition (that

program and data memory occupy different address spaces), and are only modifiedin the weaksense that there are operations to read and/or write program memory as data. For example, LPM(Load Program Memory) and SPM (Store Program Memory) instructions in theAtmel AVRimplement such a modification. Similar solutions are found in other microcontrollers such as thePIC andZ8Encore!, many families of digital signal processors such as theTI C55x cores, andmore. Because instruction execution is still restricted to the program address space, theseprocessors are very unlike von Neumann machines.

Having separate address spaces creates certain difficulties in programming with high-levellanguages such as C, which don't directly support the notion that tables of read-only data mightbe in a different address space than normal writable data (and thus need to be read using different

instructions).

[1]

V d Havard CPU ARM 920T, l loi CPU ci tin vi mt nh cache cho lnh v mt cache

cho d liu.
http://en.wikipedia.org/wiki/CPU_cacheshttp://en.wikipedia.org/wiki/CPU_cacheshttp://en.wikipedia.org/wiki/CPU_cacheshttp://en.wikipedia.org/wiki/Memory_hierarchyhttp://en.wikipedia.org/wiki/Memory_hierarchyhttp://en.wikipedia.org/wiki/Memory_hierarchyhttp://en.wikipedia.org/wiki/Cache_coherencyhttp://en.wikipedia.org/wiki/Cache_coherencyhttp://en.wikipedia.org/wiki/Cache_coherencyhttp://en.wikipedia.org/wiki/Self-modifying_codehttp://en.wikipedia.org/wiki/Self-modifying_codehttp://en.wikipedia.org/wiki/Self-modifying_codehttp://en.wikipedia.org/wiki/Self-modifying_codehttp://en.wikipedia.org/wiki/System_programminghttp://en.wikipedia.org/wiki/System_programminghttp://en.wikipedia.org/wiki/System_programminghttp://en.wikipedia.org/wiki/System_integrationhttp://en.wikipedia.org/wiki/System_integrationhttp://en.wikipedia.org/wiki/System_integrationhttp://en.wikipedia.org/wiki/Wikipedia:Please_clarifyhttp://en.wikipedia.org/wiki/Wikipedia:Please_clarifyhttp://en.wikipedia.org/wiki/Wikipedia:Please_clarifyhttp://en.wikipedia.org/wiki/Harvard_Mark_Ihttp://en.wikipedia.org/wiki/Harvard_Mark_Ihttp://en.wikipedia.org/wiki/Harvard_Mark_Ihttp://en.wikipedia.org/wiki/Punched_tapehttp://en.wikipedia.org/wiki/Punched_tapehttp://en.wikipedia.org/wiki/Punched_tapehttp://en.wikipedia.org/wiki/PIC_microcontrollerhttp://en.wikipedia.org/wiki/PIC_microcontrollerhttp://en.wikipedia.org/wiki/PIC_microcontrollerhttp://en.wikipedia.org/wiki/PIC_microcontrollerhttp://en.wikipedia.org/wiki/Flash_memoryhttp://en.wikipedia.org/wiki/Flash_memoryhttp://en.wikipedia.org/wiki/Flash_memoryhttp://en.wikipedia.org/wiki/Static_random_access_memoryhttp://en.wikipedia.org/wiki/Static_random_access_memoryhttp://en.wikipedia.org/wiki/ARM7TDMIhttp://en.wikipedia.org/wiki/ARM7TDMIhttp://en.wikipedia.org/wiki/ARM7TDMIhttp://en.wikipedia.org/wiki/ARM9http://en.wikipedia.org/wiki/ARM9http://en.wikipedia.org/wiki/ARM9http://en.wikipedia.org/wiki/Digital_signal_processorshttp://en.wikipedia.org/wiki/Digital_signal_processorshttp://en.wikipedia.org/wiki/Digital_signal_processorshttp://en.wikipedia.org/wiki/Microcontrollerhttp://en.wikipedia.org/wiki/Microcontrollerhttp://en.wikipedia.org/wiki/Microcontrollerhttp://en.wikipedia.org/wiki/CPU_cachehttp://en.wikipedia.org/wiki/CPU_cachehttp://en.wikipedia.org/wiki/CPU_cachehttp://en.wikipedia.org/wiki/X86http://en.wikipedia.org/wiki/X86http://en.wikipedia.org/wiki/X86http://en.wikipedia.org/wiki/ARM_architecturehttp://en.wikipedia.org/wiki/ARM_architecturehttp://en.wikipedia.org/wiki/ARM_architecturehttp://en.wikipedia.org/wiki/MIPS_architecturehttp://en.wikipedia.org/wiki/MIPS_architecturehttp://en.wikipedia.org/wiki/MIPS_architecturehttp://en.wikipedia.org/wiki/Blackfinhttp://en.wikipedia.org/wiki/Blackfinhttp://en.wikipedia.org/wiki/Blackfinhttp://en.wikipedia.org/wiki/PowerPChttp://en.wikipedia.org/wiki/PowerPChttp://en.wikipedia.org/wiki/PowerPChttp://en.wikipedia.org/wiki/Atmel_AVRhttp://en.wikipedia.org/wiki/Atmel_AVRhttp://en.wikipedia.org/wiki/Atmel_AVRhttp://en.wikipedia.org/wiki/Z8_Encore%21http://en.wikipedia.org/wiki/Z8_Encore%21http://en.wikipedia.org/wiki/Z8_Encore%21http://en.wikipedia.org/wiki/Texas_Instruments_TMS320http://en.wikipedia.org/wiki/Texas_Instruments_TMS320http://en.wikipedia.org/wiki/Texas_Instruments_TMS320http://en.wikipedia.org/wiki/Modified_Harvard_architecture#cite_note-avr-libc-0http://en.wikipedia.org/wiki/Modified_Harvard_architecture#cite_note-avr-libc-0http://en.wikipedia.org/wiki/Modified_Harvard_architecture#cite_note-avr-libc-0http://en.wikipedia.org/wiki/Modified_Harvard_architecture#cite_note-avr-libc-0http://en.wikipedia.org/wiki/Texas_Instruments_TMS320http://en.wikipedia.org/wiki/Z8_Encore%21http://en.wikipedia.org/wiki/Atmel_AVRhttp://en.wikipedia.org/wiki/PowerPChttp://en.wikipedia.org/wiki/Blackfinhttp://en.wikipedia.org/wiki/MIPS_architecturehttp://en.wikipedia.org/wiki/ARM_architecturehttp://en.wikipedia.org/wiki/X86http://en.wikipedia.org/wiki/CPU_cachehttp://en.wikipedia.org/wiki/Microcontrollerhttp://en.wikipedia.org/wiki/Digital_signal_processorshttp://en.wikipedia.org/wiki/ARM9http://en.wikipedia.org/wiki/ARM7TDMIhttp://en.wikipedia.org/wiki/Static_random_access_memoryhttp://en.wikipedia.org/wiki/Flash_memoryhttp://en.wikipedia.org/wiki/PIC_microcontrollerhttp://en.wikipedia.org/wiki/PIC_microcontrollerhttp://en.wikipedia.org/wiki/Punched_tapehttp://en.wikipedia.org/wiki/Harvard_Mark_Ihttp://en.wikipedia.org/wiki/Wikipedia:Please_clarifyhttp://en.wikipedia.org/wiki/System_integrationhttp://en.wikipedia.org/wiki/System_programminghttp://en.wikipedia.org/wiki/Self-modifying_codehttp://en.wikipedia.org/wiki/Self-modifying_codehttp://en.wikipedia.org/wiki/Cache_coherencyhttp://en.wikipedia.org/wiki/Memory_hierarchyhttp://en.wikipedia.org/wiki/CPU_caches


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Hnh1.6-Havard CPU ARM 920T ca Amtel

M hnh tng qut ca mt HTN:

Cc khi chc nng:

- Mi trng hot ng: ni s dng HTN,

- Chp hnh: l cc thit b cng ngh,

- Cm bin: thit b c bit ghi nhn thng tin cng ngh (v tr, vng quay, tc ,nhit , p sut, kch thc (cao, di, su) ) ,

- Ghp ni: l cc thit b phi hp, chuyn ha cc thng tin t cm bin thnh tnhiu in s ha,

- Cc b s ha (A/D) v tng t ha (D/A),

- Ghp ni vi cc h thng khc: lin kt cc HTN khc, mng d liu, Trung tm

iu khin SCADA,

- Ghp ni BUS h thng

- CPU, RAM, ROM (FLASH),


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Hnh 1.7-M hnh tng qutHTN-

M hnh vi cc khi chc nng


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Hnh 1.7-M hnh tng qut HTN-Vi cc khi ngoi vi v phn mm

Kin trc tru tng: lp xp chng

Khi ni v kin trc mt h thng, thng ta cp tnh tng qut v nhng chc nngc bn. Nh vy mc tng qut, cc lp phn cng v phn mm c cp nh ccthnh phn (element) hp thnh. Cc thnh phn kin trc c th hp nht bn trong thit bnhng hoc tn ti bn ngoi v tng tc vi cc thnh phn bn trong theo mt cch no .

cch nhn kin trc, th kin trc c biu din bi cc cu trc. Mi cu trc bao gm mt tphp cc thnh phn c trng, cc thuc tnh v nhng c t v mi quan h bn trong ccthnh phn .

Kin trc lp xp chng c c tnh l mi lp ch s dng chc nng(hay dch v) catng di n,ng thi ch cho php tng trn s dng cc chc nng (dch v) ca mnh. Kintrc ny c li thv an ninh, bn vng, n gin v thit k, dnng cp (cc dch v), thchin mi lp v kh nng nng cp nng ngay c khi h thng ang hot ng. V d nguyn l


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ny ta thy m hnh mng chun OSI (Open Systems Interconnection), kin trc ca h iu

hnh Unix/Linux.

M hnh mt NTH cng c c t theo lp kin trc m bo v tin cy, ngin khi hot ng:

Hnh 1.8-Kin trc tru tng HTN

-Lp phn cng: Nh Cc khi chc nng.

-Lp phn mm h thng: H iu hnh hay Monitor

-Lp ng dng: L mt s chng trnh ng dng xc nh m HTN thi hnh.

1.5 PHN LOI HTN

Phn loi HTN c th theo nhiu tiu ch khc nhau v c th khng hon ton ging nhau (gingnh khi nu nh ngha v HTN). Tuy nhin c th nu ra y mt s tiu ch phn loi HTN.

HTN hot ng u:

Hot ng c lp: nhn u vo t cc tc nhn b iu khin, x l v cho ura. Thi gian c u ra (p ng) phi trong mt khung thi gian nht nh theo khi thit k.

Hot ng c lin kt vi nhau gia cc HTN v cc trung tm kim sot khc.Loi ny gi l HTN mng. V d cc HTN cc b ti cc thit b chp hnh ucui ca mt qui trnh cng ngh phc tp lin kt qua mng cc b ca nh myhay ca mt c my phc tp. H thng mng in thoi di ng l mt v d kiuHTN mng: my ngi dng cc trm BTS tng i tng i BTS my ngi dng. Tn chung ca HNT li ny l HTN di ng.

Lnh vc ng dng:


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Cng c tnh ton nh cc my tnh nhng ch chy cc bi ton nht nh.

X ltn hiu: cc thit b video thi gian thc, DVD player, thit b y t

Truyn thng, mng: thit b mng nh router, chuyn mch (switch), firewall.

H thng iu khin v thu thp d liu. Kin trc v qui m:

HTN qui m nh (Small Scale Embedded Systems) vi cc xc nh nh sau:

- Phn cng t phc tp, thit k vi CPU n, loi 4, 8bits;

- Phn mm n gin, dng mt monitor kim sothot ng;

- Cng c pht trin phn mm: son tho chng trnh, hp ng v hp ngcho (asembler, cross asembler), mi trng pht trin hp nht (integrateddevelopememt enviroment) s dng vi vi iu khin hay CPU chn. Ngnng pht trin l C, m C c dch ra nh phn ti u, nh v m thc thitrong b nh ROM, dung lng b nh gii hn.

- Tiu th nng lngrt t.

V d : HTN n gin, ch c mt vi phm bm a thng tin vo, mt vi nLED hin u ra (trng thi no ). V d: HTN my iu ha nhit , l nhitv.v.

HTN qui m phc tp:

- Phn cng phc tp: Thit k vi CPU 8,16 hay32 bits, hay s dng vi iukhin;

- H thng c cu trc vi BUS m rng ghp ni vi cc thit b ngoi vi;

- Phn mm nhng tinh vi, c h iu hnh thc hin cc nhim v, thao tcng thi. C th l loi RTOS.

- Cng c lp trnh: C/C++/Visual C++/Java, RTOS, m ngun, cng c kithut: Simulator, Debugger. Mi trng pht trin hp nht (Integrated

Development Envirinment-IDE. Cng c soft xy dng phn cng phchp.

V d: cc HTN trn cc my gia cng (kim loi, khun nha v.v).

HTN tinh vi (Sophisticated Embedded Systems)

- Phn cng v phn mm rt c bit;

- Nhiu CPU v c th m rng, hay cc CPU c th cu hnh c(configurable CPUs), hay mng logic lp trnh c (programable logic array-PLA);

- Pht trin cho cclp ng dng mi nht khi cc ng dng loi ny cn phic qu trnh thit k ng thi gia phn cng v phn mm, hp nht cc linh


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kin h thngcui cng,s dng cng ngh ASIC ch to CPU, vi mchng x l(cn gi l ChipSet hay Co-processor).

V d cc h thng hng khng qun s mi nht trn cc my bay (military/civilavionic ), cc thit b mng cao cp. Cc HTN kiu ny b ch ng bi tc x l ca phn cng (CPUs), Cc chc nng phn mm nh cc gii thut mha/gii m, gii thut chuyn i tn hiu s (Fourrier transformation), giao thcTCP/IP stack, cc hm chc nng mng nhng trong phn cng tng tc x l;Mt s chc nng phn mm c cng ha ( nh DSP) . Cng c pht trinthng khng c sn v t tin, do phi pht trin ring khi d n c chpnhn.

HTNphn cng hay HTN phn mm;

HTN theo An ton s c (fail-safe), hay t an ton (fail-safe operational);

HTN p ng c bo m hay p ng vi n lc ti a; HTN vingun ti nguyn y hay ngun ti nguyn hn ch;

HTN phn ng ngay vi s kin hay phn ng vi s kin c thi hn.

Ti sao cc HTN li c s khc nhau ?

C th tr li n gin l do cc ng dng khc nhau v h thng phi hot ng hiuqu. V d:

1. HTN l dnh thc hin cc tc v ring bit. Cc tc v ring bit y phn ln

lin quan ti ccx lkhc nhau chuyn bit, cc s kin, cc trng thi ca mt quitrnh cng ngh, v d qui trnh iu khin my cng c, robot Khi thay i quitrnh, thng dn ti thay i hay thit k li c h thng. Nh vy c th thy cn cmt loi b x lthch hp cho li tc v nu. B x lnh vy gi l b x lchuyn bit (dedicated microprocessor), n khng mnh nh b x la nng ta sdng trong my tnh, nh my tnh PC chng hn. V d in hnh l b x ltn hius DSP (Digital Signal Processor) dng TMS320 (TMS320C6000 Multicore DSPs,TMS320DM6446 DaVinci Video Processor ) ca Texas Instruments, hay cc bx l MP3 (x ld liu m thanh nn v gii m a vo khuych i m thanhri ra loa).

V d s khi chc nng ca CPU DSP:


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Hnh 1.9- S khi CPU DSP-MP3.

Hnh 1.10-B MP3 vi CPU BlackFinca ANALOG DEVICES

2. Nh im 1. nu trn, v phn cng, cc HTN c thit k t rt nhiu loi CPUnhng v cc CPU nhng bn thn chng li c kin trc khc nhau. Hin trn th

trng c th lit k cc kiu CPU nhng nh: CPU vn nng rt gn ph hp c hong dng nhng, cc vi iu khin (microcontroller, PIC), cc kin trc kiu h thngtrn mt vi mch (PSoC-Programmable System on Chip)

3. V phn mm c s c th t n gin cho ti tinh xo, h iu hnh thi gian thc(RTOS-Real Time Operating System).

4. V d mt s HTN


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Phn cng thng mi l cc sn phm nh bo mch HTN y , thit k honchnh v i cng c phn mm h thng (h iu hnh, hay monitor) ci t trongEEPROM, flash, c RAM hay cn c a cng bn dn (DiskOnChip dung lng 32MBhay ln hn), vi d nh dng PC 104 di y:


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TMZ104

PC/104 Computer with Transmeta Crusoe TM5500 CPU

TMZ104 Photo Features:

Low power fanless x86 compatible

Embedded BIOSLinux OS

Watchdog timers

Dual EIDE & floppy support

USB, parallel port,

PS2 keyboard & Mouse

Dual RS-232 serial

Hnh 1.11-Mt s HTN thng mi

Cc loi vi iu khindng bo mch

Cc loi vi x lri thit k THN theo yu cu ng dng:

CPU : Intel 80X51, PIC 12F 675, Amtel 8051, PSoC (Programmable System on Chip) :

CY8C29466c im chung ca cc loi ny l c kin trc y ch trong mt vimch c mc tch hp clnv rt ln (VLSI: Very large Scale Integration).

Bng di y lit k s loi CPU cho HTN t cc hng khc nhau (cha y ):


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1.6KT CHNG

Chng ny gii thiu v HTN t nh ngha, m hnh, phn loi, cc c th v kin trc caHTN. Chng cng nu ra nhng lnh vc cng ngh m HTN c s dng. T cng bt ra

nhngyu cu k thut trn HTN ni chung v HTN cho ng dng ring bit.

Tham kho mt s nh ngha HTN t cc ngun ti liu:

HTN l mt h thng c phn cng c xy dng trn nn tng phn cng my tnh chuynbit vi phn mm c nhng trong phn cng , nh mt trong cc thnh phn quan trngnht ca HTN. HTN do c th l mt h c lp hay l mt phn ca mt h thng ln hn.

Mt s nh ngha v HTN:

Wayne Wolf: what is an embedded computing system ? Loosly defined, it is any device that

includes a programmable computer but is not itself intended to be general-purpose computer

[Computers as ComponentsPrincipal of Embedded Computer System Design].

Told D. Morton: Embedded Systems are electronic systems that contain a microprocessor ormicrocontroller, but we do not think od them as computersthe computer is hidden or embeddedin the system [Embedded Microcontrollers]

Tim Wilmshurst: Embedded system is a system whose primcipal function is not computational,but which is controlled by a computer embedded within it. The computer is liklly to be a

microprocessor or micro controller. The word embedded implies that it lies inside the overal

system, hidden from view, forming an integral part of greater whole [ An Introduction to theDesign of Small Scale Embedded System with PIC, 80c51 and 68HC05/08 Microcontroller]

1.7CU HI CUI CHNG

1) nh ngha tng i v HTN.2) Nhng thch thc no phi i mt khi thit k mt HTN ?3) Nhng cch nu m hnh kin trc ca mt HTN ?4) Th no l HTN kiu vi x lHTN kiu vi iu khin ?

5) Nu cc khi chc nng trong hnh 1.7 m t v m hnh mt HTN.6) C bao nhiu loi kin trc CPU c s dng khi xy dng HTN ? Mi loi khc

nhau im no ch yu ?7) Nu cc thnh phn phn cng thng c trong mt HTN ?8) Cc thnh phn nh bin i tng t-s (ADC), s-tng t (DAC), nh thi

(timer), cng (port) nht thit cn c trn mt HTN ? Ti sao ? 9) C cc loi phn mm no trn mt HTN ?


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Chng 2: Cc thnh phn phn cng ca h thng nhng

35

CHNG 2

CC THNH PHN PHN CNG CA H THNG NHNG

Chng 2 cp ti cc thnh phn phn cng, nn tng c s ca HTN. Bao gm: b x l trung tm (CPU) vi kin trc Von Neumman v kin trc Harvard, BUS ca CPU v BUS hthng, b nh, cng. Tip theo l kthut ghp ni cc thit b ngoi vi vo vi CPU, cc chngtrnh iu khin ghp ni.i vi CPU, ti liu nu nguyn l kin trc, cc c tnh kthut vbiu thi gian hot ng ca CPU, gip cho vic thit k phn cng sau ny. Ring v tp lnhkhng cp ti, do vy khi s dng mt CPU no cn nm c tp lnh ca CPU cth lp trnh, vit cc trnh iu khn bng hp ng.Chng cung cp cc kin thc phn cng v knng thit k, c bit l thit k ghp ni vithit b

Cui chng l mt s bi tp thit k n gin nh thit k b nh ROM, RAM, cng vi CPU,to thnh mt bo mch nh mt HTN cha c cc thit b ngoi.

2.1B X L TRUNG TM (Central Processing Unit-CPU)

Cc h thng s dng k thut tnh ton s x l thng tin u cn mt t hp ccmch s to ra mt h thng c kh nng: thc hin cc php tnh l lun l (logic), cc phpton s hc, cc quyt nh chuyn hng thc hin c hay khng c iu kin v quan trngl hot ng theo mt h m vi lnh (micro-instruction code) theo mt trnh t nht nh. tng to ra mt h thng in t s nh vy chnh l to ra mt b x ltrung tm. B x l

trung tm ngy nay rt tinh xo, kch thc rt nh( ch ln hn 1 cm) nhng cha vi triutransistor, hot ng vi tn s t vi MHz ti vi GHz, cng sut tiu tn t vi Watt ti vichc Watt ,v d: IntelPentium G6950 cng ngh: Clarkdale (32 nm), tn s: 2.8 GHz, Powerdissipation :73 W .

(Theo:http://en.wikipedia.org/wiki/List_of_CPU_power_dissipation#Intel_Pentium_Dual-

Core). i li tc tnh ton t hn 1 t lnh my trong mt giy (MIPS: milions Instructionper second). V d:Intel Core i7 Extreme Edition i980EE:147.600 MIPS at 3,3 GHz , 44.7

lnhmy/chu k xung ng h(vi f=3,3GHz, Tchuk=0,303 ns).

(Theo:http://en.wikipedia.org/wiki/Instructions_per_second).

y l ni ti cc b x lvn nng, dng ch to cc my tnh ( bn, my ch). i vi

cc CPU dng trong thit k cc HTN, tn s lm vic ca CPU c thp hn, c vi chc MHz .Ti sao vy ? n gin khng phi lc no cng cn tc tnh ton tht nhanh, v cn ty vong dng nhng l g. Tt nhin cng nhanh cng tt, nhng i li gi thnh cao, mi trnghot ng khng th tha mn (v d nhit mi trng cao, bi, rung ng c hc ) .
http://en.wikipedia.org/wiki/List_of_CPU_power_dissipation#Intel_Pentium_Dual-Corehttp://en.wikipedia.org/wiki/List_of_CPU_power_dissipation#Intel_Pentium_Dual-Corehttp://en.wikipedia.org/wiki/List_of_CPU_power_dissipation#Intel_Pentium_Dual-Corehttp://en.wikipedia.org/wiki/List_of_CPU_power_dissipation#Intel_Pentium_Dual-Corehttp://en.wikipedia.org/wiki/Gulftown_%28microprocessor%29http://en.wikipedia.org/wiki/Gulftown_%28microprocessor%29http://en.wikipedia.org/wiki/Gulftown_%28microprocessor%29http://en.wikipedia.org/wiki/Instructions_per_secondhttp://en.wikipedia.org/wiki/Instructions_per_secondhttp://en.wikipedia.org/wiki/Instructions_per_secondhttp://en.wikipedia.org/wiki/Instructions_per_secondhttp://en.wikipedia.org/wiki/Gulftown_%28microprocessor%29http://en.wikipedia.org/wiki/List_of_CPU_power_dissipation#Intel_Pentium_Dual-Corehttp://en.wikipedia.org/wiki/List_of_CPU_power_dissipation#Intel_Pentium_Dual-Core


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2.1.1 Cc loi CPU v nguyn l hot ng

Hin nay trn th trng rt nhiu nh sn xut CPU vi nhiu chng loi ph hp cho cc ngdng. C th lit k mt s nt phn bit:

a) Cch t chc v thc hin lnh my:- Vi tp lnh y (CICS).

- Vi tp lnh rt gn (RISC).

b) Cch x l thng tin v truy nhp b nh:

- Von Neumman: b nhchung, truy cp tun t theo tng lnh my.

- Harvard: b nh lnh v b nh d liu c lp, truy cp ng thi.

c)Cng ngh ch to hng ng dng:

- CPU a nng: ch to my tnh a nng

- CPU chuyn dng: cc ng dng c th ( nh cho ng dng nhng). Trong phm tr

ny li c mt vi cng ngh tiu biu: Vi iu khin (microcontroller v PIC-Programmable Intelligent Computer" (Mytnh kh trnh thng minh))

H thng trong mt vi mch lp trnh c (PSoC- Programmable System on

Chip: integrating configurable analog and digital peripheral functions, memory

and a microcontroller on a single chip).

Lp cng ngh ny c s dng ph bin trong cc HTN.

2.1.2 V d v mt CPU v nguyn l hot ng

c th thc hin thit k mt HTN, cn tm hiu chi tit v cu trc, cch lm vic v lp trnhcho mt CPU chn. Phn ny gii thiu dng Intel CPU 808X, 8 bits hay 16 bits, a nng,c lp ca Intel c s dng rt ph bin trn th gii cng nh Vit Nam. u im ni btca CPU ny l tnh ph bin, a nng, d trin khai, cng c pht trin rt a dng v sn c.

a) S hnh thc bn ngoi:

Hnh 2.1-Intel CPU 8085


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b) Kin trc: M hnh chc nng bn trong CPU, v d Intel 8080/8085

8085 l 8-bit microprocessor, trong d liu x ll 8 bits, khng gian a ch c xc nhbi 16 bits, cho dung lng a ch l 65.535 (gi l 64K) nh. Cc thnh phn chc nng bao

gm: Tp cc thanh ghi (Register).

n v thc thi cc php tnh s hc v lun l (Arithmetic logic unit- ALU).

H thng cc dy ni gia cc vi mch chc nng( BUS).

Khi nh thi v iu khin (Timing & Control unit).

Hnh 2.2-Cc khi chc nng ca CPU 8080/8085

1) Tp cc thanh ghi (Registers):Cc thanhg ghi s dng cha d liu v a ch. Co hai loi thanh ghi:

Thanh ghi a nngc dng nh chc nng nh d liu tm thi hay ch tc thi quichiu ti b nh (ROM/RAM). Cc thanh ghi 8 bits l B, C, D, E, H v L. Khi ghp li sthnh thanh ghi 16 bits vi tn kp: BC, DE or HL.Thanh ghi c bit l cc thanh ghi gn cho chc nng c bit (hay chuyn dng):


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- Thanh ghi tch ly (Accumulator (A)): 8 bit dng cha d liu, ton hng, kt quphp ton khi thc hin lnh.

- Thanh m a ch chng trnh (Program counter (PC)): 16 bit cha a ch ca lnhmy tip theo s c th hin.

- Thanh ghi ch s (Index register): c dng lm ch s cho qui chiu a ch, cchdngph thuc vo ch a ch ha.

- Thanh ghi trng thi (Status register): ghi li trng thi cua CPU sau khi thc hin milnh s hc, logic gm: carry, auxiliary carry, sign, zero and odd/even parity.

- Thanh ghi ngn xp (Stack pointer): 16 bit s dng qui chiu vo vng nh ngnxp.

- Thanh ghi lnh my (Instruction register): 8 bit cha m lnh (OPCODE) tROM/RAM, u vo cho khi Timing&Control gii m thnh cc tn hiu iukhin ca CPU.

2)n v thc thi cc php tnh s hc v lun l(ALU):Thc hin cc php tnh: Cng, tr, nhn, chia, logis AND, OR, XOR, NOT, dch tri/phi,

quay vng tri/phi.3) H thng cc dy ni gia CPU vi cc vi mch chc nng, thit b ngoi (BUS) (Hnh1.1.1-M hnh tng qut bo mch ch)

Tp hp cc tn hiu pht ra t CPU v ni ti cc vi mch chc nng trn bo mch chnh. m t ngha ca tng tn hiu ta nhm li theo chc nng nh sau:

a) BUS ach (Address bus): Mang thng tin v da ch qui chiu ti ROM/RAM,b gii m chn vi mch. Vi CPU 8080/8085 c tt c 16 ng hay 16 bit. BUS ny

chc mt hng(chiu) i ra t CPU.b) BUS d liu (Data bus) : D liu trao i gia CPU v cc vimch bn ngoi,cc thit b ngoi s dng BUS ny. Ty loi CPU c th l 8 bit, 16 bit, 32 bit, 64 bit.S bit ny thng dng ni ti loi CPU. c im c bn ca BUS l hai chiu.

c) BUS iu khin (Control bus): Cc tn hiu iu khin pht ra t CPU ti cc vi

mch chc nng khc nhau trn bo mch ch, cc thit b ngoi ni vi CPU. Cc tnhiu ny c dng ng b mi bc hot ng ca my tnh.

4)nh thi v iu khin:Khi ny to ra tt c cc tn hiu ng h, cc tn hiu iu khin bn trong CPU, CPU vi

bn ngoi qua Bus iu khin (Control bus).c) B nh (Memory)

Chng trnh ng dng, h iu hnh, d liu, ngn xp u dng chung khng gian nh. Vi h8080/8085 c 16 dy a ch (A15 ... A0) cho dung lng nh ti a l 65.535 a ch nh.Nu mi nh l 1 byte s c 65.535 byte hay 64 KB.

Kin trc s dng 64 bytes u tin (000F-0000) t cc vector ngt ca cc lnh RST.

d) Ngt (Interrupts)


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CPU 8085 c 5 u vo tn hiu ngt (interrupt), trnh by theo th t u tin t thp n cao:

INTR,che c. Khi c ngt xut hin, CPU s tm lnh trn BUS, lnh c th l trong cclnh RESTART (u c hiu lc khi ng li CPU) loi RST (RST 5.5, RST 6.5, RST 7.5 vTRAP). CPU bo lu gi tr ca PC vo ngn xp, chuyn ti nh c gi tr N*8, trong N c

gi tr t 0 n 7 m lnh RST cung cp. nh ny cha a ch ca chng trnh x l cho ngt nh sau:

Tn ca ngt a ch chng trnh khi ng ti:

TRAP 24 Hex

RST 5.5 2C Hex

RST 6.5 34 Hex

RST 7.5 3C Hex (u tin cao nht, tc dng sn ln ca xung ngt)

Lnh gi CALL (lnh c 3 byte ). CPU gi mt chu trnh con c a ch xc nh byteth 2 v th 3 ca lnh ny.

RST5.5, che c. Khi c ngt ny, CPU bo lu gi tr ca PC vo ngn xp, nhy ti a chc nh 002Ch (h-hexadecimal).

RST6.5, che c. Khi c ngt ny, CPU bo lu gi tr ca PC vo ngn xp, nhy ti a chc nh 0034h.

RST7.5che c. Khi c ngt ny, CPU bo lu gi tr ca PC vo ngn xp, nhy ti a ch

c nh 003Ch.

Trap, khng che. Khi c ngt ny, CPU bo lu gi tr ca PC vo ngn xp, nhy ti a ch cnh 0024h.

Tt c cc ngt che c c th lp khng che hay che lp trnh qua lnh EI v DI. RST 5.5,

RST6.5 v RST7.5 lp trnh bng lnh SIM.e) Cng vo/ra (I/O ports)H 8080/8085 c tt c 256 cng vo v 256 cng ra chy theo lnh IN hay OUT.

f) Thanh ghi (Registers)

ACC (Accumulator) hay A, l thanh ghi 8-bit, a dng cho cc thao tc v cc phptnh s hc, lun l, I/O, np/ nh d liu.

C (Flag), l thanh ghi 8-bit, cha cc bit c ngha sau:

Sign, ln 1 nu bit ln nht ca kt qu php tnh c gi tr = 1.

Zero, lp gi tr = 0, nu kt qu php tnh = 0.

Auxiliary carry, vi php tnh 4 bit (D3-D0), ln 1 nu kt qu php tnh c s mangt D4 chuyn sang D4.

Parity, ln 1 nu sparity (l tng ca cc bit trong kt qu) l s chn.

Carry, ln 1 nu c s mang khi thc hin php cng s hc hay borrow khi thchin php tr s hc hay php so snh gi tr.

Thanh ghi a nng (General registers )

8-bit B v 8-bit C hay kt hp thnh cp 16-bit.


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8-bit D v 8-bit E hay kt hp thnh cp 16-bit.

8-bit H v 8-bit L hay kt hp thnh cp 16-bit.

Cc thanh ghi ny dng c lp hay kt hp cha d liu hay a ch qui chiu vo b nh(ch da ch ha gin tip qua thanh ghi).

Con tr ngn xp (Stack pointer), 16 bit. Thanh ghi ny mi ln tng hay gim 2 (+/-2).

Thanh m chng trnh (Program counter), 16-bit, tr trc tip vo b nh ni cha

m lnh ca mi lnh.

g) Tp lnh (Instruction Set)Tp lnh ca CPU Intel 8085 gm cc nhm sau y:

- Lnh chuyn d liu.

- Lnh s hc cng, tr, tng, gim.

- Logic - AND, OR, XOR v quay vng.

- Chuyn iu khin i c/khng iu kin, gi chu trnh, tr v ch ckhi thot khi chutrnh, khi ng li.

- Lnh vo/ra (I/O).

- Cc lnh thao tc bit, c, cho php/khng cho php ngt, ngn xp,

h) Ch a ch (Addressing modes)- Kiu thanh ghi:qui chiu d liu trong 1 thanh ghi hay i thanh ghi.

- Gin tip qua thanh ghi:Thanh ghi cha a ch o nh ni c d liu.

Qui chiu trc tipD liu 8 hay 16 bit.

i) Cc nhm tn hiu trong CPU 8080/8085

A8A15.Nhm tn hiu ra: 8 bit cao ca a ch, cc chn ny l cc chn c ni vi bnngoi qua mch 3 trng thi. Cc phn t 3 trng thi s c t trng thitrng thi tr khng cao(cn gi l trng thi khng kt ni) trong cc trng hpmt trong cc tn hiu HOLD hay HALT l tch cc.

AD0AD7.Nhm tn hiu dn knh cho cc tn hiu a ch v tn hiu d liu theochia sthi gian, 3 trng thi. giai on u ca chu k my, T1 ca M1, s l byte thpca 16 bit a ch t A0 n A7.

ALE (Address Latch Enable). Tn hiu ra qua mch 3 trng thi. c s dng cht bytethp ca tn hiu a ch (A0 A7) t nhm AD0-AD7. Tn hiu ny c to ra

trong giai on u tin ca chu k my, T1 ca M1, v cng c dng chtcc tn hiu trng thi S0 v S1 khi cn thit.

S0, S1 (Data BUS Status). L cc tn hiu ch trng thi ca cc chn thuc BUS d liutrong mi chu k my. T hp ca hai tn hiu ny cng cho bit trng thi caCPU nh sau:

S1 S0 Trng thi hot ng ca BUS d liu

0 0 Trng thi HALT


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0 1 CPU ang thc hin thao tc WRITE

1 0 CPU ang thc hin thao tc c (READ)

1 1 CPU ang thc hin thao tc nhn lnh (Instruction Fetch)

RD (Read). Chn ra 3 trng thi. Nm trong nhm tn hiu iu khin. Tn hiu tch cc khiCPU tin hnh c d liu t b nh hoc t thit b ngoi vi. Trong ch HALT hoc DMA, chn ra ny trng thi trng thi tr khng cao.

WR (Write). Chn ra 3 trng thi. Nm trong nhm tn hiu iu khin. Tn hiu tch cc khiCPU tin hnh ghi d liu vo b nh hoc a d liu ra thit b ngoi vi. Trongcc ch HALT hoc DMA, chn ra ny trng thi trng thi tr khng cao.

IO/M. Trng thi logic ca u ra ny cho bit CPU ang lm vic vi thit b ngoi vi hayvi b nh. Nu l logic 1, CPU ang truy cp thit b vo/ra, cn nu l 0, CPUang truy cp b nh. Kt hp vi hai u ra RD v WR to ra cc tn hiu

I/OR, I/OW, MEMR, v MEMW trong trng hp s dng a ch tch bit ivi thit b vo/ra. Nm trong nhm tn hiu iu khin, IO/M cng l u ra 3trng thi.

Interrupts. P8085 c ngt a mc. C 5 chn ngt tt c: (INTR, RST5.5, RST6.5, RST7.5v TRAP). Ngoi chn ngt khng che c l TRAP, cc chn khc u c thche hoc khng che nh lp trnh phn mm.

INTR: Chn nhn yu cu ngt t bn ngoi, c p ng theo nguyn tc quay vng(polling) hoc vector thng qualnh RST

Cc yu cu ngt RST: C 3 u vo yu cu ngt vi cc mc u tin khc nhau

l RST7.5, RST6.5 v RST5.5. Khi yu cu ngt xut hin ti cc chn ny, CPUt ng chuyn n cc vector ngt tng ng. C th nh sau:

RST5.5 l mc u tin thp nht, phn ng theo mc in p trn chn yu cungt, a ch vector ngt ny nm nh c a ch 2CH.

RST6.5:Ngt u tin thp th 2, phn ng theo mc in p trn chn yu cungt, a ch vector ngt ny nm nh 34H

RST7.5: Mc u tin cao nht. Phn ng theo sn ln ca xung yu cu ngt.Sn ln ca xung ny tc ng ln mt Flip-Flop, mch ny gi li yu cu ngtcho n khi c xo nh tn hiu p ng nhn bit yu cu ngt (Acknowledge).

a ch ca vector ngt ny nm nh 3CH- TRAP: L chn nhn yu cu ngt khng che c (d nhin l n c mc utin cao nht). a ch ca vector ngt ny nh 24H.

INTA. Tn hiu ra nhn bit yu cu ngt ti chn INTR. Cc yu cungt RST5.5, RST6.5,RST7.5 v TRAP khng tc ng n INTA.

HOLD. Trng thi logic 1 chn ny l yu cu ca thao tc DMA. Cc u ra RD, WR,IO/M v ALE s c a v trng thi tr khng ra cao.


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HLDA. Tn hiu nhn bit yu cu HOLD.

RESET IN. Logic thp 0 u vo ca chn ny yu cu ti khi ng h vi x l. Do tcng ca tn hiu RESET IN tch cc, gi tr ca thanh m chng trnh PC s c np li

l 0000h. Cc mt n ngt v tn hiu HLDA cng c ti thit lp v gi tr mc nh.

RESET OUT. u ra nhn bit h vi x lc ti khi ng. Dng tn hiu ny ti khing ton b h thng.

READY. Logic 1 u vo ny thng bo trng thi sn sng cung cp d liu choCPU hoc nhn d liu t CPU ca cc thit b ngoi vi.

SID (Serial Input Data). L cng vo ca d liu ni tip ca h Vi x l. Bit hindin ti cng ny c c vo CPU nh lnh RIM, bit s c a vo bit cao ca Acc(MSB).

SOD (Serial Output Data). Bit cao (MSB) ca Acc c truyn ra ngoi chn ny khi sdng lnh SIM.

X1, X2. Li ni thch anh hoc mt mch dao ng to xung nhp cho CPU. C th sdng thch anh c tn s dao ng trong khong t 0.5 n 3MHz.

CLK. u ra ca xung nhp, c th lm xung nhp cho cc thnh phn chc nng khc trongh vi x l.

Vcc, Vss. Li ni ngun +5V v GND cho CPU 8085. Cng cn nhc li rng, CPU 8085 chcn mt ngun nui duy nht l +5V, khnng cung cp dng ca ngun cn c thit ktu theo nhu cu ca ton h vi x l.

j) Biu thi gian (system timing)

Khi thit k phn cng ca mt HTN ni ring hay mt thit b kthut s ni chung, khinim v biu thi gian l ht sc quan trng. Nm bt c ngha ca biu thi gians c ch khi tin hnh hiu chnh v tm li phn cng. Li phn cng thng xy ra khi cctn hiuhot ng khng ng thi im u vo mch s, gy ra li, t bit hay xy ra cc mch t hp. Di y l mt s nh ngha cc b x l:

Trng thi my: T (machine State): c nh ngha l thi gian ca mt chu k xungng h h thng (CPU Clock-out). V du nu Clock-out=10 Mhz, th T=200ns. Ccsn xung ln/xung c s dng bn trong CPU cho cc thao tc khc nhau.

Chu k my (hay chu k BUS): M (machine cycle): L tp hp ca mt s cc T

CPU hay mt vi mch ( nh DMAC 8237) khi nm quynkimsot BUS h thng,thc hin xong mt thao tc (mt phn ca qu trnh gi ra hay c vo mt d liu)trn BUS h thng.

Chu k lnh: (Instrution cycle): l tp cc M cn thit hon thnh mt lnh my.


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Hnh sau y m t thc thi ca lnh STA cua CPU Intel 8085: Ct ni dung trongthanh ghi ACC ca CPU v nh tr trc tip bi 2 byte tip theo ca lnh: ([byte 3],

[byte 2])


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Fetch), CPU gi ra cc tn hiu IO/M, S1 v S0 (tng ng 0, 1, 1 trn biu thi gian) xcnh thao tc ca chu k.

Hnh 2.4-Lu thigian c s ca CPU8085 (Theo ti liu ca hng Intel)

CPU cng ng thi gi 16 bit a ch ra chu k my u tin, ngay t nhp u tin (T1) xc nh nh hay thit b I/O. Phn a ch byte thp t trn AD7-AD0 (Program Counter Lowbyte-PCL) ch tn ti trong thi gian 1 nhp nn cn phi c cht li nh tn hiu ALE mccao. Cn phn a ch byte cao t trn A16-A8.

Khi D7 D0 n nh trn cc dy d liu, CPU gi tn hiu RD. Khi nhn c d liu,RD chuyn ln mc cao cm v tr nh hay thit b I/O.

S lng chu k my v trng thi cn cho thc hin mt lnh l c nh, song s lng ny kh cnhau i vi cc lnh khc nhau, tu theo di ca t lnh (1 byte, 2 bytes, 3 bytes). S lngchu k my ph thuc vo s ln CPU phi lin lc vi cc phn t khc trong h thng, ch yul vi cc chip khc.


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Hnh 2.5-Biu thi gian ca chu k tm lnh.

2.2CPU 8085 V H THNG BUS

Vic u tin trong thit k mt HTN l la chn CPU v hnh thnh BUS h thng trc khi mrng vi cc thnh phn khc nh ROM, RAM v cc cng ghp ni. Tip tc vi t duy s dngh Intel 808X, ta s thit k h thng BUS nh sau:

c im ca cc chn/tn hiu pht ra t CPU: Nh trn lit k, CPU a ra 3 tp hptn hiu chnh, bao gm:

- Tp tn hiu a ch trn cc chn AD7 AD0 v A8A15, trong AD7AD0l cc chn 2 chc nng : Lc (M1, T1) l a ch phn thp, sau l d liu.Do to ra 16 ng a ch ta cn cht cc gi tr ny li vi h trca tnhiu ALE (Address Latch Enable) vi vi mch SN74373. Tp hp ny to thnh

BUS a ch.- Tp cc chn dliu AD7 AD0 cc chu ki M/T tip theo ca chu k lnh. Tphp ny to thnh BUS d liu. BUS d liu c rng khc nhau theo loi CPU,c th l 4, 8, 16, 32, 64, hay trn mt loi BUS c bit chung ghp ni vo vimch ng x l (ChipSet), gi l BUS pha trc (Front Side Bus-FSB) cc mtPC hin i, rng co th ln 128, 256 hat 1024 bit.

- Tp cc tn hiu iu khin pht ra t CPU, l BUS iu khin.


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- Do cn ghp ni vi cc thit b bn ngoi, cn mt BUS khc gi l BUS hthng m rng, v du: ISA, EISA, v ph bin l PCI. Cc BUS ny cn cnh ngha tng minh v c giao thc hot ng rt phc tp.

ng h thchanh nhp chun

Ngun nui mtchiu

D7

D0

A8

A15

A0

A7

A15

A8

ALE

AD0

AD7

STB

A7

A0

L

a

t

c

h

RD/

WR

IO/M

INTA

Address BUS

DATA BUS

Control BUS

CPU 8085

Hnh 2.6- Cu hnh ti thiu: CPU 8085 v to BUS h thng

Do chc nng ca BUS l truyn thng tin gia cc thnh phn hp thnh ca my tnh v do c vai tr rt quan trng nh hng ti hiu nng ca my tnh, nn i khi phi xem xt timt khi nim v thng lng ca BUS(nh bt k loi thit b truyn thng tin no). l gitr v lng d liu ti a c chuyn qua BUS trong mt khon thi gian no , thng thngqui theo CPU clock (hay chu k lnh):

Tc truyn ti a =Tc BUS (MHz) x s byte mt ln truyn

S chu k Clock cho mt ln truyn

2.2.1 Khi nim v bn cht vt l ca cc BUS

Hot ng ca mt h kthut sthc cht l vic trao i v x l cc gi tr nh phn gia ccthnh phn, cc khi v cc mch vi in t trong ton b h thng. Nh bit, cc gi tr nhphn (hoc 0 hoc 1) c th hin qua mc in p so vi mt chun nht nh, v d chunTTL(transistor-transistor logic) gi tr 0 tng ng vi mc in p thp (t 0V n +0,8V) v


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gi tr 1 tng ng vi mc in p t khong +3V n +5V. biu din mt s liu nh phn,cc phn t mang thng tin c lin kt k nhau theo nhm (v d 1byte l 8 bits). m nhncng vic di chuyn cc d liu ny trongton b h thng, c cc ng dy truyn dn in

c ghp song song thnh h thng, mi dy truyn dn dnh ring cho 1 bit. Tp cc ng

truyn dn dnh ring cho cc tn hiu c cng chc nng(d liu, a ch, iu khin v trngs(2n)) c gi l BUS. BUS gii quyt mt vn kthut c s quan trng l: ni c hai ura ca hai mch in t khc nhau m khng lm cho u ra no b hng. Yu t c bn y lcc u ra phi c iu khin bng chng trnh my tnh a u ra ca vi mch vo mttrong hai ch lm vic c bit(hay gi l trng thi) sau: hot ng bnh thng, ti nnglng ln dy kt ni v trng thi khng hot ng v c tr khng u ra cao (Tri-state) khng on mch u ra ca vi mch kia. Lm cnh vy tn hiu s i c c hai chiu trncng mt dy ni. V h qu l gim i mt na cc chn ni ra/vo ca vi mch s.

Nh vy, trong mt h my tnh BUS c mt s tiu ch sau y:

- BUS phi tun theo 1 chun no . Tp cc quy tc ca chun cn c gi l giao thcbus (bus protocol)

- C th c nhiu loi bus khc nhau c s dng, cc bus ny ni chung l khng tngthch vi nhau.

- Bus thng phn loi theo 3 cch sau:

Theo t chc phn cng

Theo giao thc truyn thng ( bus ng b v khng ng b)

Theo loi tn hiu truyn trn bus :

BUS d liu,l BUS hai chiu, c trng thi tr khng cao.

BUS a ch: l BUS mt chiu v thng thng a ch pht sinh ra tCPU. Tuy nhin phi c kh nng trng thi tr khng cao khi cn thit.

BUS iu khin, cc tn hiu iu khin t CPU hay vi mch chc nngkhc..

Cc BUS ny hp li thnh BUS ca CPU.

BUS ca CPU thng c ti u ra yu, nn BUS ny c khuych i ,cn c CPU Clock_out (hay BUS Clock) to thnh BUS h thng. S khc nhaul ch:

BUS ca CPU: i ra trc tip t CPU

BUS dn knh

BUS h thng: Khng ni trc tip vo

CPU, m qua khuych iBUS

Khng cn dn knh, ccBUS tch bit

Ph ti ln hn


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C BUS Clock trn BUS

Hnh 2.7-CPU Bus v BUS h thng

T khi nim trn, d dng suy ra bn cht vt l ca cc BUS trong mt h my tnh: l ccng truyn dn in, c th di cc dng cp nhiu si, ng dn trong cc bng mch inv.v Kh nng v cht lng dn in ca cc ng truyn dn ny ng vai tr quan trng vquyt nh i vi hot ng ca mt h my tnh. ng truyn dn km, in tr thun cao cth gy ra s suy gim ca tn hiu in dn n cc hin tng mt hoc sai d liu. BUS l

ng dn in ni b m theo cc tn hiu c truyn t b phn ny n cc b phn khctrong h my tnh.

2.2.2 Khuych i BUS (bus driver)

Tn hiu pht sinh t CPU thng c cng sut thp ch cho mt s ti danh nh (fan-

out), khng m rng BUS, nht l khi bus kh di v c nhiu thit b ni vi n. Chnh vth m hu ht cc BUS c ni mt s vi mch khuych bus (bus driver), v c bn l ccvi mchkhuych i tn hiu s. Hu ht vi mch khc ni vi BUS qua vi mch u vo (bus

receiver). i vi cc thit b khi th ng vai tr a tn hiu ln BUS (master), khi th ng vaitr nhn tn hiut BUS (slave), ngi ta s dng mt vi mch kt hp c kh nng pht ra vnhn v, gi l vi mch pht v thu tn hiu (bustransceiver). Cc chip ny ng vai tr ghp ni

v l thit b 3 trng thi, cho php n c th trng thi th 3 tr khng cao. Cc vn quantrng nht lin quann thit k bus l: xung ng h bus (clock bus: s phn chia theo thigian, hay cn gi lbus blocking), c ch trng tibus (bus arbitration), x l ngt v x l li.


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Cc bus c th c chia theo giao thc truyn thng thnh hai loi ringbit l bus ng b vbus khng ng b ph thuc vo vic s dng clockbus.

2.2.3 Bus ng b (Synchronous bus):

Bus ng b c mt tnhiu trn ng dyBUS clockdng sng vung, vi tn s vd, trong khong vi MHz GHz. Mi hot ng bus xy ra u qui chiu vo BUS Clock,trong mts nguyn ln chu k ny v c gi l chu k bus.Hnh sau gin thi gian camt bus ng b vi tn s xung BUS clock l 4MHz, nh vy chu k bus l 250ns. Gi s c 1byte t b nh chim 3 chu k bus (750ns), tng ng vi T1, T2, T3 nh hnh v. V tt c ccbng bn dn khi chuyn mc khng phi l tc thi, m c qu v mt mt khon thi gian,nn trn hnh v c cc sn xung, ta gi s cc sn xung ko di 10ns. Con s ny rt quan

trng khi thit k mch kthut s !

Hnh2.8-Chu k c ng b

T1bt u bng cnh dng ca xung clock, trong mt phn thi gian ca T1, vi x l t ach bytecn c ln bus a ch. Sau khi tn hiu a ch c xc lp, vi x l t cc tn hiuMREQ v RD tch cc mc thp, tn hiu MREQ (Memory Request) - xc nh truy xut b nhch khng phi thit b I/O, cn tn hiu RD - chn c ch khng phi ghi d liu.

T2: thi gian cn thit b nh gii m a ch v a d liu ln busd liu. T3: ti cnh m ca T3, vi x l nhn d liu trn bus d liu, cha vo thanh ghi bn trong vix l v cht d liu. Sau vi x l occ tn hiu MREQ v RD.Nh vy thao tc c hon thnh, ti chu k my tip theo vi x l c th thc hin thao tc khc. Cc gi tr c th vthi gian ca hnh v trnc th c gii thch chi tit nh sau:


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TAD: TAD


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TDS Thi gian thit lp d liu trc sn

xung ca tn hiu xung clock( tn hiu

ng h)

50

TMH Thi gian tr ca MREQ b so vi sn

xung ca tn hiu ng h T3

85

TRH Thi gian tr ca RD b so vi sn

xung ca tn hiu ng h T3

85

TDH Thi gian lu tr d liu t lc o tn

hiu RD b

0

Truyn theo khi:

Ngoi cc chu k c/ghi, mt s bus truyn d liu ng b cnh tr truyn d liu theo khi.Khi bt u thao tc c khi, vi mch lm ch bus (bus master) bo cho vi mch khc (slave)bit s byte cn c truyn i, th d truyn con s ny i trong chu k T1, sau ng ltruyn i 1 byte, slave a ra trong michu k 1 byte cho ti khi s byte c thng bo.Nh vy, khi cd liu theo khi, n byte d liu cn n+2 chu k clock ch khng phi 3n chuk.

Mt cch khc cho truyn d liu nhanh hn l gim chu k. vd trn: 1 byte ctruyn i trong 750ns, vy bus c tc truyn1.33MBps. Nu xung clock c tn s 8MHz, thigian 1 chu k ch cn mtna, tc s l 2.67MBps. Tuy nhin, gim chu k bus dn n khkhnv mt k thut, cc tn hiu truyn trn cc ng khc nhau khng philun c cng tc, dn n hiu ng mo dng tn hiu. iu quan trng l thi gian chu k phi di hn so vis tn ti ca mo dng tn hiu trnh vic nhng khong thi gianc s ho li tr thnhcc i lng bin thin lin tc.

2.2.4 Bus khng ng b (Asynchronous bus)

Bus khng ng b khng s dng xung BUS clock, chu k ca n cth ko di tu v c th

khc nhau i vi cc cp thit b khc nhau, gi l i thoi tun t bi cc tn hiu iu khin.Lm vic vi cc bus ng b d dng hn do n c nh thi mt cch gin on , tuy vychnh c im ny cng dn n nhc im. Micng vic c tin hnh trong khong thigian l bi s ca xung clock,nu 1 thao tc no ca vi x l hay b nh hon thnh trong 3,1 chu k th n cng s phi ko di trong 4 chu k. Khi chn chu k bus v xy dng bnh, I/O card cho bus ny th kh c th tn dng nhng tin b ca cng ngh. Chng hn saukhi xy dng bus vi s nh thi nh trn, cng ngh mi a ra cc vi x l v b nh c


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thi gian chu k l 100nsch khng cn l 750ns nh c, th chng vn chy vi tc thpnh ccvi x l, b nh loi c, bi v giao thc bus i hi b nh phi a cd liu ra vn nh trc thi im cnh m ca T3. Nu c nhiu thitb khc nhau cng ni vi 1 bus,trong c th c mt s thit b hotng nhanh hn hn cc thit b khc th cn phi t bushot ng phhp vi thit b c tc thp nht. Bus khng ng b ra i nhm khc phcnhng nhc im ca busng b. Trc ht master pht ra a ch nh m n mun truy cp,sau pht tn hiu MREQ b tch cc xc nh cn truy xut b nh. Tn hiu ny cn thitkhi b nh v cc cng I/O s dng chung min a ch.Sau khi pht a ch, bn master cngphi pht tn hiu RD tch cc bnslave bit rng master s thc hin thao tc c ch khngphi ghi.Cc tnh hiu MREQ b v RD b c a ra sau tn hiu a ch mtkhong thigian ph thuc tc hot ng ca master. Sau khi 2 tn hiuny n nh, master s pht ra

tnh hiu MSYN (master synchrization) mc tch cc bo cho slave bit rng cc tn hiucn thit sn sngtrn bus, slave c th nhn ly. Khi slave nhn c tn hiu ny, n s thc hin cng vic vi tc nhanh nht c th c, a d liu ca nhc yu cu ln bus d

liu. Khi hon thnh slave s pht tn hiuSSYN (slave synchronization) tch cc.

Hnh 2.9-BUSkhng ng b, hot ng ng b bi i thoi giacc tn hiu iu khin.

Master nhn c tn hiu SSYN tch cc thxc nh c d liu caslave sn sng nn

thc hin vic cht d liu, sau o cc nga ch cng nh cc tn hiu MREQ, RD, vSSYN. Khi slave nhn ctn hiu MSYN khng tch cc, n xc nh kt thc chu k v otn hiu SSYN lm bus tr li trng thi ban u, mi tn hiu u khng tch cc, ch busmaster mi. Trn gin thi gian ca bus bt ng b, ta s dng

mi tn th hin nguyn nhn v kt qu MSYN tch cc dn n vic truyn d liu ra busd liu v ng thi cng dnn vic slave pht ratn hiu SSYN tch cc, n lt mnh tn

hiu SSYN li gy ra s o mcca cc ng a ch, MREQ b, RD b, v SSYN. Cui


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cng s o mcca MSYN li gy ra s o mc tn hiu SSYN v kt thc chu k. Tp cctn hiu iu khin phi hp vi nhau nh vy c gi l kt ni hon ton (full handshake),ch yu gm 4 tn hiu sau:

MSYN tch cc.

SSYN b tch cc p li tn hiu MSYN.

MSYN c o p li tn hiu SSYN b (tch cc).

SSYN b c o p li tnh hiu MSYN khng tch cc.

Ta c th nhn thy bt tay ton phn l c lp thi gian, mi s kin c gy ra bi 1 s kintrc ch khng phi bi xung BUS clock. Nu 1 cp master-slave no hot ng chm thcp mas

xay dung cac he thong nhung v4-8.2011-bcvt

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