2014 ieee international test conference low …...2014 ieee international test conference 2/41...
TRANSCRIPT
Low-Distortion
Signal Generation
for ADC Testing Fumitaka Abe, Yutaro Kobayashi
Kenji Sawada, Keisuke Kato
Osamu Kobayashi, Haruo Kobayashi
Gunma University
STARC
2014 IEEE International Test Conference
2/41
Research Objectives
• Use an Arbitrary Waveform Generator (AWG)
as low-cost low-distortion signal source
for ADC testing
• Validate our 3rd-harmonic-cancelling
phase-switching signal generation technique
• Perform analysis, simulation, and experiments
using AWGs for ADC testing
3/41
Expected Advantage of Our Solution
𝐟𝒊𝒏
100kHz 𝟑𝐟𝒊𝒏
𝟑𝟎𝟎𝐤𝐇𝐳
Freq.
Filter A
𝐟𝒊𝒏
300kHz 𝟑𝐟𝒊𝒏
𝟗𝟎𝟎𝐤𝐇𝐳
Freq.
Filter B
𝐟𝒊𝒏
100kHz
𝟏
𝟐𝐟𝐬 − 𝐟𝒊𝒏
𝟏𝟒𝟎𝟎𝐤𝐇𝐳
Freq.
Filter C
𝐟𝒊𝒏
300kHz
𝟏
𝟐𝐟𝐬 − 𝐟𝒊𝒏
𝟏𝟐𝟎𝟎𝐤𝐇𝐳
Freq.
Filter C
Conventional Method Tough LPF requirements
Our Method Relaxed LPF requirements
𝟏
𝟐𝐟𝒔
1500kHz
𝟏
𝟐𝐟𝒔
1500kHz
𝟒𝟎𝐝𝐁 𝟒𝟎𝐝𝐁
𝟏𝟎𝐝𝐁
4/41
Outline
• Background to this research
• Proposed solution
• Problems with proposed solution
• Remedy 1
• Remedy 2
• Experimental results
• Conclusions
5/41
Outline
• Background to this research
• Proposed solution
• Problems with proposed solution
• Remedy 1
• Remedy 2
• Experimental results
• Conclusions
6/41
Background to this Research
• ADCs are important part of mixed-signal SOCs.
• Need a low-cost, low-distortion signal source
for ADC linearity testing.
• #1: Use existing AWGs in testers low cost
• # 2: Develop a technique that doesn’t require
identification of AWG nonlinearity,
just a DSP program change.
7/41
Freq.
ADC HD3
Freq.
“No Go”
“Go”
Freq.
Reference level
Allowable
fundamental
Freq.
Test result
ADC HD3 measurement
ADC linearity test
ADC Testing with Sine Signal
fundamental
AWG ADC
ADC test signal
8/41
Problem with Conventional Method
fundamental
Freq.
Freq.
AWG HD3+ADC HD3
fundamental HD3
Test result
AWG HD3
ADC HD3 cannot be
measured accurately.
Low quality test
AWG ADC
Test signal
Generation
ADC test signal
9/41
Research Objective
AWG ADC
Test signal
Generation
fundamental
Freq.
ADC test signal
Freq.
Only ADC HD3
fundamental
HD3
ADC test result
AWG HD3 reduction
High quality test
only
program
change
10/41
Outline
• Background to this research
• Proposed solution
• Problems with proposed solution
• Remedy 1
• Remedy 2
• Experimental results
• Conclusion
11/41
AWG
DAC
CLK
DSP
Conventional Signal Generation with AWG
X X X X
Din
Din
A
0 0.1 0.2 0.3 0.4 0.5
-300
-200
-100
0P
ow
er
[dB
]
Normalized frequency f/fs
AWG sampling frequency: fs(AWG) = 1/Ts
DAC has 3rd order nonlinearity
fin
3fin
12/41
AWG
DAC
CLK
DSP
Proposed Signal Generation with AWG
X0 X1 X0 X1
Din
Din
𝐗𝟎 = 1.15Acos(2πfinnTs − π/6)
𝐗𝟏 = 1.15Acos(2πfinnTs + 𝜋/6)
Θ = π/3
0 0.1 0.2 0.3 0.4 0.5
-300
-200
-100
0
Pow
er
[dB
]
Normalized frequency f/fs
HD3 is cancelled
fs/2-fin
fs/2-3fin fin
13/41
Co
nve
nti
on
al
Ph
as
e S
wit
ch
ing
Θ = π/3 3Θ = π
Principle of 3rd Harmonics Cancellation
3rd
ord
er
non
-lin
ear
syste
m
Phase r
ota
tion b
y x
3
Two waves with phase difference π
are cancelled
fundamental: fin 3rd harmonics: 3 fin
14/41
Conventional and Phase Switching Signals
Time [sec]
Vo
lta
ge
[V
]
Frequency [kHz]
3rd harmonic Po
wer
[dB
m]
fundamental:9.0dBm
HD3:-68.0dBm
Frequency [MHz]
Waveform Measured Power Spectrum
3rd harmonic
1V
fs/2-fin :-0.91dBm
Frequency [kHz]
3rd harmonic Po
wer
[dB
m]
fundamental:9.0dBm
HD3:-78.2dBm
Frequency [MHz]
Time [sec]
Vo
ltag
e [
V]
Waveform
3rd harmonic
π/3
1.15V
Conventional
Phase Switching
15/41
Outline
• Research background
• Proposed solution
• Problems of proposed solution
• Remedy 1
• Remedy 2
• Experimental results
• Conclusion
16/41
0 0.1 0.2 0.3 0.4 0.5-400
-300
-200
-100
0
Normalized Frequency f/fs
Pow
er
[dB
]
0 0.1 0.2 0.3 0.4 0.5-400
-300
-200
-100
0
Normalized Frequency f/fs
Pow
er
[dB
]
0 0.1 0.2 0.3 0.4 0.5-400
-300
-200
-100
0
Normalized Frequency f/fs
Pow
er
[dB
]
0 0.1 0.2 0.3 0.4 0.5-400
-300
-200
-100
0
Normalized Frequency f/fs
Pow
er
[dB
]
0 0.1 0.2 0.3 0.4 0.5-400
-300
-200
-100
0
Normalized Frequency f/fs
Pow
er
[dB
]
0 0.1 0.2 0.3 0.4 0.5-400
-300
-200
-100
0
Normalized Frequency f/fs
Pow
er
[dB
]
3rd
nonlinearity 3次
非線形
Phase
switching
Conventional
Input signal
cancellation cancellation cancellation
generation generation generation
Conditions of HD3 Cancellation in Cascaded System
3rd
nonlinearity
3rd
nonlinearity
17/41
Problem of Phase Switching Signal Generation
ADC
fundamental
Freq.
fundamental
Freq.
HD3
HD3 due to
ADC nonlinearity
Nonlinearity Model
ADC
Reduction of HD3
due to ADC nonlinearity
fundamental
Freq.
fundamental
Freq.
HD3
Reduction of HD3
due to AWG nonlinearity
Spurious
due to phase switching
Big problem !
Ideal
Phase
switching
18/41
Model for Theoretical Analysis
n: odd
n: even
AWG Input with Phase Switching
AWG Nonlinearity Model
ADC Nonlinearity Model
AWG ADC w/o LPF
For simplicity
fs(AWG)=fs(ADC)
19/41
AWG Output
signal
spurious
small
large
20/41
Direct Application of Phase Switching Signal
: :
ADC output Z(n) components
By calculation
CANNOT measure ADC HD3.
signal
HD3
21/41
Outline
• Research background
• Proposed solution
• Problems of proposed solution
• Remedy 1
• Remedy 2
• Experimental results
• Conclusion
22/41
AWG Output and Low Pass Filtering
LPF AWG ADC w/ LPF
23/41
Application of Phase Switching and LPF
: :
ADC output Z(n) components
By calculation
ADC HD3 can be measured.
signal
HD3
24/41
Spurious Attenuation Effect
q
AWG output and low pass filtering
25/41
ADC
Freq. Freq.
LPF reduction
0 20 40 60 80 10010
-10
10-8
10-6
10-4
10-2
100
102
fs/2-finスプリアスの減衰量 [dB]
図2.1
0(B
)の3次
高調
波の
本来
値か
らの
ずれ
[%]
Spurious reduction at fs/2-fin [dB]
MATLAB Simulation Results
Spurious reduction
at fs/2-fin HD3 measurement
Error
10dB
20dB
1%
0.1%
AD
C H
D3 M
ea
su
rem
ent E
rro
r [%
]
26/41
Outline
• Research background
• Proposed solution
• Problems of proposed solution
• Remedy 1
• Remedy 2
• Experimental results
• Conclusion
27/41
ADC
Freq. Freq.
Inside ADC
π/3 π HD3 cancellation
Reproduction of phase switching signal
Digital output
Vo
ltag
e
Time
Analog input
0 5 10 15 20 25 30 35 40
0
Sample Number
Codes
ADC HD3 can NOT be measured accurately
Similar
28/41
Inside ADC
π/3 π HD3 cancellation
Reproduction of phase switching signal
Digital output Analog input
ADC
Freq. Freq.
folded
0 10 20 30
1000
2000
3000
Sample Number
Codes
ADC HD3 can be measured accurately
Different
Vo
ltag
e
Time
29/41
ADC
Freq. Freq.
folded
LPF reduction
Change sampling frequency by folding
Accurate measurement of ADC output HD3 with phase switching signal
①
②
Conditions for Accurate ADC HD3 Measurement
30/41
Outline
• Research background
• Proposed solution
• Problems of proposed solution
• Remedy 1
• Remedy 2
• Experimental results
• Conclusion
31/41
AWG LPF ADC
PC Oscilloscope,
Spectrum Analyzer FFT
AD7356
output ..01011..
Agilent
33220A
ADI
AD7356
12bit SAR ADC
EVAL
CED1Z 3.478261
MHz
CLK Evaluation
board
digital
output
ADC 3rd Harmonic Measurement Diagram
Satisfying Remedy 2
ADC test signal generation
・Conventional
・Phase switching
14bit DAC
Satisfying Remedy 1
32/41
AWG 33220A
for test signal
generation
ADC AD7356 (12bit)
6 samples
Device Under Test
Low Pass Filters
PC1 for test signal program Spectrum Analyzer
for test signal analysis Oscilloscope for test signal analysis
EVAL-CED1Z for generating
sampling clock , etc.
Common mode
noise suppression
by a choke coil PC2 for
ADC output
analysis
Experimental Environment for ADC Testing fs(AWG)=10MHz, fin=200kHz
fs(ADC)=3.476261MHz
33/41
AWG LPF ADC
PC Oscilloscope,
Spectrum Analyzer
DUT
FFT
AD7356
output ..01011..
Agilent
33220A
ADI
AD7356
EVAL
CED1Z 3.478261
MHz
CLK
Design
Implementation
Evaluation
Evaluation
board
digital
output
Analog LPF Design for ADC Testing
Freq.
HD3@600kHz
removal
fundamental
@ 200kHz
fs/2-fin
fundamental
@ 200kHz
Freq. fs/2-fin
Phase switching
spurious @4.8MHz
attenuation
fc=250kHz
5th order LC Butterworth LPF
4th order LC Butterworth LPF
fc= 1MHz, 2MHz, 2.7MHz, 3.7MHz
34/41
AWG LPF ADC
PC Oscilloscope,
Spectrum Analyzer
DUT
FFT
AD7356
output ..01011..
Agilent
33220A
ADI
AD7356
EVAL
CED1Z 3.478261
MHz
CLK
Design
Implementation
Evaluation
Evaluation
board
digital
output
LPF Implementation
fc=2MHz fc=3.7MHzfc=2.7MHzfc=1MHzfc=1MHz fc=2MHz fc=2.7MHz fc=3.7MHz fc=250kHz
for HD3 reduction for fs/2-fin spurious reduction
35/41
AWG LPF ADC
PC Oscilloscope,
Spectrum Analyzer
DUT
FFT
AD7356
output ..01011..
Agilent
33220A
ADI
AD7356
EVAL
CED1Z 3.478261
MHz
CLK
Design
Implementation
Evaluation
fc=250kHz
fc=1MHz
fc=2MHz
fc=2.7MHz
fc=3.7MHz
- 17 [email protected]
- 30 [email protected]
- 54 [email protected]
- 8.0 [email protected]
- 40dB @ 600kHz
104
105
106
107
-100
-80
-60
-40
-20
0
Frequency[Hz]
Gain
[dB
]
HD3
Spurious
@~fs/2
Evaluation
board
digital
output
LPF Evaluation with Frequency Response Analysis
36/41
Measured Waveforms of ADC Input and Output
0 10 20 30
1000
2000
3000
Sample Number
Codes
0 10 20 30
1000
2000
3000
Sample Number
Codes
0 10 20 30
1000
2000
3000
Sample Number
Codes
0 10 20 30
1000
2000
3000
Sample Number
Codes
0 10 20 30
1000
2000
3000
Sample Number
Codes
Analog Input
Conventional
-17dB
fs/2-fin
Spurious
-30dB
-54dB
A/D
Convers
ion
Spectru
m A
naly
sis
Vo
ltag
e [
V]
2
-2
0
1
-1
Time
Phase Switching Signal
Fundamental
@ 200kHz
fs/2-fin
Phase switching
attenuation
LPF
Vo
ltag
e [
V] 2
-2
0
1
-1
Time
Vo
ltag
e [
V] 2
-2
0
1
-1
Time
Vo
ltag
e [
V] 2
-2
0
1
-1
Time
Vo
ltag
e [
V] 2
-2
0
1
-1
Time
Vo
ltag
e [
V] 2
-2
0
1
-1
Time
-8dB
Digital output
HD
3 M
ea
su
rem
en
t
37/41
Frequency [MHz]
po
we
r [
dB
Fs
]
3rd
①+ ①-
Conventional w/o LPF
Frequency [MHz]
Po
wer
[d
BF
s]
Phase switching w/ LPF (fc=1MHz)
Comparison of Conventional and Proposed Methods
Frequency [MHz]
Po
wer
[d
BF
s]
3rd
Conventional w/ LPF (fc=250kHz)
True ADC HD3
AWG由来3次高調波をフィルタによりカットした手法
②- ②+
LPF
- 54dB
3rd 3rd
True ADC HD3: -94.6dBFs
Conventional method
Measured HD3: -88.1dBFs
Error 6.8%
Proposed method
Measured HD3: -92.6dBFs
Error 2.1%
38/41
0 20 40 60
0
3
6
9
12
15
18
Supurious@fs/2-fin attenuation [dB]
AD
C 3
rd h
arm
onic
s d
ete
cti
on e
rror
[%]
0 20 40 60
0
3
6
9
12
15
18
Supurious@fs/2-fin attenuation [dB]
AD
C 3
rd h
arm
onic
s d
ete
cti
on e
rror
[%]
0 20 40 60
0
3
6
9
12
15
18
Supurious@fs/2-fin attenuation [dB]
AD
C 3
rd h
arm
onic
s d
ete
cti
on e
rror
[%]
ADC HD3 Measurement Results
0 20 40 60
0
3
6
9
12
15
18
Supurious@fs/2-fin attenuation [dB]
AD
C 3
rd h
arm
onic
s d
ete
cti
on e
rror
[%]
0 20 40 60
0
3
6
9
12
15
18
Supurious@fs/2-fin attenuation [dB]
AD
C 3
rd h
arm
onic
s d
ete
cti
on e
rror
[%]
0 20 40 60
0
3
6
9
12
15
18
Supurious@fs/2-fin attenuation [dB]
AD
C 3
rd h
arm
onic
s d
ete
cti
on e
rror
[%]
Sample 1 Sample 2 Sample 3
Sample 4 Sample 5 Sample 6
conventional
phase switching ADC (AD7356) HD3 measurement error reduction is verified
Spurious @ fs/2-fin
attenuation [dB]
Spurious @ fs/2-fin
attenuation [dB]
Spurious @ fs/2-fin
attenuation [dB]
Spurious @ fs/2-fin
attenuation [dB] Spurious @ fs/2-fin
attenuation [dB]
Spurious @ fs/2-fin
attenuation [dB]
39/41
Outline
• Research background
• Proposed solution
• Problems of proposed solution
• Remedy 1
• Remedy 2
• Experimental results
• Conclusion
40/41
Low distortion sine signal generation
Without AWG hardware modification
Just AWG program change
and a simple analog LPF
Verified with
AWG (Agilent 33220)
6 samples of 12bit SAR ADC (AD7356)
Greatly improved quality of ADC Linearity testing
at virtually no extra cost.
Conclusions
41/41
Future Work
Generalization to other types of
low distortion sinusoidal signal generation
- HD2, HD2&HD3 cancellation for 1-tone
- IMD3 cancellation for 2-tone
We have partially verified these.
Detailed theoretical analysis, simulations,
and experiments are underway.