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CHAPTER 17Semiconductor

Materials

The modern microprocessor is a state-of-the-art application of semiconductor materials en-cased in a package of conventional structuralmaterials. This 500 MHz processor contains10 million transistors on a single silicon chip.(Courtesy of Intel.)

2

1

00 100

T(˚C)

200

Figure 17-1 Variation in electrical conductivity with tem-perature for semiconductor silicon. Contrast with thebehavior shown for the metals in Figure 15–10. (Thisplot is based on the data in Table 17.1 using Equations15.14 and 17.2.)

EE

<

E

<

1

Conduction band

Valence band

0

T3T2T1

f(E)1 0

f(E)1 0

f(E)

EF Eg

Figure 17-2 Schematic illustration of how increasing temperature increasesoverlap of the Fermi function, f (E), with the conduction and valence bandsgiving increasing numbers of charge carriers. (Note also Figure 15–9.)

Slope = –Eg

2k

+2

–10

–8

–6

–4

–2

0

2 3

450 400 350 300 250

× 1000 (K–1)

T(K)

41T

Figure 17-3 Arrhenius plot of the electrical conduc-tivity data for silicon given in Figure 17–1. Theslope of the plot is −Eg/2k .

IIIA

13Al

IVA

14Si

VA

15P

p-type dopant

(only 3 valence electrons → electron hole or positivecharge carrier )

n-type dopant

(5 valence electrons → conduction electron ornegative charge carrier )

Intrinsic semiconductor(4 valence eclectrons)

Figure 17-4 Small section of the periodic table of elements. Sil-icon, in group IVA, is an intrinsic semiconductor. Adding asmall amount of phosphorus from group VA provides extraelectrons (not needed for bonding to Si atoms). As a result,phosphorus is an n-type dopant (i.e., an addition producingnegative charge carriers). Similarly, aluminum, from groupIIIA, is a p-type dopant in that it has a deficiency of valenceelectrons leading to positive charge carriers (electron holes).

Eg (bottom ofconduction band)

Ed = donor level

O (top of valence band)

Figure 17-5 Energy band structure of an n-type semiconduc-tor. The extra electron from the group VA dopant producesa donor level (Ed) near the conduction band. This pro-vides relatively easy production of conduction electrons.This figure can be contrasted with the energy band struc-ture of an intrinsic semiconductor in Figure 15–9.

EFEd

01f(E)

Figure 17-6 Comparison of the Fermi function, f (E), withthe energy band structure for an n-type semiconductor.The extra electrons shift the Fermi level (EF ) upward com-pared to Figure 15–9 (where it was in the middle of the bandgap for an intrinsic semiconductor).

Figure 17-7 Schematic of the productionof a conduction electron in an n-typesemiconductor. (a) The extra electronassociated with the group VA atom can(b) easily break away, becoming a con-duction electron and leaving behind anempty donor state associated with theimpurity atom. This can be contrastedwith the similar figure for intrinsic mate-rial in Figure 15–27. (From R. M. Rose,L. A. Shepard, and J. Wulff, The Struc-ture and Properties of Materials, Vol.4: Electronic Properties, John Wiley &Sons, Inc., New York, 1966.)

(a)

(b)

(Eg – Ed)k

Slope = –

1T

T

Figure 17-8 Arrhenius plot of electrical conductivity for ann-type semiconductor. This can be contrasted with thesimilar plot for intrinsic material in Figure 17–3.

(Eg – Ed)k

Slope = –

Eg

2kSlope = – (intrinsic behavior)

1T

T

Exhaustionrange

(extrinsic behavior)

Figure 17-9 Arrhenius plot of electrical conductivity for an n-typesemiconductor over a wider temperature range than shown inFigure 17–8. At low temperatures (high 1/T ), the material is ex-trinsic. At high temperatures (low 1/T ), the material is intrinsic.In between is the exhaustion range, in which all “extra electrons”have been promoted to the conduction band.

Eg (bottom ofconduction band)

Ea = acceptor levelO (top of valence band)

Figure 17-10 Energy band structure of a p-type semiconduc-tor. The deficiency of valence electrons in the group IIIAdopant produces an acceptor level (Ea) near the valenceband. Electron holes are produced as a result of thermalpromotion over this relatively small energy barrier.

EFEa

01f(E)

Figure 17-11 Comparison of the Fermi function with the en-ergy band structure for a p-type semiconductor. This elec-tron deficiency shifts the Fermi level downward comparedto Figure 15–9.

(a) (b)

Figure 17-12 Schematic of the production of an electron hole in a p-type semiconductor. (a)The deficiency in valence electrons for the group IIIA atom creates an empty state, or elec-tron hole, orbiting about the acceptor atom. (b) The electron hole becomes a positive chargecarrier as it leaves the acceptor atom behind with a filled acceptor state. (The motion ofelectron holes, of course, is due to the cooperative motion of electrons.) (From R. M. Rose,L. A. Shepard, and J. Wulff, The Structure and Properties of Materials, Vol. 4: ElectronicProperties, John Wiley & Sons, Inc., New York, 1966.)

Ea

kSlope = –

Eg

2kSlope = – (intrinsic behavior)

1T

T

Saturationrange

(extrinsic behavior)

Figure 17-13 Arrhenius plot of electrical conductivity for a p-type semi-conductor over a wide temperature range. This is quite similar to thebehavior shown in Figure 17–9. The region between intrinsic and ex-trinsic behavior is termed the saturation range corresponding to all ac-ceptor levels being “saturated” or occupied with electrons.

Magnetic field (H)

n-type semiconductor

Current, I (due to electrons)

(a)

Thickness, t

Hall voltage, VH,positive

– +

H

p-type semiconductor

Current, I (due to electron holes)

(b)

Hall voltage, VH,negative

– +

Figure 17-14 The application of a magnetic field (with field strength, H ),perpendicular to a current, I , causes a sideways deflection of charge car-riers and a resulting voltage, VH . This phenomenon is known as the Halleffect. The Hall voltage is given by Equation 17.8. For (a) an n-type semi-conductor, the Hall voltage is positive. For (b) a p-type semiconductor,the Hall voltage is negative.

Extrinsic behavior

Intrinsicbehavior

Exhaustion range5

4

3

2

1

0

–12 3

1/T × 103 (K–1)

4

Induction coil

Solid silicon (to be purified)

(a) (b)

Molten zone (impurity level = Cl)Solid silicon(purified to level = Cs)

Cs

Cl

Segregation coefficient =

K =

ClC

Cs

C (% impurity) →

T

L

0

“Single pass”

Phase diagram for silicon-impurity component

T

“Multiple passes”

Figure 17-15 In zone refining, (a) a single pass of the molten “zone” through the bar leads to the con-centration of impurities in the liquid. This is illustrated by the nature of the phase diagram. (b)Multiple passes of the molten zone lead to increasing purification of the solid.

Thermocouple

Furnace

ShutterAl

Ga

As

Figure 17-16 Schematic illustration of the molecular-beam epitaxy technique.Resistance-heated source furnaces (also called effusion or Knudsen cells)provide the atomic or molecular beams (approximately 10-mm radius). Shut-ters control the deposition of each beam onto the heated substrate. (From J.W. Mayer and S. S. Lau, Electronic Materials Science: For Integrated Cir-cuits in Si and GaAs, Macmillan Publishing Company, New York, 1990.)

(b)(a)

Electronholes

e–

Conductionelectrons

Insulatingzone

electrodep-n junction

n-typematerial

p-typematerial

electrode+–

(c)

Electronholes

e–

Conductionelectrons

Recombinationzone

electrode electrode+ –

Figure 17-17 (a) A solid-state rectifier, or diode, contains a single p–n junction. (b)In reverse bias, polarization occurs and little current flows. (c) In forward bias,majority carriers in each region flow toward the junction, where they are contin-uously recombined.

Current, I

Voltage, V0(–) (+)

(+)

(–)

(a)

Forward bias

Reverse bias

Current, I

Voltage, V0(–) (+)

(+)

(–)

(b)

Forward bias

Reverse bias

Figure 17-18 Current flow as a function of voltage in (a) an ideal rectifier and (b) an actual de-vice such as that shown in Figure 17–17.

Figure 17-19 Comparison of a vacuum-tube rec-tifier with a solid-state counterpart. Such com-ponents allowed substantial miniaturizationin the early days of solid-state technology.(Courtesy of R. S. Wortman.)

Junction 1:(forward-biased)

Junction 2:(reverse-biased)

holes

External load

p(emitter)

n(base)

p(collector)

VcVe

Figure 17-20 Schematic of a transistor (a p–n–p sandwich). The overshoot ofelectron holes across the base (n-type region) is an exponential function ofthe emitter voltage, Ve. Because the collector current (Ic) is similarly an expo-nential function of Ve, this device serves as an amplifier. An n–p–n transistorfunctions similarly except that electrons rather than holes are the overall cur-rent source.

Source Gate= aluminum

metallization

Holeconduction

n

pp

v–SiO2

Drain

Figure 17-21 Schematic of a field-effect transistor (FET). A negative voltage applied to the gate pro-duces a field under the vitreous silica layer and a resulting p-type conductive channel between thesource and the drain. The width of the gate is less than 1 µm in contemporary integrated circuits.

Figure 17-22 A silicon wafer (1.5 mm thick × 150 mm diameter) containingnumerous chips of the type illustrated in Figure 1–17. (Courtesy of R. D.Pashley, Intel Corporation)

Resist

Ultraviolet radiation

Glass mask

SiO2

SiO2

Resist

SiO2

Si

Si Si Si

Si

(a) Coat with photoresist

(c) Remove exposed resist (d) Etch SiO2 (e) Remove resist—patterntransferred to SiO2

(b) Expose photoresist(positive, bonds broken)

Figure 17-23 Schematic illustration of the lithography process stepsfor producing vitreous SiO2 patterns on a silicon wafer. (From J.W. Mayer and S. S. Lau, Electronic Materials Science: For Inte-grated Circuits in Si and GaAs, Macmillan Publishing Company,New York, 1990.)

Resist

Ultraviolet radiation

Glass mask

Resist

Metal

Si

Si Si

Exposedresist

Si

Si

Metal

(a) Coat with photoresist

(c) Remove unexposed resist (d) Deposit metal film (e) Remove resist and metal on resist-metalpattern remains on Si

(b) Expose photoresist(negative, bonds cross-link)

Figure 17-24 Schematic illustration of the lithography process steps forproducing metal patterns on a silicon wafer. (From J. W. Mayer andS. S. Lau, Electronic Materials Science: For Integrated Circuits inSi and GaAs, Macmillan Publishing Company, New York, 1990.)

(a) Ion implantation of dopants (As).

(b) Drive-in diffusion, 950-1050˚C

Si

SiO2

Si

Implantedregion

SiO2

Ion beam, 100 keV As+

Figure 17-25 Schematic illustration of the two-step doping of a siliconwafer with arsenic producing an n-type region beneath the vitre-ous SiO2 mask. (From J. W. Mayer and S. S. Lau, Electronic Ma-terials Science: For Integrated Circuits in Si and GaAs, Macmil-lan Publishing Company, New York, 1990.)

Figure 17-26 Typical metal wire bond to an integratedcircuit. (From C. Woychik and R. Senger, in Prin-ciples of Electronic Packaging, D. P. Seraphim,R. C. Lasky, and C.-Y. Li, Eds., McGraw-HillBook Company, New York, 1989.)

%

1004

19

75

2

10

460

24

16

18

55

11

Custom chips

Customizablechips

Standard chips:Memories,microprocessors,etc.

Transistors, diodes,etc.

80

60

40

20

01975

19801985

Semiconductor Usage1975-1985

Figure 17-27 Although separate solid-state elements suchas transistors and diodes (e.g., Figure 17–19) provideminiaturization compared with vacuum tubes, micro-circuits (e.g., Figure 1–17) allow substantially greatersize reduction. The trend in which industry moved tomicrocircuit chips is shown here. Custom chips arethose designed for specific applications. Standard chipsrepresent more general-purpose circuit designs. Cus-tomizable chips are produced partway like standardchips but, in final stages, are prepared for specific cir-cuit applications. There can be a fivefold difference incost between a fully custom chip and a standard one.(Courtesy of the San Francisco Examiner, based ondata provided by the Digital Equipment Corporation)

1970

808680286

8038680486

PentiumPentium II

Pentium IIIPentium Pro

4004 processor

100M

10M

1M

100K

10K

1K

1975 1980 1985Year

Num

ber

of tr

ansi

stor

s

1990 1995 2000

8080

Figure 17-28 The rapid and steady growth in the number of transistors containedon a single microcircuit chip has generally followed Moore’s law, which statesthat the number doubles roughly every two years. (After data from Intel Cor-poration)

(Courtesy of the Philosophical Magazine)

Andrew Grove, Robert Noyce, and Gordon Moorein 1975. (Courtesy of Intel Corporation)