booth-encoded multiplier - access ic lab (prof. an...
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ACCESS IC LAB
Graduate Institute of Electronics Engineering, NTU
Booth-Encoded MultiplierBooth-Encoded Multiplier
For Advanced VLSI DesignFall 2002
台大電機系吳安宇教授
Advanced VLSI Graduate Institute of Electronics Engineering, NTU
OutlineOutlineReview of Adders Array MultiplierCanonical Multiplier Recoding
Radix-2 SD RepresentationCanonical Recording AlgorithmAdvantage in performing multiplicationRadix-4 SD Representation
String Recording and Booth MultiplierString PropertyConverting to Radix-4 NotationOperation in high-speed Multiplier
Advanced VLSI Graduate Institute of Electronics Engineering, NTU
Conventional Full AdderConventional Full Adder
MUX
ig ic
1+ic
ip MUX ci
ipip
is
FA
ix iy
ic1+ic
si
Multiplexer-based Manchester adder
⊕⊕=⊕⋅+⋅=+
iiii
iiiiii
cyxsyxcyxc )(1
Multiplexer-based Manchester adderiii yxg ⋅= iii yxp ⊕= XOR:⊕
+=⊕=⋅+=⋅+=+
iiiiiii
iiiiiiii
cpcpcpscpgpcpgc 1
Define:
(module A)
(module B)
module A module B
Advanced VLSI Graduate Institute of Electronics Engineering, NTU
Advanced VLSI Graduate Institute of Electronics Engineering, NTU
2p 2g
3c
1p 1g
2c
0g0p
1c
8-bits multiplexer-based Manchester adder 8-bits multiplexer-based Manchester adder (Appendix E)(Appendix E)
Module B
Module A
Advanced VLSI Graduate Institute of Electronics Engineering, NTU
Carry Look-ahead AddersCarry Look-ahead Adders
No carry prorogation delay)1c
⊕=⋅+=+
iii
iiii
cpscpgc 1
1112 cpgc ⋅+=11 cc =
111 cps ⊕=
222 cps ⊕=( 112 pgp ⋅+⊕=
2223 cpgc ⋅+=)( 11122 cpgpg ⋅+⋅+=
112122 cppgpg ⋅⋅+⋅+= Generate S2 without C2
C2
Advanced VLSI Graduate Institute of Electronics Engineering, NTU
Carry-Select Adders (8x8 bits)Carry-Select Adders (8x8 bits)
29 Multiplexers
8 And gates
Critical path = 6tmux
Advanced VLSI Graduate Institute of Electronics Engineering, NTU
Carry-Save Adders (ai+bi+Ci=2Ci+1+Si)Carry-Save Adders (ai+bi+Ci=2Ci+1+Si)
Advanced VLSI Graduate Institute of Electronics Engineering, NTU
Carry-Save and Carry Propagate Adder (CSA/CPA)
Carry-Save and Carry Propagate Adder (CSA/CPA)
Advanced VLSI Graduate Institute of Electronics Engineering, NTU
Multi-input Carry-Save AddersMulti-input Carry-Save Adders4-input CSA tree 5-input CSA tree 6-input CSA tree
ACCESS IC LAB
Graduate Institute of Electronics Engineering, NTU
Array MultiplierArray Multiplier
Advanced VLSI Graduate Institute of Electronics Engineering, NTU
Array MultiplierArray MultiplierNotation:
Product:
im
iixX 2
1
0•= ∑
−
=2
1
0
in
iiyY •= ∑
−
=
)()( 221
0
1
0
in
jj
im
ii yxYXP ∑∑
−
=
−
=
•=×=
( )21 1ji
m n
yx +− −
∑ ∑=0 0i j
ji= =
21
0
knm
kkP∑
−+
=
=
Advanced VLSI Graduate Institute of Electronics Engineering, NTU
Array Multiplier (cont.)Array Multiplier (cont.)
Advanced VLSI Graduate Institute of Electronics Engineering, NTU
4x4 bits Array Multiplier Structure
Advanced VLSI Graduate Institute of Electronics Engineering, NTU
Array Multiplier (cont.)Array Multiplier (cont.)nxn multiplier : n(n-2) Full adders
n Half addersAND gatesn2
Worst-case Delay :
where : worst-case adder delay
It can be drawn as a “Squared Array” for better full-custom layout
τ gn )12( +
τ g
Advanced VLSI Graduate Institute of Electronics Engineering, NTU
Squared Version: for full custom LayoutSquared Version: for full custom Layout
Advanced VLSI Graduate Institute of Electronics Engineering, NTU
Pipelined Serial/parallel multiplier
Extra delaySerial/parallel multiplier
Pipelined Serial/parallel multiplier
Serial Stream LSB first
X
Partial Sum In
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Graduate Institute of Electronics Engineering, NTU
Canonical Multiplier RecodingCanonical Multiplier Recoding
Advanced VLSI Graduate Institute of Electronics Engineering, NTU
Radix-2 SD RepresentationRadix-2 SD RepresentationSigned Digit (SD), Radix-2 allows }1,0,1{
Advanced VLSI Graduate Institute of Electronics Engineering, NTU
Radix-2 SD Representation (cont.)Radix-2 SD Representation (cont.)A minimal SD vector that contains no adjacent nonzero digit is called a “Canonical Signed-Digit (CSD)” vector.
for
Reitwiesner shows that there is a unique CSD representation for any digit number with a fixed word-length n. ( criteria: a (n+1)-digit with a leading zero digit )
),,,,( 0121 DDDDD nn −−=
,01 =× −DD ii 11 −≤≤ ni
α
Advanced VLSI Graduate Institute of Electronics Engineering, NTU
Canonical Recording AlgorithmCanonical Recording Algorithm
Advanced VLSI Graduate Institute of Electronics Engineering, NTU
Canonical Recording AlgorithmCanonical Recording Algorithm
011104-111013011102011111-110110DiCi+1CiBiBi+1i
1
Di = Bi + Ci - 2Ci+1
e.g.B = (0 0 1 0 1 0 1 1 1)
D = (0 1 0 1 0 1 0 0 1)
D has weight of 4B has weight of 5
}1,0,1{}1,0{ −∈∵D∈B
0
Advanced VLSI Graduate Institute of Electronics Engineering, NTU
Advantage in performing multiplication
Advantage in performing multiplication
Since Only the addition of the multiplicand of (A) or (-A) are required per each cycle.Zeros correspond to “shift” in multiplication33% fewer nonzero terms than conventional 2’s complement numbers
}1,0,1{−∈iD
Advanced VLSI Graduate Institute of Electronics Engineering, NTU
CSD MultiplicationCSD Multiplication
Advanced VLSI Graduate Institute of Electronics Engineering, NTU
Radix-4 SD RepresentationRadix-4 SD RepresentationSince D must be canonical, Di x Di + 1 = 0,only five possible choices of the digit pair {Di+1,Di} are available.{10, 01, 00, 01, 10} {2,1,0,1,2}excluding {11,11,11,11}
note: 11=0111=0111=101
Non-canonicalrepresentation
Advanced VLSI Graduate Institute of Electronics Engineering, NTU
Multiplier (B2) = (001010111)
Radix-4 SD Representation (cont.)Radix-4 SD Representation (cont.)
Radix-4CSD
D2 = (010101001)
D4 = (0 2 2 2 1 )
0, +/- A, +/- 2AMultiplier
(Radix-2)
Multiplicand (A)
Fast Recoded Multiplierwith “two-digits”Shifting Per cycle
(NEG, ZERO, TWO) control signals
in 5 cycles
(Radix-4)
Advanced VLSI Graduate Institute of Electronics Engineering, NTU
String Recording and Booth MultiplierString Recording and Booth MultiplierColumn position: …, i+k, i+k-1, i+k-2,… , i ,i-1
Bit Content: …, 0, 1 , 1 , …,1, 0
=> Bit Content: …, 1, 0 , 0,.. ,0,1, 0
k consecutive 1’s
Add(k-1) consecutive 0’s
and subtract
Advanced VLSI Graduate Institute of Electronics Engineering, NTU
String PropertyString Property222222 121 iikikiiki ++++=− +−+−++ …
e.g. 001000100 = 00111100
(4-1) 0’s 4 1’s
>
<
=
=
−
−
−
BBBBBB
Dii
ii
ii
i
if
if
if
1
1
1
,1
,1
,0
Advanced VLSI Graduate Institute of Electronics Engineering, NTU
String Property (cont.)String Property (cont.)
with Bn =B-1=0, B=Bn-1,Bn-2,…B1,B0
⇒ Binary Vector B=(0 0 1 0 1 0 1 0 1 0)2
To String vector D=(0 1 1 1 1 1 1 1 1 0)SD
(non-canonical)
Advanced VLSI Graduate Institute of Electronics Engineering, NTU
Converting to Radix-4Converting to Radix-4
Radix-2:
⇒ Radix-4:
{ }01,11
01,00,
11
10,01),( 1
=+ DD ii
( ) { }2,1,0,1,2=F i
Advanced VLSI Graduate Institute of Electronics Engineering, NTU
Operation in Multiplier (B)Operation in Multiplier (B)Shift right partial product, if Bi = Bi-1
Add “A”, then shift right, if Bi < Bi-1
Subtract “A”, then shift right, if Bi > Bi-1
>
<
=
=
−
−
−
BBBBBB
Dii
ii
ii
i
if
if
if
1
1
1
,1
,1
,0
Advanced VLSI Graduate Institute of Electronics Engineering, NTU
Booth’s MultiplierBooth’s Multiplier
Advanced VLSI Graduate Institute of Electronics Engineering, NTU
Booth’s MultiplierBooth’s Multiplier