chapter3-hardware software design flow - ntut.edu.twtylee/courses/chapter3... · 2008. 3. 4. ·...

Professor Professor RueiRuei--Xi ChenXi ChenEE--mail: mail: [email protected]@mail.sju.edu.tw

Http://Http://www.csie.sju.edu.twwww.csie.sju.edu.twSJU/CSIESJU/CSIE

Chapter 3Chapter 3Hardware/Software Design Flows and Hardware/Software Design Flows and

Development EnvironmentsDevelopment Environments

P-2/93教育部顧問室PAL聯盟/系統雛型與軟硬體整合設計第三章：軟硬體設計流程與開發環境

OutlineOutline3.1 3.1 Software Development Software Development ToolchainToolchain3.2 Software Compilers3.2 Software Compilers3.3 Hardware Design3.3 Hardware Design FlowFlow3.4 3.4 FPGA FPGA Implementation for Hardware DesignImplementation for Hardware Design


3.1 Software Development 3.1 Software Development ToolToolcchainhain3.1 3.1 Software Development Software Development ToolchainToolchain3.2 Software Compilers3.2 Software Compilers3.3 Hardware Design3.3 Hardware Design FlowFlow3.4 3.4 FPGA FPGA Implementation for Hardware DesignImplementation for Hardware Design


3.1 Embedded System Development Environment3.1 Embedded System Development EnvironmentTarget Device

Embedded System Target BoardHost System

Cross-Development ToolchainConnections for Host and Target

JTAG: Parallel port for download bootloaderUART: Serial port for target terminal (minicom)Ethernet: tftp & NFS services protocols

JTAG

RS232

Ethernet

TargetHost


3.1 What is a 3.1 What is a ToolChainToolChain??A toolchain is the set of computer programs (tools) that are used to create a product

The tools may be used in a chainIt is used widely to refer to any set of linked development tools

A software development toolchain consists of a number of components:

Text editorsFor entering source code

Compiler and linkerTo transform the source code into an executable program and libraries to provide interfaces to the operating system

Debuggers


3.1 H3.1 How about Building a ow about Building a ToolchainToolchain??How about building a cross-development toolchain?

It is a difficult and painful task!It can take days or weeks!

Lots of details to be learned in building components, such as:Need to build gcc twice

One for the gccAnother for the compiler which is needed for the C library

Lots of decisions to be made, such as:Versions of glibcConfiguration of your platformetc.


3.1 Suitability of Precompiled 3.1 Suitability of Precompiled ToolchainToolchainYou can get one precompiled toolchain from several locations...

You just need to know where they are! Cautions!

Toolchains are not relocatableInstall them in a fixed location if they were built for that locationSuch as: /usr/local/

Make sure that the toolchain you picked is just suits for what you need:

C librariesCompilersThe library versions...


3.1 What is the GNU 3.1 What is the GNU ToolchainToolchain??The programming tools produced by the GNU project

For programming both applications and operating systemsA vital component in Linux kernel developmentA standard tool for developing software for embedded systems

Such as the ARM embedded systems


3.1 Projects that Included in the GNU 3.1 Projects that Included in the GNU ToolchainToolchainGNU make:

Build and compilation automationGNU Compilers:

gcc, the well known C,C++ complier supported variable platforms

GNU Binutils including:Assembler (as), linker (ld) and other binary file tools

GNU Debugers:gdb, the command line interactive debugging, including remote debugging

Libraries:glibc, the GNU C runtime library


3.1 Selection of ARM Linux 3.1 Selection of ARM Linux ToolchainToolchainarm-linux build of the GNU compiler

Cross-compilation from Unix (Linux or Solaris) or Windows hostSnapshots available at http://www.codesourcery.com/

Choice of C libraryGlibc – standard GNU C libraryuCLibc

http://www.uclibc.orgNewlib – smaller library

http://sources.redhat.com/newlib/Decide on which library to use when building the cross compilation tool chain


3.1 Why Linux?3.1 Why Linux?Linux is a Unix clone written from scratch

by Linus Torvalds with assistance from a loosely-knit team of hackers across the Net

Linux aims towards POSIX complianceLinux has all the features you would expect in a modern fully-fledged Unix, including:

true multitaskingvirtual memoryshared librariesdemand loadingshared copy-on-write executablesproper memory managementTCP/IP networking.


3.1 ARM 3.1 ARM linuxlinux developmentdevelopment02/28/2007

Added generic ARM toolchain GCC 4.1.0 with Glibc 2.3.2 (2.6.12 kernel headers)

05/21/2006Some files moved to arm.raphnet.net

12/11/2005Added generic ARM toolchain GCC 4.0.2 with Glibc 2.3.3 (2.6.11.2 kernel headers)

12/16/2004Added generic ARM toolchain GCC 3.4.2 with Glibc 2.3.3 (2.6.8 kernel headers)


3.1 ARM Embedded Linux Cross Dev3.1 ARM Embedded Linux Cross Dev--EnvironmentEnvironment

Linux/UNIX Workstation:(1) Host Linux: vsftpd, sshd, vim, make, …

(2) Target OS (Linux/uClinux source), andarm-elf-toolchain for linux, [and IDEs]

Windows-based Virtual Machine :(1) Windows OS (XP,…), [Hyper Terminal],

(2) VMware + Virtual Machine OS and Drivers [RH9/Fedora/Debian/Symbian…]: minicom, tftp,

vim, make, …

[or using Cygwin]

(3) Target OS (Linux/uClinux source), andarm-elf-toolchain for linux, [and IDEs]

Embedded Target Boards

Solution 1:

Solution 2:


Embedded TargetARM

JTAG

NullModem

3.1 Target System Connections3.1 Target System Connections

DCE

Host

(DTE)

RS232 RS232

Printer Cablefor downloading bootloader

RS232 Cable (SUB9 male-to-male) used for target terminals

Ethernet Cablefor downloading image files

(DTE)


3.1 ARM Cross3.1 ARM Cross--Development ToolkitDevelopment Toolkit

C Source

Assembler

C Libraries ASM Source

.aofObject

Libraries

.aif debug

ARMsd

DevelopmentboardARMulator

System model

C Compiler

Linker


3.1 System Requirement3.1 System RequirementHardware

Host : PCTarget : XSBase255

SoftwareOS : Linux or Virtual Machine (Fedora, ...)Original Packages (*.tar.gz) Directory

/home/Co_design/Lab_2/Kernel2.4.18-rmk7-pxal-XSBase255B

/home/Co_design/Lab_2/Toolchainhybus-arm-linux-R1.1.tar.gz

Embedded Software Directory for:Kernel, Cross-Toolchain, Work, Image


3.1 Connections of PXA3.1 Connections of PXA--255 Dev255 Dev--EnvironmentsEnvironments

TMSTest Mode Selection

TCKTest Clock

TDO Test Data Out

TDITest Data In

nTRSTJTAG ResetSystem Reset

JTAG InterfaceJTAG Interface

Intel® XScale Family


3.1 PXA3.1 PXA--255 Dev. 255 Dev. ToolKitToolKitBootloaders

Images: “x-boot255”Download tools: Jflash-XSBASE

Kernel packages“2.4.18-root.tar.gz”

Filesystems“root_Xscale.tar.gz”

Toolchain packages“hybus-arm-linux-R1.1.tar.gz”

BOOTP, TFTP and NFS Service“bootp-2.4.3-7.i386.rpm”“tftp-server-0.17-9.i386.rpm”


3.1 PXA3.1 PXA--255 Development Procedures255 Development ProceduresDownload the bootloader to the Target board./Jflash-XSBASE x-boot255

Installation of Toolchain1. tar xvzf hybus-arm-linux-R1.1.tar.gz2. Adding Auto-paths and sourcing it

Setup kernel1. tar xvzf 2.4.18-root.tar.gz2. Kernel Configuration3. Setup Services (Install BOOTP, TFTP, NFS services)

Build Filesystemstar xvzf root_Xscale.tar.gz

Download the Linux Kernel and Filesystem Image to the Target (tftp)Build Applications1. Edit Applications, and make2. Run Applications via UART, tftp, or NFS protocols


3.1 File Directories3.1 File Directories

Original Bootloader Image: x-boot255

Applications

Original Toolchain Package:hybus-arm-linux-R1.1.tar.gz

Original Kernel Package:2.4.18-root.tar.gz

NFS directory for target sharing files

Login location

Target kernel(Installation)

Toolchain(Installation)


3.1 Download 3.1 Download BootloaderBootloaderDownload Bootloader for XSBase255

The execution file for downloading bootloader’s via JTAG portJflash-XSBASE

The bootloader image.x-boot255

Command to Download the Bootloader./Jflash-XSBASE x-boot255


3.1 Steps to Install 3.1 Steps to Install ToolchainToolchain for XSBase255for XSBase255Original Toolchain Package:

hybus-arm-linux-R1.1.tar.gzToolchain Folder After Installation

/usr/local/hypus-arm-linux-R1.1/Steps of installation

Duplicating Filescp hybus-arm-linux-R1.1.tar.gz /usr/local/

Unpacking Filescd /usr/local/tar xvzf hybus-arm-linux-R1.1.tar.gz

Adding Auto-pathsvi ~/.bash_profileAdd a new line: “PATH=$PATH:/usr/local/hybus-arm-linux-R1.1/bin”Exit and save .bash_profile,

Sourcing, type: source ~/.bash_profile


3.1 Install Kernel3.1 Install KernelThe original Kernel Package

2.4.18-root.tar.gzUnpack the XSBase255 kernel file, typing:

tar xvzf 2.4.18-root.tar.gzThe kernel folder built after installation

2.4.18-rmk7-pxal-XSBase255B


3.1 Network Environment3.1 Network EnvironmentUsing dual physical LAN cardsUsing dual physical LAN cardsAnd using dual virtual LAN cards And using dual virtual LAN cards


3.1 Virtual Machine Networking3.1 Virtual Machine NetworkingBridged NetworkingNetwork Address Translation (NAT)Host-Only NetworkingSophisticated Virtual Networks


3.1 Bridged Networking3.1 Bridged Networking

Bridged networking connects a virtual machine to a network usingthe host computer’s Ethernet adapter


3.1 Network Address Translation3.1 Network Address Translation

NAT gives a virtual machine access to network resources using the host computer’s IP address.

(NAT)


3.1 Host3.1 Host--Only NetworkingOnly Networking

Host-only networking creates a network that is completely contained within the host computer.


3.1 Sophisticated Virtual Networks3.1 Sophisticated Virtual Networks

In this custom configuration, a Web server connects through a firewall to an external network. An administrator’s computer can connect to the Web server through a second firewall.


3.1 Setup Services3.1 Setup ServicesSetup the Bootp Services:

bootpbootptabRestart the Bootp Daemon

Setup the tftp ServicesSetup the nfs Services


3.1 3.1 Setup the BOOTP ServiceSetup the BOOTP ServiceInstall bootp service, at the RPM folder, type:rpm –I bootp-2.4.3-7.i386.rpmCreate a bootp file at the /etc/xinetd.d folderRestart the Bootp Daemon/etc/rc.d/init.d/xinetd restart


3.1 Content of the 3.1 Content of the bootpbootp and and bootptabbootptab FilesFiles

Abbreviations:test : labelsht : hardware type

(1 is the Ethernet)ha : hardware address

Must be the same as

target board’s MAC address

ip : IP addresssm : subnet mask

-------------------------------------test:\

ht=1:\ha=0x123456789A00:\ip=192.168.0.50:\sm=255.255.255.0

-------------------------------------Abbreviations:

bootptab: (/etc folder)

bootp: (in /etc/xinetd.d folder)----------------------------------------------------------------------Service bootps{

disable =nosocket_type =dgramprotocol =udpwait =yesuser =rootserver =/usr/sbin/bootpd

}----------------------------------------------------------------------


3.1 3.1 Setup Setup tftptftp ServerServerInstallation, at the RPM folder, type:rpm –I tftp-server-0.17-9.i386.rpmCreate a tftp file to /etc/xinetd.d folderContent of the tftp Files


3.1 3.1 Setup NFS ServicesSetup NFS ServicesCreate an “exports” file in the “/etc” folderRestart nfs daemon:/etc/rc.d/init.d/nfs restartMount the NFS from the Target Terminalportmapmount –t nfs 192.168.0.100:/mnt/nfs /mnt


3.2 Software Compilers3.2 Software Compilers3.1 Software Development 3.1 Software Development ToolchainToolchain3.2 Software Compilers3.2 Software Compilers3.3 Hardware Design Flow3.3 Hardware Design Flow3.4 3.4 FPGA FPGA Implementation for Hardware DesignImplementation for Hardware Design


3.2 Software Programs and Compilers3.2 Software Programs and CompilersSource code

The collection of program files Any sequence of statements and/or declarations written in some human-readable computer programming language

LanguagesHigh level languages (source code)

C/C++, Java, BASIC, …Lower level languages

Assembly language (source code)The machine dependent mnemonic languagesMachine language (binary code)

CompilersPrograms that translate source code from a high level language to a lower level language

InterpretersExecute code from the human readable form


3.2 Cross3.2 Cross--CompilersCompilersGenerate another processor’s executable code from a processor platform, such as:

GNU C Compiler for ARM generates ARM executable code from x86 platform

gcc : arm-linux-gcc (arm-elf-gcc)g++ : arm-linux-g++ (arm-elf-g++) ar : arm-linux-ar (arm-elf-ar)strip : arm-linux-strip (arm-elf-strip)

GCC: GNU Compiler CollectionCross compilers are used to generate software that can run on computers with a new architecture or on special-purpose devices that cannot host their own compilers


Target Board

Host IDE

Cross Compiler& Assembler

Cross Compiler& Assembler

LinkerLinker

Edit SourceEdit Source

DebuggerDebugger

RuntimeLibrariesRuntimeLibraries

Open SourceOpen Source

.s

.o

.c, .h, .s

.o

Executable file

3.2 Embedded Software Design Flow3.2 Embedded Software Design Flow


3.2 Stages of Compilation3.2 Stages of CompilationPreprocessing

Converts all preprocessing statements into true C code(such as #include, #define and #ifdef)

CompilingConverts preprocessed input into assembly language output

AssemblingConvert the assembly language code into relocatable binary object outpu

LinkingLink the relocatable object file into an executable output file


3.2 Four Compilation Stages of GNU C Compiler3.2 Four Compilation Stages of GNU C Compiler

Preprocessing(cpp)

Stages ofCompilation(armarm--elfelf--gccgcc)

Compiling(-gcc)

Assembling(arm-elf-as)

Linking(arm-elf

-ld)

Input Files Output Files

Input file: Output file: stage-opt:

Preprocessed (.i)Assembler (.s)-S

C code (.c) Preprocessed (.i)-E

Assembler (.s)Object (.o) -c

Object (.o)Executable (.elf)(none)

armarm--elfelf--gccgcc ExecutionExecution


3.2 ARM Software Development Concept3.2 ARM Software Development Concept

IDE EnvironmentARM Tools, Libraries, Host/Target

IDE EnvironmentARM Tools, Libraries, Host/Target

ARM©ARM©

ASMASM

Value-Add ExtensionsEmbedded RTOS, Drivers, Stacks, Services

Value-Add ExtensionsEmbedded RTOS, Drivers, Stacks, Services

DSPDSP OthersOthers

C/C++C/C++


3.2 Commands of GNU Compiler for ARM3.2 Commands of GNU Compiler for ARMUse the GNU Compiler for the ARM:

arm-elf-gcc [stage-opt] [other-opts] -mcpu=arm7tdmi in-file -o out-fileTo convert C source code to a binary object file:

arm-elf-gcc -c -O2 -g -mcpu=arm7tdmi filename.c -o filename.oTo convert multiple binary object files into an executable file (the general case):

arm-elf-ld filename1.o filename2.o … -o filename.elfTo convert C source code to an executable file (for use with Insight only, not Komodo):

arm-elf-gcc -O2 -g -mcpu=arm7tdmi filename.c -o filename.elfTo convert C source code to assembly language source code:

arm-elf-gcc -S -fverbose-asm -mcpu=arm7tdmi filename.c -o filename.s


3.2 Compilation with the file name suffix3.2 Compilation with the file name suffix.c C source; preprocess.C C++ source; preprocess, compile, assemble.cc C++ source; preprocess, compile, assemble.cxx C++ source; preprocess, compile, assemble.m Objective-C source; preprocess, compile, assemble.i Preprocessed C; compile, assemble.ii Preprocessed C++; compile, assemble.s Assembler source; assemble.S Assembler source; preprocess, assemble.h Preprocessor file; not usually named on command lineOther An object file to be fed straight. Any file name with no

recognize suffix is treated this way


3.2 Debugging Options3.2 Debugging Options-g

Include debugging information in the relocatable binary object or executable output file

-WallWarn about potential bugs and questionable constructs that may exist in your C codeHighly useful; use often!

-fverbose-asmThis causes the compiler to insert comments into the outputTo help you understand the resulting assembly language code


3.2 Linux 3.2 Linux -- DebuggingDebuggingKernel debug

With JTAG connection use commercial debugger for early kernel bring upUse Kgdb to debug kernelCommercial debuggers offer additional features to debug and profile the Linux kernel:

Choice of halted/running system debugProfiling

Application debugUse GDB over serial or networking link

Either natively or in cross-debug environmentChoice over graphical front-end used

Use commercial debuggers for debugging over JTAG


3.2 Test GCC Cross Compiler3.2 Test GCC Cross CompilerDownload test.tar.gzExtract & Maketar zxf test.tar.gzcd testmakefile test.elf

What is the test.elf?ELF 32-bit LSB executable, ARM, version 1 (ARM), statically linked, not stripped


3.2 Part of 3.2 Part of MakefileMakefileCROSS=arm-elf-

CC = $(CROSS)gccAS = $(CROSS)asAR = $(CROSS)arLD = $(CROSS)ldNM = $(CROSS)nmRm = nmOBJCOPY = $(CROSS)objcopyBIN2C = /tools/bin2cZIP = gzip

CFLAGS = -fno-builtin –Wall –O2 –formit –frame-pointer –IAFLAGS = -mapcs-32 –msoft-float –mno-fpu –I.LDFLAGS = $(CFLAGS) –W1, -elf2flt--------------%,o: %.c

$(CC) $(CFLAGS) –c –o $@ $<

%,o: %.S$(CC) $(AFLAGS) –c –o $@ $


3.23.2 Coupling / DependencyCoupling / DependencyThe degree to which each program module relies on each one of the other modules, for Example:

myapp depends on main.o, 2.o, and 3.o, main.o depends on main.c and a.h, and so on

Types of coupling (Dependency)Message coupling (low and best) Data coupling Stamp coupling (Data-structured coupling) Control coupling External coupling Common coupling Content coupling (worst)


3.2 3.2 ““makemake””Make is one of the original Unix tools for Software Engineering

By S.I. Feldman of AT&T Bell Labs circa 1975Make is a separate, higher-level utility for

Automatically building large applicationsWhich tells the compiler which source code files to process

multiple source files exist in a projectRelated tools

language compilers shell programming tools

make is going to look for a file called Makefile


3.23.2 MakefilesMakefilesThe files that specifying instructions for makeA makefile consists of lines of text

Which define a file (or set of files) or a rule name as depending on a set of filesEach dependency is listed

A makefile can be treated as a kind of advanced shell scriptWhich tracks dependencies instead of following a fixed sequence of steps"build scripts" are passed to the shell to generate the target file


3.2 3.2 MakefileMakefile StructureStructureMakefile Components

Comments: the comment character “#”MacrosTargetsContinuation of Lines: “\” on the end of linesConventional MacrosSpecial MacrosMakefile Target Rules

The basic structure is:

# Comments use the hash symboltarget: dependencies

command 1command 2

.

.

.command n


3.2 Macros3.2 MacrosDefined as = pairs, for example: MACROS= -mePSROFF= groff –TpsDITROFF= groff –TdviCFLAGS= -O -systype bsd43

To find out what rules/macros make, typing :make –p

To set macros, typing:make "CFLAGS= -O" "LDFLAGS=-s" printenvcc -O printenv.c -s -o printenv


3.2 Targets and Continuation of Lines3.2 Targets and Continuation of Linesmake a particular targetpaper.dvi: $(SRCS) $(DITROFF) $(MACROS) $(SRCS)

>paper.dviThe line beginning with $(DITROFF) begins with TAB not spacesThe target is made if any of the dependent files have changedThe dependent files in this case are represented by the $(SRCS) statement

Continuation of LinesUse a back slash (\)

line_one \line_two # more_line_two \line_three

is the same as: line_one line_two line_three


3.2 Conventional Macros3.2 Conventional MacrosAR = arGFLAGS =GET = getASFLAGS =MAS = masAS = asFC = f77 CFLAGS = CC = ccLDFLAGS =

LD = ldLFLAGS = LEX = lexYFLAGS = YACC = yaccLOADLIBS = MAKE = makeMAKEARGS = 'SHELL=/bin/sh' SHELL = /bin/shMAKEFLAGS = b


3.23.2 Special MacroSpecial MacroAccess

$(MACRONAME)${MACRONAME}$MACRONAME (Some make version)

Special macro$@

the name of the file to be made$?

the names of the changed dependents Examples:

$(CC) $(CFLAGS) $? $(LDFLAGS) -o $@ $(CC) $(CFLAGS) [email protected] $(LDFLAGS) -o $@

$<the name of the related file that caused the action

$*the prefix shared by target and dependent files


3.2 3.2 MakefileMakefile Target RulesTarget RulesThe general syntax:target [target...] : [dependent ....] [ command ...]

A make will terminate if any command returns a failure sta- tusThat's why you see rules like:

clean:-rm *.o *~ core paper

Make ignores the returned status on command lines that begin with a dash


3.2 A Very Simple 3.2 A Very Simple MakefileMakefile ExampleExampleCompile a source called "helloworld.c" using ccThe PHONY tag is a technicality that

tells make that a particular target name does not produce an actual file

The $@ and $< are two ofthe so-called automatic variables and stand for the target nameand so-called "implicit" source

helloworld: helloworld.occ -o $@ $<

helloworld.o: helloworld.ccc -c -o $@ $<

.PHONY: cleanclean:

rm -f helloworld helloworld.o


3.3 Hardware Design3.3 Hardware Design FlowFlow3.1 3.1 Software Development Software Development ToolchainToolchain3.2 Software Compilers3.2 Software Compilers3.3 Hardware Design3.3 Hardware Design FlowFlow3.4 3.4 FPGA FPGA Implementation for Hardware DesignImplementation for Hardware Design


3.33.3 TopTop--Down Design MethodologyDown Design Methodology


3.33.3 Design DomainDesign Domain


3.33.3 ARM Behavioral ModelARM Behavioral Model

http://www.st.com/stonline/products/families/computer/customizableproc/model.htm


3.33.3 SoCSoC HW/SW CoHW/SW Co--DesignDesignFundamentals

Based on parallel hardware and software developmentUse the pre-built architecture platform

Construct of generic hardware and software IP blocksIPs have already been characterized and debugged

The key stepsThe hardware and software partitioning

For optimization of the application-specific systemUse the existing hardware/software IP blocks as a guide


3.33.3 FPGA Design FlowsFPGA Design FlowsXilins ISE Design FlowAltera Quartus-II Design Flow


3.33.3 XilinxXilinx ISE Design FlowISE Design Flow


3.33.3 Create An ISE ProjectCreate An ISE Project1. Create a project2. Create files and add them to the project, including a user

constraints (UCF) file3. Add any existing files to the project4. Assign constraints such as:

timing constraintspin assignmentsarea constraints


3.33.3 Functional VerificationFunctional VerificationBefore synthesis, run behavioral simulation

Also known as RTL simulationAfter Translate, run functional simulation

Also known as gate-level simulationUsing the SIMPRIM library

After device programming, run in-circuit verification


3.33.3 Design ImplementationDesign ImplementationImplement design, steps:

TranslateMapPlace and Route

Review generated reports to improve design:Process properties Constraints Source files

Synthesize and implement the design again until design requirements are met.


3.33.3 Timing VerificationTiming VerificationRun static timing analysis at the following points in the designflow:

After Map After Place & Route

Run timing simulation at the following points in the design flow:After Map (for a partial timing analysis of CLB and IOB delays) After Place and Route (for full timing analysis of block and netdelays)


3.33.3 XilinxXilinx Device ProgrammingDevice ProgrammingCreate a programming file (BIT)

To program your FPGAGenerate a PROM, ACE, or JTAG file

For debuggingOr to download to your device

program the deviceUse iMPACTUse a programming cable


3.33.3 AlteraAltera FPGA Design FlowFPGA Design Flow


3.33.3 Design Steps for a Design Steps for a QuartusQuartus II ProjectII ProjectRun the New Project WizardRun the Timing Wizard (Assignments Menu)Compile the Design (Processing Menu)Verification

SimulationFPGA ConfigurationEmulation

http://www.altera.com/literature/manual/mnl_qts_quick_start.pdf


3.33.3 Run the New Project WizardRun the New Project Wizard1. Specify:

Project directory, name, and top-level entityProject design filesAltera device familyDevice (or device information for automatic device selection)Other EDA tools to be used

2. Review:project settings


3.33.3 Run the Timing WizardRun the Timing Wizard1. Specify requirements:

For overall circuit frequency (fMAX)Or for one or more clock signals

2. Enter project-wide system requirements:set-up time (tSU)hold time (tH)clock-to-output time (tCO)and pin-to-pin time (tPD)

3. Specify default external delays to and from device pins4. Enter settings to control timing analysis and timing-driven

compilation.


3.33.3 Compile the DesignCompile the Design1. Compile the design:

Choose one of the following methods:Choose Start Compilation (Processing menu)Use the shortcut on the menu toolbarClick Start from the Compiler Tool (Processing menu)

2. Refer to the Compilation Report window to view information on:compiler settingsresource usagecompilation equations


3.33.3 ReferencesReferencesQuartus II Development Software Handbook

www.altera.com/literature/hb/qts/quartusii_handbook.pdfAltera Technical Literature

www.altera.com/literature/lit-index.htmlTechnical Support

www.altera.com/mysupportQuartus II Online Demos

www.altera.com/quartusdemosDetails on the Quartus II Design Flow

www.altera.com/products/software/sfw-index.htmlIntroduction to Quartus II Manual

http://www.altera.com/literature/manual/intro_to_quartus2.pdfQuick Start Guide for the Quartus II Software

www.altera.com/literature/manual/mnl_qts_quick_start.pdf


3.4 3.4 FPGA FPGA Implementation for Hardware DesignImplementation for Hardware Design3.1 3.1 Software Development Software Development ToolchainToolchain3.2 Software Compilers3.2 Software Compilers3.3 Hardware Design3.3 Hardware Design FlowFlow3.4 3.4 FPGA FPGA Implementation for Hardware DesignImplementation for Hardware Design


3.43.4 A Typical Digital SystemA Typical Digital System

http://www.ami.ac.uk/courses/ami4407_dicdes/u02/index.asp


3.43.4 The FSMD Design ModelThe FSMD Design Model

controller and datapath

controller datapath

…

…

externalcontrolinputs

externalcontrol outputs

…

externaldata

inputs

…external

dataoutputs

datapathcontrolinputs

datapathcontroloutputs

A view inside the controller and datapath

… …

controller datapath

… …

stateregister

next-stateand

controllogic

registers

functionalunits

Embedded Systems Design: A Unified Hardware/Software Introduction, (c) 2000 Vahid/Givargis

FSMDFSMD

FSMD:FSMD: FSM with FSM with DatapathDatapath


3.43.4 The ASM MethodThe ASM MethodASM: Algorithmic State MachineASM: Algorithmic State MachineTechniques for designing finite state machinesAdvantages:

reduces design errorsproduces robust designsself documentingeasy to automate

Design flowSystem SpecificationASM Chart DefinitionAssignment of State CodesFSM Specification

URL:http://www.ami.ac.uk/courses/ami4407_dicdes/u02/index.asp


3.43.4 Three Symbols for the ASM ChartThree Symbols for the ASM ChartASM Utilizes the following three symbols:

STATE BOXINPUT BOXCONDITIONAL OUTPUT BOX


3.43.4 Case Study: An 8 bit Multiplier Unit ControllerCase Study: An 8 bit Multiplier Unit Controller

System Specification

Implementing the controller of an 8 bit multiplier unit as a finite state machine


3.43.4 System SpecificationSystem Specification

Datapath Design ASM Chart Definition


3.43.4 ASM Table ASM Table vsvs FSM CodeFSM Code(a) ASM Table

(b) FSM VHDL Code


3.43.4 Run the New Project WizardRun the New Project WizardFile New Project Wizard


3.43.4 Specify ProjectSpecify Project

Specify Project directory, name, and top-level entity, Project design files, Alteradevice familyDevice, Other EDA tools to be used


3.43.4 Run the Timing WizardRun the Timing Wizard


3.43.4 Specify Requirements: Specify Requirements: fMAXfMAX, , tsutsu, , thth, , tcotco, , tpdtpd


3.43.4 Compile the DesignCompile the Design


3.43.4 Create a New Waveform FileCreate a New Waveform File

Right Click Here


3.43.4 Insert NodeInsert Node


3.43.4 Set the End Time and Clock FrequencySet the End Time and Clock Frequency


3.4 FPGA Configuration from Host3.43.4 FPGA Configuration from HostFPGA Configuration from Host

Configuring FPGA from a Host PCUse Quartus II Programmer with cable such as USB blasterNios II hardware design down-loaded into FPGA

Nios Development BoardNios Development Board

StratixStratix

egeg. USB Blaster. USB Blaster

FPGA FPGA ConfigConfig. Data. Data((ieie. .. .sofsof file)file)

Quartus II Quartus II ProgrammerProgrammer

Nios IINios II

© 2007 Altera


3.4 Use Quartus II Programmer3.43.4 Use Use QuartusQuartus II ProgrammerII ProgrammerLaunched from Quartus II or Nios II IDE

Altera’s software dev. tool

..sofsof programming file generated programming file generated during the Quartus II hardware compileduring the Quartus II hardware compile

© 2007 Altera

chapter3-hardware software design flow - ntut.edu.twtylee/courses/chapter3... · 2008. 3. 4. ·...

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