circuitilogici. x1x1 x2x2 f x1x1 x2x2 f(x 1,x 2 ) 000 011 101 111 f(x 1,x 2 ) = x 1 +x 2 = x 1 x 2...
TRANSCRIPT
![Page 1: CircuitiLogici. x1x1 x2x2 f x1x1 x2x2 f(x 1,x 2 ) 000 011 101 111 f(x 1,x 2 ) = x 1 +x 2 = x 1 x 2 OR](https://reader035.vdocuments.pub/reader035/viewer/2022070312/5542eb5a497959361e8c77ae/html5/thumbnails/1.jpg)
Circuiti Circuiti LogiciLogici
![Page 2: CircuitiLogici. x1x1 x2x2 f x1x1 x2x2 f(x 1,x 2 ) 000 011 101 111 f(x 1,x 2 ) = x 1 +x 2 = x 1 x 2 OR](https://reader035.vdocuments.pub/reader035/viewer/2022070312/5542eb5a497959361e8c77ae/html5/thumbnails/2.jpg)
x1
x2
f
x1 x2 f(x1,x2)
0 0 0
0 1 1
1 0 1
1 1 1
f(x1,x2) = x1+x2 = x1 x2 OR
![Page 3: CircuitiLogici. x1x1 x2x2 f x1x1 x2x2 f(x 1,x 2 ) 000 011 101 111 f(x 1,x 2 ) = x 1 +x 2 = x 1 x 2 OR](https://reader035.vdocuments.pub/reader035/viewer/2022070312/5542eb5a497959361e8c77ae/html5/thumbnails/3.jpg)
Proprietà della funzione ORProprietà della funzione OR
Commutativa: x1 + x2 = x2 + x1
Estesa a più variabili
x1 + x2 + x3 + … + xn = 1 se xi = 1 (i=1,…,n)
1 + x = 10 + x = x
Associativa: (x1 + x2 )+ x3 = x1 + (x2 + x3)
Inoltre:
![Page 4: CircuitiLogici. x1x1 x2x2 f x1x1 x2x2 f(x 1,x 2 ) 000 011 101 111 f(x 1,x 2 ) = x 1 +x 2 = x 1 x 2 OR](https://reader035.vdocuments.pub/reader035/viewer/2022070312/5542eb5a497959361e8c77ae/html5/thumbnails/4.jpg)
x1 x2
f
x1 x2 f(x1,x2)
0 0 0
0 1 0
1 0 0
1 1 1
f(x1,x2) = x1•x2 = x1 x2 AND
![Page 5: CircuitiLogici. x1x1 x2x2 f x1x1 x2x2 f(x 1,x 2 ) 000 011 101 111 f(x 1,x 2 ) = x 1 +x 2 = x 1 x 2 OR](https://reader035.vdocuments.pub/reader035/viewer/2022070312/5542eb5a497959361e8c77ae/html5/thumbnails/5.jpg)
Proprietà della funzione ANDProprietà della funzione AND
Commutativa: x1 • x2 = x2 • x1
Estesa a più variabili
x1 • x2 • x3 • … • xn = 1 xi = 1 (i=1,…,n)
1 • x = x0 • x = 0
Associativa: (x1 • x2 ) • x3 = x1 • (x2 • x3)
Inoltre:
![Page 6: CircuitiLogici. x1x1 x2x2 f x1x1 x2x2 f(x 1,x 2 ) 000 011 101 111 f(x 1,x 2 ) = x 1 +x 2 = x 1 x 2 OR](https://reader035.vdocuments.pub/reader035/viewer/2022070312/5542eb5a497959361e8c77ae/html5/thumbnails/6.jpg)
x1 x2
f
x1 x2 f(x1,x2)
0 0 0
0 1 1
1 0 1
1 1 0
f(x1,x2) = x1 x2 Exclusive OR
1 1
![Page 7: CircuitiLogici. x1x1 x2x2 f x1x1 x2x2 f(x 1,x 2 ) 000 011 101 111 f(x 1,x 2 ) = x 1 +x 2 = x 1 x 2 OR](https://reader035.vdocuments.pub/reader035/viewer/2022070312/5542eb5a497959361e8c77ae/html5/thumbnails/7.jpg)
Proprietà della funzione Exclusive ORProprietà della funzione Exclusive OR
Commutativa: x1 x2 = x2 x1
Estesa a più variabili
x1 x2 x3 … xn = 1 se xi = 1 e xk = 0 ik (i,k=1,…,n)
1 x = x0 x = x
Associativa: (x1 x2 ) x3 = x1 (x2 x3)
Inoltre:
![Page 8: CircuitiLogici. x1x1 x2x2 f x1x1 x2x2 f(x 1,x 2 ) 000 011 101 111 f(x 1,x 2 ) = x 1 +x 2 = x 1 x 2 OR](https://reader035.vdocuments.pub/reader035/viewer/2022070312/5542eb5a497959361e8c77ae/html5/thumbnails/8.jpg)
x1
f
x1 f(x1)
0 1
1 0
f(x) = x
NOT
1
![Page 9: CircuitiLogici. x1x1 x2x2 f x1x1 x2x2 f(x 1,x 2 ) 000 011 101 111 f(x 1,x 2 ) = x 1 +x 2 = x 1 x 2 OR](https://reader035.vdocuments.pub/reader035/viewer/2022070312/5542eb5a497959361e8c77ae/html5/thumbnails/9.jpg)
V ingresso < Vlim V uscita = V alim.
V ingresso > Vlim V uscita = Vmassa
V uscita
V massa
V alimentazione
TransistorBipolare (BJT)
collettore
emettitore
base
resistenza
V ingresso
![Page 10: CircuitiLogici. x1x1 x2x2 f x1x1 x2x2 f(x 1,x 2 ) 000 011 101 111 f(x 1,x 2 ) = x 1 +x 2 = x 1 x 2 OR](https://reader035.vdocuments.pub/reader035/viewer/2022070312/5542eb5a497959361e8c77ae/html5/thumbnails/10.jpg)
V
AND
x1
x2
f
y
x1 y x2 f
0 1 0 0
0 1 1 0
1 0 0 0
1 0 1 1
![Page 11: CircuitiLogici. x1x1 x2x2 f x1x1 x2x2 f(x 1,x 2 ) 000 011 101 111 f(x 1,x 2 ) = x 1 +x 2 = x 1 x 2 OR](https://reader035.vdocuments.pub/reader035/viewer/2022070312/5542eb5a497959361e8c77ae/html5/thumbnails/11.jpg)
V
OR
x1
x2
f
y
x1 y x2 z f
0 1 0 1 0
0 1 1 0 1
1 0 0 0 1
1 0 1 0 1
z
![Page 12: CircuitiLogici. x1x1 x2x2 f x1x1 x2x2 f(x 1,x 2 ) 000 011 101 111 f(x 1,x 2 ) = x 1 +x 2 = x 1 x 2 OR](https://reader035.vdocuments.pub/reader035/viewer/2022070312/5542eb5a497959361e8c77ae/html5/thumbnails/12.jpg)
Tecnologie microelettronicheTecnologie microelettroniche
Transistor bipolari (o a giunzione) o Transistor BJT (Bipolar Junction Transistor)
Tecnologia TTL (Transistor Transistor Logic)
Tecnologia ECL ( Emitter Couple Logic)
Transistor ad effetto di inversione o Transistor MOS (Metal Oxide Semiconductor)
Tecnologia CMOS (Complementary Metal Oxide Semiconductor)
![Page 13: CircuitiLogici. x1x1 x2x2 f x1x1 x2x2 f(x 1,x 2 ) 000 011 101 111 f(x 1,x 2 ) = x 1 +x 2 = x 1 x 2 OR](https://reader035.vdocuments.pub/reader035/viewer/2022070312/5542eb5a497959361e8c77ae/html5/thumbnails/13.jpg)
Simboli standard per porte logicheSimboli standard per porte logiche
x1
x2
x1
x2
x1
x2
x
x1 + x2
x1 • x2
x
x1 x2
OR
AND
NOT
EX-OR
![Page 14: CircuitiLogici. x1x1 x2x2 f x1x1 x2x2 f(x 1,x 2 ) 000 011 101 111 f(x 1,x 2 ) = x 1 +x 2 = x 1 x 2 OR](https://reader035.vdocuments.pub/reader035/viewer/2022070312/5542eb5a497959361e8c77ae/html5/thumbnails/14.jpg)
x2
x1
f
f = x1 • x2 + x1 •x2
x1 x2 x1• x2 x1•x2 f
0 0 0 0 0
0 1 1 0 1
1 0 0 1 1
1 1 0 0 0
![Page 15: CircuitiLogici. x1x1 x2x2 f x1x1 x2x2 f(x 1,x 2 ) 000 011 101 111 f(x 1,x 2 ) = x 1 +x 2 = x 1 x 2 OR](https://reader035.vdocuments.pub/reader035/viewer/2022070312/5542eb5a497959361e8c77ae/html5/thumbnails/15.jpg)
x1 x2 x3 f
0 0 0 1
0 0 1 1
0 1 0 0
0 1 1 1
1 0 0 0
1 0 1 0
1 1 0 0
1 1 1 1
f = x1x2x3 + x1x2 x3 +x1 x2 x3 + x1 x2 x3
![Page 16: CircuitiLogici. x1x1 x2x2 f x1x1 x2x2 f(x 1,x 2 ) 000 011 101 111 f(x 1,x 2 ) = x 1 +x 2 = x 1 x 2 OR](https://reader035.vdocuments.pub/reader035/viewer/2022070312/5542eb5a497959361e8c77ae/html5/thumbnails/16.jpg)
x2
x1
f
f = x1x2x3 + x1x2 x3 +x1 x2 x3 + x1 x2 x3
x3
![Page 17: CircuitiLogici. x1x1 x2x2 f x1x1 x2x2 f(x 1,x 2 ) 000 011 101 111 f(x 1,x 2 ) = x 1 +x 2 = x 1 x 2 OR](https://reader035.vdocuments.pub/reader035/viewer/2022070312/5542eb5a497959361e8c77ae/html5/thumbnails/17.jpg)
x2
x1
f
f = x1x2 + x2 x3 x1 x2 x3 f
0 0 0 1
0 0 1 1
0 1 0 0
0 1 1 1
1 0 0 0
1 0 1 0
1 1 0 0
1 1 1 1
x3
![Page 18: CircuitiLogici. x1x1 x2x2 f x1x1 x2x2 f(x 1,x 2 ) 000 011 101 111 f(x 1,x 2 ) = x 1 +x 2 = x 1 x 2 OR](https://reader035.vdocuments.pub/reader035/viewer/2022070312/5542eb5a497959361e8c77ae/html5/thumbnails/18.jpg)
Minimizzazione di funzioni logicheMinimizzazione di funzioni logiche
OR AND
Commutativa x+y=y+x xy=yx
Associativa (x+y)+z=x+(y+z) (xy)z=x(yz)
Distributiva x+yz=(x+y)(x+z) x(y+z)=xy+xz
Idempotenza x+x=x xx=x
Involuzione x = x
Complemento x +x= 1 xx= 0
De Morgan x+y =xy xy =x +y
1+x=1 0 x=0
0+x=x 1 x=x
![Page 19: CircuitiLogici. x1x1 x2x2 f x1x1 x2x2 f(x 1,x 2 ) 000 011 101 111 f(x 1,x 2 ) = x 1 +x 2 = x 1 x 2 OR](https://reader035.vdocuments.pub/reader035/viewer/2022070312/5542eb5a497959361e8c77ae/html5/thumbnails/19.jpg)
Minimizzazione di funzioni logicheMinimizzazione di funzioni logiche
x1 x2 x3 f
0 0 0 1
0 0 1 1
0 1 0 1
0 1 1 0
1 0 0 1
1 0 1 1
1 1 0 0
1 1 1 0
f = x1x2x3 + x1x2 x3 +x1 x2x3 + x1x2x3 + x1x2 x3
![Page 20: CircuitiLogici. x1x1 x2x2 f x1x1 x2x2 f(x 1,x 2 ) 000 011 101 111 f(x 1,x 2 ) = x 1 +x 2 = x 1 x 2 OR](https://reader035.vdocuments.pub/reader035/viewer/2022070312/5542eb5a497959361e8c77ae/html5/thumbnails/20.jpg)
x1 x2 x3 f
0 0 0 1
0 0 1 1
0 1 0 0
0 1 1 1
1 0 0 0
1 0 1 0
1 1 0 0
1 1 1 1
1 0 0 0
1 1 1 0
x1x2
x3 00 01 11 10
0
1
Mappa diKarnaugh
![Page 21: CircuitiLogici. x1x1 x2x2 f x1x1 x2x2 f(x 1,x 2 ) 000 011 101 111 f(x 1,x 2 ) = x 1 +x 2 = x 1 x 2 OR](https://reader035.vdocuments.pub/reader035/viewer/2022070312/5542eb5a497959361e8c77ae/html5/thumbnails/21.jpg)
Minimizzazione di funzioni logicheMinimizzazione di funzioni logiche
1 0 0 0
1 1 1 0
x1x2
x3 00 01 11 10
0
1
x1x2 x2 x3
f =x1x2 + x2 x3
![Page 22: CircuitiLogici. x1x1 x2x2 f x1x1 x2x2 f(x 1,x 2 ) 000 011 101 111 f(x 1,x 2 ) = x 1 +x 2 = x 1 x 2 OR](https://reader035.vdocuments.pub/reader035/viewer/2022070312/5542eb5a497959361e8c77ae/html5/thumbnails/22.jpg)
1 1 0 1
1 0 0 1
x1x2
x3 00 01 11 10
0
1
x1 x2 x3 f
0 0 0 1
0 0 1 1
0 1 0 1
0 1 1 0
1 0 0 1
1 0 1 1
1 1 0 0
1 1 1 0
![Page 23: CircuitiLogici. x1x1 x2x2 f x1x1 x2x2 f(x 1,x 2 ) 000 011 101 111 f(x 1,x 2 ) = x 1 +x 2 = x 1 x 2 OR](https://reader035.vdocuments.pub/reader035/viewer/2022070312/5542eb5a497959361e8c77ae/html5/thumbnails/23.jpg)
Minimizzazione di funzioni logicheMinimizzazione di funzioni logiche
x2 x1 x3
f =x2 + x1x3
1 1 0 1
1 0 0 1
x1x2
x3 00 01 11 10
0
1
![Page 24: CircuitiLogici. x1x1 x2x2 f x1x1 x2x2 f(x 1,x 2 ) 000 011 101 111 f(x 1,x 2 ) = x 1 +x 2 = x 1 x 2 OR](https://reader035.vdocuments.pub/reader035/viewer/2022070312/5542eb5a497959361e8c77ae/html5/thumbnails/24.jpg)
0 0 1 1
0 0 0 0
1 0 0 1
0 0 1 1
00 01 11 10
00
01
11
10
x1x2
x3x4
x1x4x2 x3 x4
f =x2 x3 x4 + x1x4
![Page 25: CircuitiLogici. x1x1 x2x2 f x1x1 x2x2 f(x 1,x 2 ) 000 011 101 111 f(x 1,x 2 ) = x 1 +x 2 = x 1 x 2 OR](https://reader035.vdocuments.pub/reader035/viewer/2022070312/5542eb5a497959361e8c77ae/html5/thumbnails/25.jpg)
1 0 1 1
0 1 1 1
1 0 0 1
1 0 0 1
00 01 11 10
00
01
11
10
x1x2
x3x4
x2x3 x4x2x4
f = x2x4 + x1x3 + x2x3 x4
x1x3
![Page 26: CircuitiLogici. x1x1 x2x2 f x1x1 x2x2 f(x 1,x 2 ) 000 011 101 111 f(x 1,x 2 ) = x 1 +x 2 = x 1 x 2 OR](https://reader035.vdocuments.pub/reader035/viewer/2022070312/5542eb5a497959361e8c77ae/html5/thumbnails/26.jpg)
0 1 1 0
1 1 1 1
1 1 1 1
0 0 0 0
00 01 11 10
00
01
11
10
x1x2
x3x4
x2x3 x4
f = x4 + x2x3
![Page 27: CircuitiLogici. x1x1 x2x2 f x1x1 x2x2 f(x 1,x 2 ) 000 011 101 111 f(x 1,x 2 ) = x 1 +x 2 = x 1 x 2 OR](https://reader035.vdocuments.pub/reader035/viewer/2022070312/5542eb5a497959361e8c77ae/html5/thumbnails/27.jpg)
1 0 0 0
1 1 0 0
0 1 1 0
0 0 0 0
00 01 11 10
00
01
11
10
x1x2
x3x4
x2x3x4x1x2x3
![Page 28: CircuitiLogici. x1x1 x2x2 f x1x1 x2x2 f(x 1,x 2 ) 000 011 101 111 f(x 1,x 2 ) = x 1 +x 2 = x 1 x 2 OR](https://reader035.vdocuments.pub/reader035/viewer/2022070312/5542eb5a497959361e8c77ae/html5/thumbnails/28.jpg)
1 0 0 0
1 1 0 0
0 1 1 0
0 0 0 0
00 01 11 10
00
01
11
10
x1x2
x3x4
x2x3x4x1x2x3
x1x3 x4
![Page 29: CircuitiLogici. x1x1 x2x2 f x1x1 x2x2 f(x 1,x 2 ) 000 011 101 111 f(x 1,x 2 ) = x 1 +x 2 = x 1 x 2 OR](https://reader035.vdocuments.pub/reader035/viewer/2022070312/5542eb5a497959361e8c77ae/html5/thumbnails/29.jpg)
1 0 0 0
1 1 0 0
0 1 1 0
0 0 0 0
00 01 11 10
00
01
11
10
x1x2
x3x4
x2x3x4x1x2x3
x1 x2 x4
![Page 30: CircuitiLogici. x1x1 x2x2 f x1x1 x2x2 f(x 1,x 2 ) 000 011 101 111 f(x 1,x 2 ) = x 1 +x 2 = x 1 x 2 OR](https://reader035.vdocuments.pub/reader035/viewer/2022070312/5542eb5a497959361e8c77ae/html5/thumbnails/30.jpg)
Altre Porte logicheAltre Porte logiche
x1
x2
x1 x2NAND
x1 x2 x1•x2 x1x2
0 0 0 1
0 1 0 1
1 0 0 1
1 1 1 0
![Page 31: CircuitiLogici. x1x1 x2x2 f x1x1 x2x2 f(x 1,x 2 ) 000 011 101 111 f(x 1,x 2 ) = x 1 +x 2 = x 1 x 2 OR](https://reader035.vdocuments.pub/reader035/viewer/2022070312/5542eb5a497959361e8c77ae/html5/thumbnails/31.jpg)
Altre Porte logicheAltre Porte logiche
x1 x2 x1+x2 x1x2
0 0 0 1
0 1 1 0
1 0 1 0
1 1 1 0
x1
x2
x1 x2NOR
![Page 32: CircuitiLogici. x1x1 x2x2 f x1x1 x2x2 f(x 1,x 2 ) 000 011 101 111 f(x 1,x 2 ) = x 1 +x 2 = x 1 x 2 OR](https://reader035.vdocuments.pub/reader035/viewer/2022070312/5542eb5a497959361e8c77ae/html5/thumbnails/32.jpg)
x1 x2 = x1x2= x1 +x2
ProprietàProprietà
x1 x2 = x1+x2= x1x2
x1 x2 … xn = x1x2 … xn= x1 +x2 +…+ xn
x1 x2 … xn = x1+x2+ …+ xn = x1x2 … xn
Non vale la proprietà associativa
![Page 33: CircuitiLogici. x1x1 x2x2 f x1x1 x2x2 f(x 1,x 2 ) 000 011 101 111 f(x 1,x 2 ) = x 1 +x 2 = x 1 x 2 OR](https://reader035.vdocuments.pub/reader035/viewer/2022070312/5542eb5a497959361e8c77ae/html5/thumbnails/33.jpg)
Circuiti logici solo con porte NANDCircuiti logici solo con porte NAND
(x1 x2 ) (x3 x4 ) = (x1 x2 ) (x3 x4 ) = x1 x2 + x3 x4
= x1 x2 + x3 x4
x2
x1
x4
x3
x2
x1
x4
x3
![Page 34: CircuitiLogici. x1x1 x2x2 f x1x1 x2x2 f(x 1,x 2 ) 000 011 101 111 f(x 1,x 2 ) = x 1 +x 2 = x 1 x 2 OR](https://reader035.vdocuments.pub/reader035/viewer/2022070312/5542eb5a497959361e8c77ae/html5/thumbnails/34.jpg)
AssociativitàAssociatività
Associativa (x+y)+z=x+(y+z) (xy)z=x(yz)
x2
x1
x3
x2
x1
x3
![Page 35: CircuitiLogici. x1x1 x2x2 f x1x1 x2x2 f(x 1,x 2 ) 000 011 101 111 f(x 1,x 2 ) = x 1 +x 2 = x 1 x 2 OR](https://reader035.vdocuments.pub/reader035/viewer/2022070312/5542eb5a497959361e8c77ae/html5/thumbnails/35.jpg)
Non AssociativitàNon Associatività
x2
x1
x3
x2
x1
x3
![Page 36: CircuitiLogici. x1x1 x2x2 f x1x1 x2x2 f(x 1,x 2 ) 000 011 101 111 f(x 1,x 2 ) = x 1 +x 2 = x 1 x 2 OR](https://reader035.vdocuments.pub/reader035/viewer/2022070312/5542eb5a497959361e8c77ae/html5/thumbnails/36.jpg)
Realizzazione di Porte LogicheRealizzazione di Porte Logiche
Nei circuiti elettronici per rappresentare le variabili logicheSono utilizzati sia livelli di tensione che di corrente
Per stabilire una corrispondenza tra livelli di tensione evalori logici si usa una soglia (threshold)
Vmax
Vmin
Soglia
V0
V1
![Page 37: CircuitiLogici. x1x1 x2x2 f x1x1 x2x2 f(x 1,x 2 ) 000 011 101 111 f(x 1,x 2 ) = x 1 +x 2 = x 1 x 2 OR](https://reader035.vdocuments.pub/reader035/viewer/2022070312/5542eb5a497959361e8c77ae/html5/thumbnails/37.jpg)
Vin V0 Vout > V1
Vin V1 Vout < V0
Vout
Vs
NOT
Vin
Vs
R
Vout
![Page 38: CircuitiLogici. x1x1 x2x2 f x1x1 x2x2 f(x 1,x 2 ) 000 011 101 111 f(x 1,x 2 ) = x 1 +x 2 = x 1 x 2 OR](https://reader035.vdocuments.pub/reader035/viewer/2022070312/5542eb5a497959361e8c77ae/html5/thumbnails/38.jpg)
AND
V
x1
V
x1
x2
fy
x2
f
NAND
![Page 39: CircuitiLogici. x1x1 x2x2 f x1x1 x2x2 f(x 1,x 2 ) 000 011 101 111 f(x 1,x 2 ) = x 1 +x 2 = x 1 x 2 OR](https://reader035.vdocuments.pub/reader035/viewer/2022070312/5542eb5a497959361e8c77ae/html5/thumbnails/39.jpg)
OR
V
x1
x2
f
y
z
V
x1x2
f
NOR
![Page 40: CircuitiLogici. x1x1 x2x2 f x1x1 x2x2 f(x 1,x 2 ) 000 011 101 111 f(x 1,x 2 ) = x 1 +x 2 = x 1 x 2 OR](https://reader035.vdocuments.pub/reader035/viewer/2022070312/5542eb5a497959361e8c77ae/html5/thumbnails/40.jpg)
Criteri per la realizzazione di P.L.Criteri per la realizzazione di P.L.
Velocità ( Ritardo di propagazione e tempo di transizione)
Potenza
Densità di packaging
Immunità al rumore
Caratteristica di carico
Capacità di carico
fan-in
fan-out
![Page 41: CircuitiLogici. x1x1 x2x2 f x1x1 x2x2 f(x 1,x 2 ) 000 011 101 111 f(x 1,x 2 ) = x 1 +x 2 = x 1 x 2 OR](https://reader035.vdocuments.pub/reader035/viewer/2022070312/5542eb5a497959361e8c77ae/html5/thumbnails/41.jpg)
Definizione di Circuiti Definizione di Circuiti
Circuiti il cui stato dipende solo dagli ingressi
Circuiti Combinatori
Circuiti il cui stato dipende non solo dagli ingressi ma dalleconfigurazioni precedenti
Circuiti Sequenziali
S R Qn+1
0 0 Qn
0 1 0
1 0 1
1 1 X
![Page 42: CircuitiLogici. x1x1 x2x2 f x1x1 x2x2 f(x 1,x 2 ) 000 011 101 111 f(x 1,x 2 ) = x 1 +x 2 = x 1 x 2 OR](https://reader035.vdocuments.pub/reader035/viewer/2022070312/5542eb5a497959361e8c77ae/html5/thumbnails/42.jpg)
Memorie: Bistabile (Flip-Flop)Memorie: Bistabile (Flip-Flop)
R
S
Qa
Qb
S R Qa Qb
0 0 0/1 1/0
0 1 0 1
1 0 1 0
1 1 0 0
Bistabile RS
![Page 43: CircuitiLogici. x1x1 x2x2 f x1x1 x2x2 f(x 1,x 2 ) 000 011 101 111 f(x 1,x 2 ) = x 1 +x 2 = x 1 x 2 OR](https://reader035.vdocuments.pub/reader035/viewer/2022070312/5542eb5a497959361e8c77ae/html5/thumbnails/43.jpg)
Memorie: Bistabile (Flip-Flop)Memorie: Bistabile (Flip-Flop)
R
S
Qa
Qb
0
0
0
0
1
1
1
1
![Page 44: CircuitiLogici. x1x1 x2x2 f x1x1 x2x2 f(x 1,x 2 ) 000 011 101 111 f(x 1,x 2 ) = x 1 +x 2 = x 1 x 2 OR](https://reader035.vdocuments.pub/reader035/viewer/2022070312/5542eb5a497959361e8c77ae/html5/thumbnails/44.jpg)
Bistabile SincroniBistabile Sincroni
R
S
Qa
Qb
Cl
S R Qn+1
0 0 Qn
0 1 0
1 0 1
1 1 X
![Page 45: CircuitiLogici. x1x1 x2x2 f x1x1 x2x2 f(x 1,x 2 ) 000 011 101 111 f(x 1,x 2 ) = x 1 +x 2 = x 1 x 2 OR](https://reader035.vdocuments.pub/reader035/viewer/2022070312/5542eb5a497959361e8c77ae/html5/thumbnails/45.jpg)
Memorie: Bistabile SincronoMemorie: Bistabile Sincrono
S
R
Qa
Qb
0
0
0
0
1
1
1
1
Cl0
1
![Page 46: CircuitiLogici. x1x1 x2x2 f x1x1 x2x2 f(x 1,x 2 ) 000 011 101 111 f(x 1,x 2 ) = x 1 +x 2 = x 1 x 2 OR](https://reader035.vdocuments.pub/reader035/viewer/2022070312/5542eb5a497959361e8c77ae/html5/thumbnails/46.jpg)
Bistabile SincroniBistabile Sincroni
R
S
Qa
Qb
Cl
D Bistabile D
![Page 47: CircuitiLogici. x1x1 x2x2 f x1x1 x2x2 f(x 1,x 2 ) 000 011 101 111 f(x 1,x 2 ) = x 1 +x 2 = x 1 x 2 OR](https://reader035.vdocuments.pub/reader035/viewer/2022070312/5542eb5a497959361e8c77ae/html5/thumbnails/47.jpg)
Altri Bistabili RSAltri Bistabili RS
Master-Slave (Bistabili JK)
Edge-Triggered (Bistabili D)
Bistabili JK
J K Qn+1
0 0 Qn
0 1 0
1 0 1
1 1 Qn
S=JQ R=KQ
![Page 48: CircuitiLogici. x1x1 x2x2 f x1x1 x2x2 f(x 1,x 2 ) 000 011 101 111 f(x 1,x 2 ) = x 1 +x 2 = x 1 x 2 OR](https://reader035.vdocuments.pub/reader035/viewer/2022070312/5542eb5a497959361e8c77ae/html5/thumbnails/48.jpg)
Shift RegisterShift Register
F1 F2 F3 F4
J
K
Q
Q
J
K
Q
Q
J
K
Q
Q
J
K
Q
Q
In
Cl
Out
![Page 49: CircuitiLogici. x1x1 x2x2 f x1x1 x2x2 f(x 1,x 2 ) 000 011 101 111 f(x 1,x 2 ) = x 1 +x 2 = x 1 x 2 OR](https://reader035.vdocuments.pub/reader035/viewer/2022070312/5542eb5a497959361e8c77ae/html5/thumbnails/49.jpg)
Shift RegisterShift Register
F1 F2 F3 F4
J
K
Q
Q
J
K
Q
Q
J
K
Q
Q
J
K
Q
Q
Clock
In
Shift/Load
![Page 50: CircuitiLogici. x1x1 x2x2 f x1x1 x2x2 f(x 1,x 2 ) 000 011 101 111 f(x 1,x 2 ) = x 1 +x 2 = x 1 x 2 OR](https://reader035.vdocuments.pub/reader035/viewer/2022070312/5542eb5a497959361e8c77ae/html5/thumbnails/50.jpg)
ContatoriContatori
F1 F2 F3 F4
J
K
Q
Q
J
K
Q
Q
J
K
Q
Q
J
K
Q
QCl
1
Ripple
![Page 51: CircuitiLogici. x1x1 x2x2 f x1x1 x2x2 f(x 1,x 2 ) 000 011 101 111 f(x 1,x 2 ) = x 1 +x 2 = x 1 x 2 OR](https://reader035.vdocuments.pub/reader035/viewer/2022070312/5542eb5a497959361e8c77ae/html5/thumbnails/51.jpg)
DecodificatoriDecodificatori
x1
x2
0
1
2
3
![Page 52: CircuitiLogici. x1x1 x2x2 f x1x1 x2x2 f(x 1,x 2 ) 000 011 101 111 f(x 1,x 2 ) = x 1 +x 2 = x 1 x 2 OR](https://reader035.vdocuments.pub/reader035/viewer/2022070312/5542eb5a497959361e8c77ae/html5/thumbnails/52.jpg)
MultiplexerMultiplexer
x1
x4
x2
x3
w1 w2
z
![Page 53: CircuitiLogici. x1x1 x2x2 f x1x1 x2x2 f(x 1,x 2 ) 000 011 101 111 f(x 1,x 2 ) = x 1 +x 2 = x 1 x 2 OR](https://reader035.vdocuments.pub/reader035/viewer/2022070312/5542eb5a497959361e8c77ae/html5/thumbnails/53.jpg)
Dispositivi Logici ProgrammabiliDispositivi Logici Programmabili
Array di elementi combinatori che possono essere programmatiPer realizzare funzioni logiche esprimibili come somma di prodotti
PLD Programmable Logic Devices
x1
xn
f1
fm
In Buff.E invert.
Array di AND
Array di OR Out Buff.
.
.
.
.
.
.
.
.
.
.
.
.
. . . . .
![Page 54: CircuitiLogici. x1x1 x2x2 f x1x1 x2x2 f(x 1,x 2 ) 000 011 101 111 f(x 1,x 2 ) = x 1 +x 2 = x 1 x 2 OR](https://reader035.vdocuments.pub/reader035/viewer/2022070312/5542eb5a497959361e8c77ae/html5/thumbnails/54.jpg)
Dispositivi Logici ProgrammabiliDispositivi Logici Programmabili
PLA : Programmable Logic Array
Dispositivi in cui sia le connessioni delle porte ANDche quelle delle porte OR sono programmabili
PAL : Programmable Array Logic
Dispositivi in cui sono programmabili solo le porte AND
FPGA : Field Programmable Gate Array
Blocchi logici interconnessi da una rete di commutazioneprogrammabile
![Page 55: CircuitiLogici. x1x1 x2x2 f x1x1 x2x2 f(x 1,x 2 ) 000 011 101 111 f(x 1,x 2 ) = x 1 +x 2 = x 1 x 2 OR](https://reader035.vdocuments.pub/reader035/viewer/2022070312/5542eb5a497959361e8c77ae/html5/thumbnails/55.jpg)
FPGA Implementation
ALTERA Stratix Dalsa-Coreco ANACONDA
(XILINX)
![Page 56: CircuitiLogici. x1x1 x2x2 f x1x1 x2x2 f(x 1,x 2 ) 000 011 101 111 f(x 1,x 2 ) = x 1 +x 2 = x 1 x 2 OR](https://reader035.vdocuments.pub/reader035/viewer/2022070312/5542eb5a497959361e8c77ae/html5/thumbnails/56.jpg)
Stratix III L Family Variants
Device EP3SL50
EP3SL70
EP3SL110
EP3SL150
EP3SL200
EP3SE260
EP3SL340
Adaptive Logic Modules (ALMs)
19,000 27,000 42,600 56,800 79,560 101,760 135,200
Equivalent Logic Elements (LEs)
47,500 67,500 106,500
142,000
198,900
254,400 338,000
Registers 38,000 54,000 85,200 113,600
159,120
203,520 270,400
M9K Memory Blocks 108 150 275 355 468 864 1,144
M144K Memory Blocks 6 6 12 16 24 48 48
Embedded Memory (Kbits)
1,836 2,214 4,203 5,499 7,668 14,688 17,208
MLAB (Kbits) 594 844 1,331 1,775 2,486 3,180 4,225
18x18 Multipliers 216 288 288 384 576 768 576
FPGA ALTERA