digi-anal3_2012
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GTHS KUMBO_Electrical Department_Third sequence examJan.2011 1
SECTION ONE : TECHNOLOGY
1.1 Define: Combinatory logic circuit; sequential logic circuit, decoder, multiplexer,flip-flop.
1.2 Give the meaning of the following abbreviation: PMOS, ECL, USB, ALU, TTL.
1.3 What are the properties of a linear operational amplifier?
1.4 What are the modes of functioning of an OPMP?
1.5 The following symbol is that of the LM741 which is one of the most commonly
used OPAMP. Give the name of terminals 1, 2, 3,4,5,6 and 7.
3
2
6
7
4
1
5
1.6 Consider the following table. Indicate by putting a cross in the appropriate cell,
the nature of the each component (Active or passive component).
Resistor Transistor Inductor Capacitor Diode
Active
component
Passive
component
1.7 What is the difference between a multiplexer and a demultiplexer?
1.8 Give two protective means against overheat of semiconductors.
REPUBLIC OF CAMEROONPeace Work Fatherland
GTHS KUMBO/ ELECT DPT
THIRD SEQUENCE EXAM
Class: F36
Option: Electrotechnology
Duration: 04H
Coefficient: 4
Written paper
ELECTRICAL, DIGITAL AND INDUSTRIAL CIRCUITS
No document is allowed except the one given tothe candidates b the examiners.
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GTHS KUMBO_Electrical Department_Third sequence examJan.2011 2
SECTION TWO: ANALOGUE CIRCUITS
Exercise 1: Alternating current.
Consider the circuit of figure 1 bellow.
L
Z
C
e1 e
A
B
Figure 1.
3. Using Nortons equivalent generator, determine the complex value of the
current iflowing in the load Z. Deduce its effective value.
4. Using Thevenins equivalent generator, determine the complex value of the
current iflowing in the load Z. Deduce its complex value.
Exercise 2: DC current.
The circuit of the figure 2 bellow is a voltage stabilizer.
RPR
U1
Uz
U2IB
Iz
I2
Figure 2.
1. Determine the maximal current IZmax of the Zener diode.
2. For U1 = 16V, determine the values of U2 and RP so that the current in the
diode must be maximal.
3. Using the value of RP obtained in question 2 above, determine the maximal
value of U1 for which the Zener diode is blocked (Iz = 0).
4. Using the value of RP obtained above, determine the current I2 and the
voltage U2 in the following cases: a) U1 = 10V; b) U1 = 14V.
e1 = 220V, e2 = j110V, ZL = j103, ZC = -j500,
Z = 103.
1. Determine the characteristics of the Nortons
equivalent generator seen from terminals A
and B.
2. Determine characteristics of the Thevenins
equivalent generator seen from terminals A
and B.
The voltage U1 varies
from 10V to 16 V.
The Zener diode is ideal
with PZmax = 15mW;
Uz = 12V. For the bipolar
transistor, take = 100,
VBE = 0.7V. Let
R = 300
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GTHS KUMBO_Electrical Department_Third sequence examJan.2011 3
Exercise 3: Bipolar transistor amplifier.
Consider the transistor amplifier circuit presented on the figure 3 below.
R G
C 1
R 2
R 1
R C
R EC E
R U
V C C
C 2
e
M
v 1
v 2
A. Static study:
Determine:
1. The currents flowing through the base (IB) and the emitter (IE) of the transistor.
2. The voltage VBM between the base and the ground M.
3. The current IP flowing in the resistor R1.
4. The value of the resistance R2.
B. Dynamic study:
1. Give the name and the role of capacitors C1, C2 and C3.
2. Draw a.c. equivalent circuit of the amplifier.
3. Determine the input resistance and the output resistance of the amplifier.
4. Calculate the voltage amplification factor.
Exercise 4: Operational amplifier.
The OPAMPs of figure 4 bellow are ideal.
R
R2
R1 E
VeVs
V
+Vcc
-Vcc
12
Figure 4.
For the transistor:
= 99; r = 2k ,
ICQ = 4.95mA, VBEQ = 0.7V.
Take: Vcc = 12V,
R1 = 2k, RC = 2k,
RU = 2k,
RE = 180
Figure 3.
We have R = 10, R1 = 4,R2 = 20, E =100mV and
Vcc = 12V
1. Give the operating
modes of the
OPAMPs 1 and 2.
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GTHS KUMBO_Electrical Department_Third sequence examJan.2011 4
2. The voltage Ve is a sinusoidal expressed as: tVe
100cos20 (mV).
a. Determine the expression of the of the output voltage V of the
OPAMP1.
b. Represent in terms of time the voltages Ve and V.3. Draw the waveform of the voltage Vs at the output of OPAMP2 knowing that E is a
DC source.
SECTION THREE: DIGITAL CIRCUITS.
1. Solve the following operations using 2s complement:
a) 11100002 1101112; b) 1001111012 110111102; c) 100000002 11111112.
2. The figure 5 bellow represents the circuit of a full adder, where A1 and B1 are
the in put variables. R1 is the carry while So and Ro are the sum and the
reminder respectively.
2.1 Complete the truth table bellow.
A1 B1 R1 So Ro
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
2.2 Simplify the expressions of So and Ro using Boolean algebra method.
2.3 Draw the logigram of this full adder using logic gates.
3. At the input of a decoder, one can place 64 different combinations. Determine:
a) The number of ways at the input of this decoder,
b) The number of ways at the output of this decoder.
SUBJECT MASTER: NGOUNE Jean-Paul,
PLET Electrotechnics, GTHS KUMBO.
Full Adder
A1
B1
R1
So
Ro
Figure 5.