Center for Power Electronics SystemsThe Bradley Department of Electrical and Computer Engineering
College of EngineeringVirginia Tech
Blacksburg, Virginia, USA
“EMI Mitigation and Containment in SiC-Based Modular UPS for
Commercial Applications”
Presented by:
Rolando Burgos
CPES-Consortium
WBGHPCS
CPES-Consortium
HDI
College ofEngineering
December 8 2015
Annual Meeting
“EMI Mitigation and Containment in SiC-Based Modular UPS for
Commercial Applications”
Rolando Burgos, Dushan Boroyevich
Center for Power Electronics Systems (CPES)Virginia Tech
January 17-19-2017March 2, 2017 Center for Power Electronics Systems 2
Commercial UPS System
Decentralized power architecture (DPA)
• Each module operates as standalone UPS unit
• Module features:–Rectifier, inverter, bypass switch
–Back-feed protection–Control logic–Displays & monitoring
Fault tolerant UPS design free of single points of failure
ABB Conceptpower DPA 500, 480 V, UL, 100 kW to 3 MW, modular UPS.
March 2, 2017 Center for Power Electronics Systems 3
Project Objectives
Objectives1. Mitigation and containment strategy for
EMI noise generated in SiC-based UPS power modules.
2. Compliance of applicable EMI standards and reliable operation of 100 kW SiC-based UPS module.
Why SiC?SiC will boost efficiency and help improve
power density of UPS
Key approachUse of impedance-based EMI noise
channeling to divert it from critical control pathsMinimize EMI noise generation within UPS
module SiC dv/dt > 50 V/ns, di/dt > 10 A/ns
March 2, 2017 Center for Power Electronics Systems 4
UPS Module Architecture
• Grid-interface active front-end (AFE) converter• DC-DC battery charger• Sine-wave voltage-source inverter (VSI)
480V Grid AC Load
UPS Module
With SiC,
Smaller Passives! 800
March 2, 2017 Center for Power Electronics Systems 6
Barrier to CommercializationInternal EMI propagation path EMI Standard
IEC62040
March 2, 2017 Center for Power Electronics Systems 7
Topology Selection
• Three-level is superior to two-level counterpart–Inherently lower voltage steps (Vdc/2) and common-mode (CM) voltage generation
–Greater freedom to mitigate CM voltage generation–Higher efficiency at higher switching frequencies
Frequency [MHz]100 101
-50
-40
-30
-20
-10
0
10
20
30
40
50Comparison of CM Noise spectrum W/ fsw = 100kHz
2-level3-level
SVPWM
6 dB reductionSVPWM
SVPWM
OOO POO PNNNOONPP
OONOPONPO PON
NPN OPN PPN
ONOOOPNOP PNO
NNP ONP PNP
March 2, 2017 Center for Power Electronics Systems 8
Topology Selection
2-Level MICROSEMI : 1.2 kV 42 A HB Module ( 49 Ω) CREE : 1.2 kV 59 A 6-pack Module ( 30 Ω)
3-Level NPCMICROSEMI : 1.2 kV 40 A NPCModule ( 49 Ω)
3-Level T-typeMICROSEMI : 1.2 kV 42 A HB Module+ 700 V 41 A Discrete MOSFET x 2
95.50%96.00%96.50%97.00%97.50%98.00%98.50%99.00%
10 60 110Switching Frequency [kHz]
Converter Efficiency at Tjunc = 502‐LEVEL CREE 6‐Pack NPC T‐type
March 2, 2017 Center for Power Electronics Systems 9
Battery Charger Topology
• Bi-directional dc-dc converter features:– CM voltage noise generation– Efficiency– Battery filter size– Neutral point balancing
Buck Three-Level Buck NPC PEBB-based Converter
March 2, 2017 Center for Power Electronics Systems 10
EMI Impact of Battery Charger
March 2, 2017 Center for Power Electronics Systems 11
?
AC-AC Converter CM Voltage Emissions
Requires formulation of three-port CM circuit model of UPS module
CM Circuit Model Derivation
Ground ofMain Grid Phase Output
to Heat Sink
DC-Bus to Heat Sink
Battery Cabinet to Earth Ground
Ground Impedance
Phase Output to Heat Sink
March 2, 2017 Center for Power Electronics Systems 12
CM Circuit of UPS Module
CM ac-to-ac stage
CM dc-to-dc stage
March 2, 2017 Center for Power Electronics Systems 13
Predicted EMI Noise Generation
Frequency [MHz]100 101
-100
-80
-60
-40
-20
0
20Comparison of CM Noise spectrum
BuckThree-level Buck (180deg)Three-level Buck (0deg)
~10 dB difference
Buck Converter
Three-Level Buck ConverterMarch 2, 2017 Center for Power Electronics Systems 14
Single CM-Pulse SVM with Neutral Point Balancing Capability
LMZ: Large + Medium + Zero vector sequenceMMS: Medium + Medium + Small vector sequence
LMZ( /6,0,0)
OOO POO PNNNOONPP
OONOPONPO
NPN OPN PPN
ONOOOPNOP PNO
NNP ONP PNP
PON
OOO POO PNNNOONPP
OONOPONPO
NPN OPN PPN
ONOOOPNOP PNO
NNP ONP PNP
PON
MMS(0,0, /6)
MMS2(0,0, /6)
OOO POO PNNNOONPP
OONOPONPO
NPN OPN PPN
ONOOOPNOP PNO
NNP ONP PNP
PON
March 2, 2017 Center for Power Electronics Systems 15
CM Voltage Evaluation
time [ms]0 5 10 15
-500
0
500SVPWM @ Fsw = 30kHz
time [ms]6.68 6.7 6.72 6.74 6.76
-500
0
500
time [ms]0 5 10 15
-500
0
500CMVR PWM @ Fsw = 30kHz
time [ms]6.68 6.7 6.72 6.74 6.76
-500
0
500Frequency [MHz]
100 101-60
-50
-40
-30
-20
-10
0
10
20
30Comparison of CM Noise spectrum: According to PWM
SV PWMSCMVP PWM
March 2, 2017 Center for Power Electronics Systems 16
Neutral-Point Voltage Balance
OOO POO PNNNOONPP
OONOPONPO
NPN OPN PPN
ONOOOPNOP PNO
NNP ONP PNP
PON
OOO POO PNNNOONPP
OONOPONPO
NPN OPN PPN
ONOOOPNOP PNO
NNP ONP PNP
PON
OOO POO PNNNOONPP
OONOPONPO
NPN OPN PPN
ONOOOPNOP PNO
NNP ONP PNP
PON
dVdc = VdcH-VdcL
PWM_Type
Sa, Sb, Sc
Common-Mode Voltage
-100
-50
0
0
1
2
0
0
0
× 1e-20.0 0.5 1.0 1.5 2.0 2.5 3.0
-200
0
200
I II
MMS
LMZ
MMS2
March 2, 2017 Center for Power Electronics Systems 17
Impedance-based Channeling of EMI Noise in WBG Converters
• Successfully applied to gate-drivers for SiC and GaN devices
• Power circuit presents low impedance path to EMI noise
GaN-based Three-phase VSI
106
107-10
0
10
20
30
40
50
60
Frequency (Hz)
dBuA
Blue: Gate driver logic path; Green: Gate drive power path; Red: power circuit
March 2, 2017 Center for Power Electronics Systems 19
Digital Control Platform
Control Board• High computing power:
TI28377D + FPGA
Sensor + ADC board• Measures at high
di/dt and high dv/dt• SPI communication
with control board
Gate driver board• High dv/dt immunity
(> 50 V/ns)
Optical IO interface• Gate signals • SPI Communication
with ADC board
March 2, 2017 Center for Power Electronics Systems 20
Next Steps
March 2, 2017 Center for Power Electronics Systems 21
• Power Stage Construction Testing– Gate-driver testing and SiC module double-pulse test– Busbar construction– Inverter-rectifier operation testing– Battery charger converter testing
• Controller Testing– Sensor + ADC board population– Test for SPI communication between main FPGA & multiple sensors
• Measurement of EMI emissions and design of input and output EMI filters