디지털계측제어계통의 plc 설계방향 · 2018-01-01 · - fagan inspection-unit testing -...

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-1- 디지털 계측제어계통의 PLC 설계 방향 디지털 디지털 계측제어계통의 계측제어계통의 PLC PLC 설계 설계 방향 방향 2007. 4. 5 원자력연구소 김창회 2007. 4. 5 원자력연구소 김창회

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Page 1: 디지털계측제어계통의 PLC 설계방향 · 2018-01-01 · - Fagan inspection-Unit Testing - Unit coding - Unit testing Codes - Fagan inspection-Formal V&V-NL-FM SDS Developer

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디지털 계측제어계통의PLC 설계 방향

디지털디지털 계측제어계통의계측제어계통의PLC PLC 설계설계 방향방향

2007. 4. 5

원자력연구소

김 창 회

2007. 4. 5

원자력연구소

김 창 회

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Table of Contents

안전등급 PLC (POSAFE-Q) 특징

POSAFE-Q 제공모듈들

POSAFE-Q 설계 기준

POSAFE-Q 설계 방법및절차

POSAFE-Q 시험종류및절차

완제품제작과정

분석보고서

3자검증결과

TR 작성

결론

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안전등급 PLC (FOSAFE-Q) 개발

1 단계(01.7.1 – 04.6.30)

2 단계(04.7.1 – 08.4.30)

완제품개발및인허가획득H/W & S/W Redesign 3rd Party ReviewPerformance Testing Qualification TestingLicensing

Req./Spec./Test(KAERI)

Design/Fab.(POSCON)

SW V&V(KAERI)

3rd Party Review

Prototype 개발H/W & S/W Spec.H/W & S/W DesignFunction & Performance Testing Qualification Testing

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안전등급 PLC (POSAFE-Q) 특징

원전 Q-Class 기준에따라개발

(IEEE Std. 7-4.3.2 기준만족) RPS, CPCS, ESF-CCS 에서요구하는응답시간만족

결정론적통신프로토콜적용으로통신망신뢰도증대

안전계통에서요구하는신뢰도를만족시키기위해설계단계에서신뢰도분석수행

다양한온-라인자가진단기능제공으로신뢰성증대및유지보수편리 (Loopback, Watchdog 등) 다양한통신기능제공으로모든안전계통구현편리

시뮬레이션기능제공으로안전계통프로그램개발용이

Open Architecture PLC

Master Local Bus Extension #2

Slave Local Bus Extension #1

Slave Local Bus Extension #7

FMS Station

DP Master Station

DP Slav Station #2#1

Profibus-FMS up to 12Mbps

Master Local Bus Extension #0

Slave Local Bus Extension #1

Slave Local Bus Extension #7

DP Master Station

DP Slav Station #0

Profibus-DP up to 12Mbps

RS-232C

pSET Engineering Station

Master Local Bus Extension #2

Slave Local Bus Extension #1

Slave Local Bus Extension #7

FMS Station

DP Master Station

DP Slav Station #2#1

Profibus-FMS up to 12Mbps

Master Local Bus Extension #0

Slave Local Bus Extension #1

Slave Local Bus Extension #7

DP Master Station

DP Slav Station #0

Profibus-DP up to 12Mbps

RS-232C

pSET Engineering Station

Redundant CPU & I/O Extension

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482.6 x 281.35 x 294mm(19 inch Standard)

POSAFE-Q 제공 모듈들 (1/2)

Processor Module CPU 단중화 Processor ModuleCPU 이중화 Processor Module

Communication Module HR-SDL Module HR-SDN ModuleProfibus-FMS Module ProfiNet ModuleEtherNet Module

Redundant CPU Extend I/O

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POSAFE-Q 제공 모듈들 (2/2)

I/O Module Digital Input

24VDC, 48VDC120VAC, 230VAC

Digital Output24VDC, 48VDC, 125VDC110~220VACRelay Output

특수모듈Analog Input, Analog Output Pulse Counter Module RTD 모듈

TC 모듈

I/O Extension Module

엔지니어링도구(pSET)

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새롭게개발된안전등급 PLC

POSAFE-Q 설계 기준

H/W QualityIEEE Std. Safety Class 1E Seismic Category 1 Quality Class 1

APR-1400 안전계통을 위한 PLC기능 및 성능 만족10CFR50, Appendix B QA 요건만족

EPRI TR-107330 요건및사양만족

IEEE Std. 7-4.3.2 설계기준만족(통신, 소프트웨어)

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POSAFE-Q Overall Design Process

S/WCoding

H/W제작

PLC요건

IntegrationAnd Test

H/W상세설계

PLC 사양

S/W요건

S/W사양

H/W개념설계

완제품제작

ComponentTest

IntegrationTest

SystemTest

EQTest

PerformanceTest

3자인증시험

Hardware/Software Co-Design

Test Procedure

분석보고서

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POSAFE-Q H/W 개발 절차

Prototype Design Prototype Design

FMEA & component failure rate analysis

FMEA & component failure rate analysis

AgingAging

FabricationFabrication

Operability and PerformanceTestOperability and PerformanceTest

Equipment Qualification TestEquipment Qualification Test

End ProductEnd Product

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POSAFE-Q S/W 개발 절차 (1/2)

S/W 개발계획및절차에따라개발USNRC Reg. Guide 1.173IEEE Std. 1074

Sructural development method 적용Formal method based SRS/SDS (State Chart, SDL)

S/W V&V 계획및절차에따라검증USNRC Reg. Guide 1.172IEEE Std. 1012 Independent reviewer

KAERI 인허가과제

iSTec : RTOS, HR-SDL S/W

시험계획및절차에따라시험Component test Integration testSystem test

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POSAFE-Q S/W 개발 절차 (2/2)

I/OI/OModulesModules

FirmwareFirmware

PsetPset

EditorEditor

CompilerCompiler

LinkerLinker

CPUCPUModuleModule

AgentAgent

RTRT--OSOS(pCOS)(pCOS)

Comm.Comm.ModuleModule

NetworkNetworkInterfaceInterface

DriveDrive

- Fagan inspection- Unit Testing

- Unit coding- Unit testing

Codes

- Fagan inspection- Formal V&V

- NL- FM

SDS

ReviewerDeveloper

- Fagan inspection- Integ. Testing

- Code Integ.- Integ. testing

Integration

- Fagan inspection- Formal V&V

- NL- FM

SRS

• Traceability• Completeness• Consistency• Correctness• Safety

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Test Procedure

Developing PhaseQualification

Manufacture &Project PhaseQualification

Operability &Performance Test

Requirement & Specification Review

Component Test

Hardware Software

Integration Test

System Test

Equipment Qualification

Installation Test

Factory Acceptance TestManufacturing

Tests

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Component Test

목적

: H/W 및 S/W component 기능/성능시험

시험항목Hardware component

Unit H/W modules TimerAmplifier circuitWatchdog timer circuitA/D and D/A convert circuitLoopback circuitsLED circuits, etc.

Software component Unit S/W subroutine (sub-functions)

Black box Test : External check of the subroutine White box Test : Internal check of the subroutine

- H/W Component- S/W Component

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Integration Test

목적 : H/W 및 S/W component 통합에따른기능/성능시험

시험항목H/W Integration Test

단위 H/W circuit 통합에따른시험

S/W Integration Test S/W subroutine들의 통합에따른시험

H/W and S/W Integration TestH/W와 S/W들의통합에따른시험

Processor Module과의통합시험

각모듈과 PM의통합에따른시험

- H/W + S/W Component- Integration with Processor

Module

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System Test

목적 : 안전계통 Platform으로

PLC 기능/성능시험

시험항목Response time testI/O capabilities testMemory capacity and data retention capability test HR-SDL performance testHR-SDN performance testProfibus-FMS performance test Error Handling capability test

시험범위안전계통적용을위한모든구성

Page 16: 디지털계측제어계통의 PLC 설계방향 · 2018-01-01 · - Fagan inspection-Unit Testing - Unit coding - Unit testing Codes - Fagan inspection-Formal V&V-NL-FM SDS Developer

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Equipment Qualification Test

목적 : Harsh Environment에서

안전기능을수행할수 있음을검증

시험항목Aging Environmental TestSeismic TestEMI/RFI TestSurge Test1E/Non 1E Isolation Test

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완제품 제작

ICT

완제품(개발)

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중요 분석보고서

통신망 Deterministic 분석대상 : HR-SDL, Profibus-FMS내용 : NUREG/CR-6082 기준

전송시간분석

Data Packet 및 Token Packet 오류발생주기분석

Token Packet 오류발생시회복시간분석

결론 : 매 10ms 마다 250byte 데이터전송가능

RTOS 최적화분석대상 : pCOS내용및결론

사용되지 않는 함수 및 변수 : 102개 삭제

무의미한 구문 : 1개 삭제

비효율적인 코드 : 32개 수정

PLC H/W 신뢰도분석

PLC FMEA 분석

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RTOS (pCOS) & HR-SDL 3rd Party Review (1/2)

목적 : 해외수출및국내원전적용을위한인허가확보

인증기관 : GRS iSTec (German)검증방법

개발및 V&V 결과에따른 Consistency Check, Formal Check, Functional Check 수행

미해결문제목록(List of Open Point)를발행하여개발자가 LOP에따라설계변경

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RTOS (pCOS) & HR-SDL 3rd Party Review (2/2)

제출문건 : 24종설계문건

Design Req., Design Spec., Concept ReportSRS, SDS, Source CodeCT Plan/Procedure/Report, IT Plan/Procedure/Report

V&V 문건

V&V Report for SRS, SDS, Safety Analysis Report

검증기준IEEE 7-4.3.2IEC 60880

검증완료 : 2006. 12. 31 RTOS : 24개 LOPsHR-SDL: 15개 LOPs

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상용 등급 인증

대상 : Profibus-FMS 방법 : COTS Dedication Methods 1&2,4 적용

Special Purpose Testing : Method 1 TTA, PNO 인증

Commercial Grade Survey : Method 2 독일/HilScher사현장실사

Survey of Product Development RecordOperating Experience Data : Method 4

Operating History Record 수집

Page 22: 디지털계측제어계통의 PLC 설계방향 · 2018-01-01 · - Fagan inspection-Unit Testing - Unit coding - Unit testing Codes - Fagan inspection-Formal V&V-NL-FM SDS Developer

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TR 작성

특정기술주제보고서

안전등급 제어기 (POSAFE-Q)

부록1: IDiPS RPS 부록2: IDiPS ESF-CCS

2006. 5

두산중공업주식회사 포스콘주식회사 한국원자력연구소

Page 23: 디지털계측제어계통의 PLC 설계방향 · 2018-01-01 · - Fagan inspection-Unit Testing - Unit coding - Unit testing Codes - Fagan inspection-Formal V&V-NL-FM SDS Developer

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결 론

POSAFE-Q? IEEE 7-4.3.2 개발방법만족

EPRI-TR 107330 요건및사양만족

EPRI-TR 107330 각요건항목만족성평가 : TR 부록에추가

POSAFE-Q 인허가적합성개발및 V&V 문서 : 450 건EQ 시험완료

RTOS, HR-SDL 3rd Party Review 완료

Profibus-FMS 상용등급인증

통신망 Deterministic 분석보고서등각종분석보고서작성

운전이력확보울진 1&2호기 CCMS 설치 : 2007년 8월포항제철선제공장설치 : 2007년 6월RCOPS 적용가능성분석중

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