lecture2 binary multiplication

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1 Lecture 2-3: Data Representation Binary Integer Representation – Multiplication

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Page 1: Lecture2 binary multiplication

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Lecture 2-3: Data Representation

Binary Integer Representation – Multiplication

Page 2: Lecture2 binary multiplication

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Recap

● Computers use finite-precision numbers of fixed length (typically 32-bit)

● Two's complement representation allows us to efficiently represent binary integers

– the first bit acts as a sign bit

– only one representation for 0

– there is one more negative number than there are positive numbers

● Two's complement arithmetic

– addition is straightforward

– subtraction is performed by adding the negation of a number

Page 3: Lecture2 binary multiplication

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Hardware for Addition and Subtraction

Page 4: Lecture2 binary multiplication

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2C Multiplication

● Straightforward “unsigned” multiplication will not work if either (or if both) the multiplicand or the multiplier are negative

1011 multiplicand 11 -5

x 1101 multiplier x 13 x -3

00001011 partial products 33 -113

00000000 11

00101100 143

01011000

10001111

Page 5: Lecture2 binary multiplication

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Why doesn't it work?

● If the multiplicand is negative

– the sign bits in the partial products do not align

– this can be solved using sign extension (see next slide)

● If the multiplier is negative

– the 1s do not correspond with the shifts● e.g. multiplying by 1101 (-3) should not have shifts in the first, third

and fourth partial products

Page 6: Lecture2 binary multiplication

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Conversion between different word lengths

● E.g. in Java: store an int as a long

● Converting signed magnitude is easy

– rule: move the sign bit to the new left-most position and fill with zeros

● 1001 0010 becomes 1000 0000 0001 0010

● Two's complement rule for sign extension

– move the sign bit to the new left-most position and fill with copies of the sign bit: for positive numbers fill with zeros, for negative numbers fill with ones

● 1110 1110 becomes 1111 1111 1110 1110

Page 7: Lecture2 binary multiplication

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2C Multiplication using Sign Extension

● When multiplying two 2C numbers where the multiplicand is negative and the multiplier is positive, we must sign-extend the partial products

– When multiplying two n-bit numbers, the product occupies 2n bits

– This means we must sign-extend the partial products to ensure they each occupy 2n bits

1001 (-7)

x 0011 (3)

11111001 (-7)

11110010 (-14)

(1)11101011 (-21)

Page 8: Lecture2 binary multiplication

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How to solve the 2C Multiplication Problem

● A naïve way

– convert both operands into positive numbers ● to negate a number, complement that number and add 1

– do unsigned positional multiplication (see following slides)

– if the sign of the operands differ, negate the result

– this approach is not very efficient

● A more efficient approach

– Booth's algorithm

Page 9: Lecture2 binary multiplication

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Unsigned Multiplication (1)

● Four registers are used in the order C, A, Q

– C is a 1-bit register initialised to 0● this holds a potential carry bit resulting from addition

– A is initially set to 0 (each bit in the A register is set to 0)

– Q initially holds the multiplier

– M holds the multiplicand

● Multiplication of two n-bit integers results in a product of up to 2n

– the product is stored in the A and Q registers

● This algorithm will not work for multiplying negative numbers that are represented using two's complement

Page 10: Lecture2 binary multiplication

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Unsigned Multiplication (2)

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Unsigned Multiplication (3)

● If Q0 is 1(where Q

0 is the right-most or least significant bit of Q)

– add the multiplicand to the number in the A register (the result is stored in the A register with the C bit used for overflow)

– then shift all of the bits in the C, A and Q registers to the right by one bit (Register Shift Right or RSR – see next slide)

● Else if Q0 is 0

– shift all of the bits in the C, A and Q registers to the right by one bit (RSR – see next slide)

● Repeat this process for each bit of the original multiplier

● The resulting 2n-bit product is contained in the A and Q registers

Page 12: Lecture2 binary multiplication

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Register Shifts

● Registers can have various operations performed on them

– e.g. register shift (left or right – RSL, RSR)

– RSL – the contents are shifted to the left by one bit● the left-most bit is discarded, the right-most bit is filled with 0

0100 1000 0100 1001 becomes 1001 0000 1001 0010● this multiplies the original number by 2

– RSR – the contents are shifted to the right by one bit● the right-most bit is discarded, the left-most bit is filled with 0

0100 1000 0100 1001 becomes 0010 0100 0010 0100● this divides the original number by 2

Page 13: Lecture2 binary multiplication

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Unsigned Multiplication – Example

Page 14: Lecture2 binary multiplication

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Booth's Algorithm (1)

● Booth's algorithm can be used to multiply two numbers represented using two's complement (2C)

● Booth's algorithm will work for both positive and negative numbers represented using 2C

● The algorithm uses a combination of addition, subtraction and Arithmetic Right Shifts (see later slide)

– subtraction is performed by taking the two's complement of the subtrahend (the number to be subtracted) and adding it to the minuend

Page 15: Lecture2 binary multiplication

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Booth's Algorithm (2)

● Booth's algorithm uses the following 4 registers (the first 3 registers are ordered A, Q, Q

-1)

– A – each bit in A is initialised to 0● A is reused and eventually stores the most-significant bits of the result● A is the same size as M

– Q is initialised to store the multiplier● Q is reused and eventually stores the least-significant bits of the result

– Q -1

is initialised to 0

● this is placed to the right of Q● this is a 1-bit register which remembers the least-significant bit of Q

(Q0)

– M stores the multiplicand

Page 16: Lecture2 binary multiplication

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Booth's Algorithm (3)

● If Q0 and Q

-1 are the same (e.g. Q

0 = 1, Q

-1 = 1 or Q

0 = 0, Q

-1 = 0)

– shift all of the bits of the A, Q, and Q-1 registers to the right

(Arithmetic Shift Right, ASR – see next slide)

● Else

– if Q0 is 0 and Q

-1 is 1, add the multiplicand to the contents of the A

register

– else if Q0 is 1 and Q

-1 is 0, subtract the multiplicand from the

contents of the A register

– shift all of the bits of the A, Q, and Q-1 registers to the right (ASR)

● Repeat for each bit of the multiplier

● The product is stored in the A and Q registers

Page 17: Lecture2 binary multiplication

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Arithmetic Shifts

● For two's complement, RSL and RSR are not applicable

– the sign of the number being shifted must be preserved

● An arithmetic shift preserves the sign of the left-most bit

– ASL – the contents are shifted to the left by one bit

● 1000 1111 becomes 1001 1110● 1101 becomes 1010

– ASR – the contents are shifted to the right by one bit

● 1101 becomes 1110● 0101 becomes 0010

Page 18: Lecture2 binary multiplication

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Booth's Algorithm (4)

Page 19: Lecture2 binary multiplication

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Booth's Algorithm Example

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Why does Booth's algorithm work?

● Booth's algorithm acts on blocks of 1s

– M x (2n + 2n-1 + 2n-2 + .. + 2n-k) = M x (2n+1 – 2n-k)

– subtraction is only performed when a block of 1s begins, and addition is only performed when the block ends – it shifts every time (ASR)

– the algorithm therefore performs fewer additions and subtractions (i.e. other algorithms perform one addition for every 1 that occurs in the multiplier)

Page 21: Lecture2 binary multiplication

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Booth's Algorithm

● Booth's algorithm uses solely arithmetic shifts, addition and subtraction

– where subtraction is negation followed by addition

– this means that multiplication is performed by combination of addition and arithmetic shifts

● Booth's algorithm works on two's complement and unsigned multiplication

Page 22: Lecture2 binary multiplication

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Checkpoint – Two's Complement

● Conversion to and from 2C

● Conversion between different bit lengths

● Negating numbers

● Adding numbers

– detecting overflow

● Subtracting numbers

● Multiplying numbers

– Booth's algorithm

● Further reading

– Computer Organisation and Architecture, William Stallings