AVRATMega16

AVR

AVRATMega16

AVR

AVR

DIP

(in-circiut programming)

desktop

MOSI

MISOSCK ̅̅ ̅̅ ̅̅ ̅GND

ΩMOSIT

MISOSCKDontronic

AVRProg

STK500JTAGICEIIAVR109

AVRProgAVR

header

I/Oclock

(toggle)

clockC

ATMega16VGND

μF

clock

C

clock

LED

LED

scan

C

Cpull-up

DC

ATMega16

shift

dispscan(RAM)dispbuf

DC

(PORTD)PORTC

highDlow

high

void dispscan(void){ int i, j; char digsel = 0xfe; // pattern to turn on first digit for(i=0; i<4; i++){ PORTD = dispbuf[i]; // pattern for ith digit from display buffer PORTC = digsel; // turn on the ith digit for(j=0; j<2000; j++); // wait for some time, for example 250μs, for 100 scans per second PORTD = 0xff; // turn off all digits digsel=(digsel<<1)+1; // point to the next digit } }

keyscan

C

CCt

t

char keyscan(void){ int i, j, keycode=0; char colsel = 0xfe, t; for(i=0; i<4; i++){ PORTC = colsel; for(j=0; j<2; j++); // some delay to let row data become valid t = PINC; for(j=0; j<4; j++){ if(!(t & 0x80)) return(keycode);

keycode++; t<<=1; } colsel=colsel<<=1+1; } return(keycode); } (look-up table)

keyto7seg

D

char keyto7seg(char keycode){ // key code for a sample 3x4 keboard follows // key number 0 1 2 3 4 5 6 7 8 9 * # nothing // key code 1 11 10 9 8 7 6 5 4 3 2 0 16 //7segment code 0x82 0xb7 0xc1 0xa1 0xb4 0xa8 0x88 0xb3 0x80 0xa0 0xdc 0x8d 0xe9 char table[]={0x8d,0x82,0xdc,0xa0,0x80,0xb3,0x88,0xa8,0xb4,0xa1,0xc1,0xb7,0xe9}; return(table[keycode]); }

C

#asm sseg_scan: ldi r19,$fe ldi YREGLOW,low(DISPBUF) ldi YREGHIGH,high(DISPBUF) nxt_7seg: ld r20,Y+ out PORTD,r20 out PORTC,r19 call seg_delay ser r20 out PORTD,r20 sec rol r19 brcs nxt_7seg ret seg_delay: // delay on each 7segment push r16 push r17 ldi r17,20 sdel2: ldi r16,0 sdel1: dec r16 brne sdel1 dec r17 brne sdel2 pop r17 pop r16 ret key_scan: ldi r18,0 ldi r16, $fe knxtclmn: out PORTC,r16 nop nop nop

in r15,PIND ldi r17,4 knxtrow: lsl r15 brcs nokey ret nokey: inc r18 dec r17 brne knxtrow sec rol r16 sbrs r16,4 ret rjmp knxtclmn kcode2seg: ldi YREGLOW,low(KCODETAB) ldi YREGHIGH,high(KCODETAB) add YREGLOW,r18 ld r18,Y ret #endasm

RS232

“1”“0”

start bit

parity

“1”

stop bit

“1”idle

bps

RS232DD

“1”“0”

stopidlestart

“1”

“0”framing error

parity error

o

o

o

o USART

ATMega1655H

TXDATMegalevel converter

D

USARTUSART

EQUDEF

#asm .equ PORTA = $1b .equ PINA = $19 .equ PORTB = $18 .equ PINB = $16 .equ PORTC = $15 .equ PINC = $13 .equ PORTD = $12 .equ PIND = $10 .equ DISPBUF = $800 .equ KCODETAB = $810 .def XREGLOW = r26 .def XREGHIGH = r27 .def YREGLOW = r28 .def YREGHIGH = r29 .def ZREGLOW = r30 .def ZREGHIGH = r31 #endasm

bit_delayhbit_delay

( ) hbit_delaybit_delay

MHz

pushpop

#asm bit_delay: push r16 //2 push r17 //2 ldi r17,1 //1 bdel2: ldi r16,26 //1 bdel1: dec r16 //1 brne bdel1 //2 on jump - 1 for next instruction // loop1 length = 3*r16-1 dec r17 //1 brne bdel2 //2 on jump - 1 for next instruction // loop2 length = (4+loop1)*r17-1 pop r17 //2 pop r16 //2 ret //4 //total delay = 13+loop2 hbit_delay: push r16 //2 push r17 //2 ldi r17,1 //1 hbdel2: ldi r16,43 //1 hbdel1:

dec r16 //1 brne hbdel1 //2 on jump - 1 for next instruction // loop1 length = 3*r16-1 dec r17 //1 brne hbdel2 //2 on jump - 1 for next instruction // loop2 length = (4+loop1)*r17-1 pop r17 //2 pop r16 //2 ret //4 //total delay = 13+loop2 #endasm

send7

D

CYstackC

Y+0

void send7(char a){ #asm send_7bit: ldd r19,Y+0 cbi PORTD,1 call bit_delay ldi r16,7 nxt_bit: in r17,PORTD //1 bst r19,0 //1 bld r17,1 //1 out PORTD,r17 //1 lsr r19 //1 call bit_delay //3 dec r16 //1 brne nxt_bit //2 sbi PORTD,1 call bit_delay ret #endasm }

receive7D

r30C

char receive7(void){ #asm receive_7bit: ldi r18,0 till_reset: in r17,PIND //1 andi r17,1 //1 brne till_reset //2-1 call hbit_delay //4 ldi r16,7 //1 rnxt_bit: clc //1 sbic PIND,0 //1-2 sec //1 ror r18 //1 call bit_delay //4 dec r16 //1 brne rnxt_bit //2 clc ror r18

mov r30,r18 #endasm }

10

101000 █▌█▌▌ 0 010100 ▌█▌█▌ 1 001010 ▌█▌█▌ 2 000101 ▌▌█▌█ 3 100100 █▌▌█▌ 4 010010 ▌█▌█▌ 5 001001 ▌█▌▌█ 6 100010 █▌▌█▌ 7 010001 ▌█▌▌█ 8 100001 █▌▌▌█ 9 00000 ▌█ 00000 ▌

“1”“0”

(LED)

(RS232)

SISO

fsωsG(z)z

G(s)s

fdatoolMatlab

IIRFIR

filter coefficients

biai

siso ( ) ( )

( ) ∑

∑

mn

( ) ∑

∑

z

z-1∑ ( ) ∑ ( )

( )

( ∑ ( )

∑ ( ))

a0FIRIIRFIR

IIR

fsωs

ADCDC

DACDCdn

DACDC

jω

Direct Digital Synthesis : DDS

DACATMegaDAC

PWM

PWM

MHz

TopPD7:OC2

DDS

Hz3ldi r23,

R11R12R13R14

PWMHz

01

RCμsμs

kHzDAC

ADCa1a2b0b1b2

–a1–a2a1a21/a0gainb0b1b2

fdatool1/a0

broundoff

ADCVADCAVrefADC

80H

xy

r30

80hr31

PWM

#include <stdio.h> #include <mega16.h> #define _a1 0x60; #define _a2 0x62; #define _b0 0x64; #define _b1 0x66; #define _b2 0x68; #define _xn 0x6a; #define _xn_1 0x6c; #define _xn_2 0x6e; #define _yn_1 0x70; #define _yn_2 0x72; #define _gain 0x74; register char reg11 @11; register char reg12 @12; register char reg13 @13; register char reg14 @14; int a1 @_a1; int a2 @_a2; int b0 @_b0; int b1 @_b1; int b2 @_b2; int xn @_xn;

int xn_1 @_xn_1; int xn_2 @_xn_2; int yn_1 @_yn_1; int yn_2 @_yn_2; int gain @_gain; #pragma savereg- #pragma warn- interrupt [ADC_INT] void adc_isr(void){ #asm clr r27 ;permanent zero clr r24 ;clear 24 bit result reg; msb to lsb => r31:r30:r24 clr r30 clr r31 in r20,$05 ;read from ADC clr r21 subi r20,$80 sbc r21,r27 ;x(n), prepared from data input, now is in r21:r20 push r20 push r21 lds r22, _b0 ;load b0 from RAM lds r23, _b0+1 call mult_acc ; b0*x(n) lds r22, _b1 ;load b1 from RAM lds r23, _b1+1 lds r20, _xn_1 ;load x(n-1) from RAM lds r21, _xn_1+1 call mult_acc ; b1*x(n-1) lds r22, _b2 ;load b2 from RAM lds r23, _b2+1 lds r20, _xn_2 ;load x(n-2) from RAM lds r21, _xn_2+1 call mult_acc ; b2*x(n-2) lds r22, _a1 ;load -a1 from RAM lds r23, _a1+1 lds r20, _yn_1 ;load y(n-1) from RAM lds r21, _yn_1+1 call mult_acc ; -a1*y(n-1) lds r22, _a2 ;load -a2 from RAM lds r23, _a2+1 lds r20, _yn_2 ;load y(n-2) from RAM lds r21, _yn_2+1 call mult_acc ; -a2*y(n-2) ;now store newly generated data into previous ones for nest iteration lds r20, _xn_1 ;load x(n-1) from RAM lds r21, _xn_1+1 sts _xn_2, r20 ;store x(n-2) to RAM sts _xn_2+1, r21 pop r21 ;retrieve x(n) to put in x(n-1) pop r20

sts _xn_1, r20 ;store x(n-1) to RAM sts _xn_1+1, r21 lds r20, _yn_1 ;load y(n-1) from RAM lds r21, _yn_1+1 sts _yn_2, r20 ;store y(n-2) to RAM sts _yn_2+1, r21 sts _yn_1, r30 ;store new output as y(n-1) to RAM sts _yn_1+1, r31 ldi r20,$80 add r20,r30 out $2a,r20 ;out to PWM timer0 dec r15 brne mm2 dec r16 brne mm2 ldi r23,$10 mov r16,r23 in r23,$16 ldi r24,$08 eor r23,r24 out $18,r23 mm2: #endasm } #asm mult_acc: muls r23, r21 ; (signed)p1-high * (signed)p2-high add r31, r0 mul r22, r20 ; p1-low * p2-low add r24, r0 adc r30, r1 adc r31, r27 mulsu r23, r20 ; (signed) p1-high * p2-low add r30, r0 adc r31, r1 mulsu r21, r22 ; (signed) p2-high * p1-low add r30, r0 adc r31, r1 ret #endasm #pragma savereg+ #pragma warn+ #pragma savereg- #pragma warn- interrupt [TIM2_OVF] void timer2_ovf_isr(void){ #asm dec r14 brne m2 ldi r23,3 mov r14,r23 // sinusoid has a cycle of 57 iterations mov r22,r11 mov r23,r13

muls r22,r23 lsl r0 rol r1 lsl r0 rol r1 sub r1,r12 mov r12,r11 mov r11,r1 ldi r23,$80 add r23,r1 out $23,r23 brcc m1 sbi $18,0 rjmp m2 m1: cbi $18,0 m2: #endasm } #pragma savereg+ #pragma warn+ void main(void){ a1=455; a2=-208; b0=1; b1=3; b2=1; PORTA=0x00; DDRA=0x00; PORTB=0x00; DDRB=0x19; PORTC=0x00; DDRC=0x00; PORTD=0x00; DDRD=0xA0; TCCR0=0x0A; TCNT0=0x00; OCR0=0xFA; TCCR1A=0x81; TCCR1B=0x09; TCNT1H=0x00; TCNT1L=0x00; ICR1H=0x00; ICR1L=0x00; OCR1AH=0x00; OCR1AL=0x00; OCR1BH=0x00; OCR1BL=0x00; ASSR=0x00; TCCR2=0x69; TCNT2=0x00; OCR2=0x00;

MCUCR=0x00; MCUCSR=0x00; // Timer(s)/Counter(s) Interrupt(s) initialization TIMSK=0x42; //0x12; //0x12; //0x40; UCSRA=0x00; UCSRB=0xD8; UCSRC=0x86; UBRRH=0x00; UBRRL=0x67; ACSR=0x80; SFIOR=0x00; // ADC initialization // ADC Clock frequency: 250.000 kHz // ADC Voltage Reference: AREF pin // ADC Auto Trigger Source: Timer0 Compare Match // Only the 8 most significant bits of // the AD conversion result are used ADMUX=0xE0; //FIRST_ADC_INPUT | (ADC_VREF_TYPE & 0xff); ADCSRA=0xAE; SFIOR&=0x1F; SFIOR|=0x60; reg11=0xfb; reg12=0x06; reg13=0x7f; #asm("sei") while (1){ } }

Oversampling DAC

Σ-Δ

PCM

Delta Modulation

(forward)

±1

Simulink

ADCDAC

(ADC)

ADC

ADC

(Oversampling ADC)

dithering

ADC49999

offset

(offset)

VVATMega

(bandgap ref voltage)

V±

qtzrATMegaVin

(Ain1)AB

V V±V

kHz