μComputer Structure

μProcessor

Memory

Bus System

I/O Ports

PPI (INTEL) 8255 , PIA (MOTOROLA) 6821 I Port O Port

Thermocouple

Amplifier

AD Converter

Temperature

mV

V

Word

DA Converter

Driving Circuit

Valve

Word

V

Hydraulic or Electric Signal

Flow Control

Memory

memory address content

FFFFFH

00000H

00001H

00002H

F1H

29H

D5H

00H

23H

78H

Address Space

8 bits20 bits

Volatile: RAMs (R,W)

Non-volatile: ROM, PROM, EPROM, EEPROM

The μProcessor

The 8086 or 8088 μP

Available in 40 Pins DIP

• Performs arithmetic and logical operations

• Decodes program instructions

• Controls the μComputer operation

• Contains some memory

μP = CPU

The System Bus

Address Bus

Data Bus

Control Bus

The address bus contains 16 unidirectional lines

The data bus contains 8 bidirectional lines

The control bus is made of individual lines that are unidirectional in most of the cases, but sometimes are bidirectional

Program Execution

μP memory

Address Bus

Data Bus

Program counter Address decoder

Instructions & dataInstruction register

Instruction decoder

12 3

4

56

7

8

μP History

1973 8-bit Word 8080 INTEL

1974 4-bit Word 4040 INTEL

1974 4-bit Word TMS1000 Texas Instruments

1974 8-bit Word F8 Fairchild

1974 8-bit Word 6800 MOTOROLA

1975 8-bit Word 6502 COMMODORE

1976 8-bit Word 8085 ÌNTEL

1976 8-bit Word Z80 ZILOG

1978 16-bit Word 8086 INTEL

1980 16-bit Word 8088 INTEL

1980 16-bit Word 68000 MOTOROLA

Introduction to μP

Microprocessors and Peripherals

Brey

Merrill

ISBN: 0-675-20884-X

How A 16 bit word is stored in 2 consecutive 8 bit memory locations

ABCDH00724H

00725H

CDH

ABH

Software Model of the 8086 or 8088 μP8086 or 8088 μP

AH

BH

CHDH

ALBL

CLDL

Data Registers

Segment Registers

CSDSSSES

Index RegistersSIDI

Pointer

RegistersSPBP

IPInstruction

Pointer

SRStatus register

9 bits

AX

BX

CX

DX

XXXX0H

Memory Segmentation

CS

DS

SS

ES

Code Segment

Data Segment

Stack Segment

Extra Segment

00000H

FFFFFH

64KB

64KB

64KB

64KB

XXXX0H

XXXX0H

XXXX0H

Physical Address

Dedicated and General Use of Memory

0H

7FH

80H

FFFEFH

FFFFFH

128 Bytes to store pointers to interrupt service routines

Each pointer requires 4 memory locations

Open memory

reserved

reserved

12 Bytes

Physical &Logical Addresses

02800H

02801H

02802H

02803H

02804H

02805H

02806H

02807H

02808H

02809H

0280AH

0280BHPhysical Address

Segment Base

Offset

000BHLogical Address

0280H:000BH

0280BH

Address of the next instruction to be executed

Instruction Pointer1234H+

Code Segment8888H

Physical address 89AB4H

Logical address 8888H:1234H

88880H +1234H = 89AB4H

General purpose registers

AX

BXCX

DX

Accumulator register

Base registerCount register

Data register

Pointer & Index Registers

SP

BP

Stack pointer

Base pointer

SS:SP points to the top of the stack

The top of the stack is the next stack location that can accessed

SS:BP is used in the based addressing mode

SS:BP can be used to examine the values of the parameters passed to a subroutine and held in the stack

SI

DI

Source index

Destination index

DS:SI

DS:DI

Indexed type of addressing

For indexing source or destination addresses

Status Register

CFPFAFZFSFOFIFDFTF

Control flags Status flags

carry

parity

auxiliary carry

zero

sign

overflow

trap

direction

Interrupt

enable

CY, NC