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TRANSCRIPT
Packaging Breakthrough in Wearable Devices
Charles Chen (陳南誠), Ph.D. 聯發科技 MediaTek Inc.
Outline • Preface
• The World of Wearables
• Opportunities & Challenges
• Conclusion
=
1X
1990 2010 2030
PC (Unit: Home)
Mobile
Internet (Unit: Person)
IoT (Unit: Thing)
10X ~1000X
Emerging IoT Opportunities
IoT : Better Life and Efficiency
Smart Home
Smart Car
Smart Health
Smart City
Smart Industry
• Smart bulb • Safety monitor • Smoke detection • Smart devices • Temperature control • Power saving • Pet care • Video entertainment
• Internet of vehicle • Route planning • V2V communication • Accident warning • Entertainment • 360 degree view • Smart parking • Autonomous drive
• Remote care • Health monitor • Pharmacy reminding • Remote medical treatment • Self examination • workout record • Food safety
• Smart lighting • Energy saving • Smart building • Smart transportation • Disaster prevention • Smart grid • Environmental protection
• Industry 4.0 • Connected robots • Smart factory • Remote monitor • Accident prevention • Big data analysis • Waste management • Energy saving
IoT Applications
Connected Devices
Cloud 1.0 Wearable and
IoT devices Local Clouds:
Personal & Home Big Data Analytics
& Services
Everything Connected!
Wireless Power
Form factor
Multi-die package
Power consumption
RF designs
Cost
Various applications
Miniaturization
Low power
Cost effective
Time to market
The Challenges of Wearable Device (from Package Perspectives)
Design Factors of Wearable/IoT Devices
Low Power Form Factor
Cost Effective Performance
Wireless Power
Low Power
IoT/Wearable SiP
Memory ASIC L
Courtesy of Amkor
Aster Hardware Platform Feature
User Interfaces
Extensions
Power Management
Sensor Interfaces Card Interfaces
New Delhi
25*
5 m/s 14 Nov
27* 20*
Aster is Smallest SOC
& Highest Integration with Bluetooth dual stacks
MCU
3.6x4.0mm
3.27x3.52mm
BT
Total Size: 141mm2
5x6mm
Memory
R/L/C
76.1mm2 3x3mm
Linear Charger
Mediatek Smallest Wearable SoC
Mediatek Aster
5.4x6.2mm
R/L/C
Total Size:89.8mm2
54.2mm2 Shrink 64%
Performance
Wireless Power
Case Study: Clock Harmonics De-sense
AFE
AFE
Base
bandLNAMixer
VDD
RXin
Xtal oscillator
0 10 20 30 40 50 60 70 80
Channel Number
-90
-85
-80
-75
3E
DR
Se
nsit
ivit
y (
dB
m)
MT6236_E1
MT6236_E2original optimized
VDD
Aggressor model
Vagg.
Coupling model Victim model
Chip bond-pad
Vvic.
Matching
network
GNDRX LNA
Parasitic lump model
PCB
Package
Co-simulation platform to predict the coupled noise
Smaller Form Factor !
More Integration!
AoP: Antenna on Package
Antenna on PCB
Antenna in Module
Antenna on Package
AoP Advantages •Smaller form factor
•Better performance
•Time-to-market
•Eliminates time-consuming and costly certification and qualification processes
AoP Design Challenges (1)
Antenna Efficiency
ANT with keep out zone 8%
ANT without keep out zone 1.90%
Antenna height
Keep out region
on PKG/PCB
Antenna E-field distribution:
coupling between RFSOC & ANT
EM Interference Issue from AoP
AoP Design Challenges (2)
Cost Effective
To make wearables cost effective by:
Miniaturization
Substrate less
Panel solution
How to Enhance the Cost Structure?
Miniaturization:
Embedded Technology:
Area decreased
65% !
How to Enhance the Cost Structure?
Substrate less:
Fan-out Technology:
Substrate less:
Panel solution for FO technology:
How to Enhance the Cost Structure?
創造無限可能