pentium a cisc architecture by shalvin maharaj

Upload: armydelta

Post on 09-Apr-2018

216 views

Category:

Documents


0 download

TRANSCRIPT

  • 8/8/2019 Pentium a CISC Architecture by Shalvin Maharaj

    1/24

    The Pentium: A CISC

    Architecture

    Shalvin Maharaj

    CS 14711-09-04

    Umesh Maharaj:

    Umesh Maharaj:

    Umesh Maharaj:

    Umesh Maharaj:

    Umesh Maharaj:

    Umesh Maharaj:

    Umesh Maharaj:

    Umesh Maharaj:

    Umesh Maharaj:

    Umesh Maharaj:

  • 8/8/2019 Pentium a CISC Architecture by Shalvin Maharaj

    2/24

    Contents

    What is CISC

    History: CISC

    CISC

    Advantages of CISC

    Disadvantages of CISC

    RISC vs CISC

    Sources

  • 8/8/2019 Pentium a CISC Architecture by Shalvin Maharaj

    3/24

    What is CISC?

    CISC stands for Complex Instruction Set

    Computer

    CISC takes its name from the the very largenumber of instructions (typically hundreds)

    and addressing modes in its ISA.

  • 8/8/2019 Pentium a CISC Architecture by Shalvin Maharaj

    4/24

    History: CISC

    The first PC microprocessors developed

    were CISC chips, because all the

    instructions the processor could executewere built into the chip.

    Memory was expensive in the early days of

    PCs, and CISC chips saved memorybecause their programming could be fed

    directly into the processor.

  • 8/8/2019 Pentium a CISC Architecture by Shalvin Maharaj

    5/24

    History: CISC

    CISC chips were improved mainly by

    adding more instructions to the processor

    design. This also meant that programmingchanged with new CISC designs. CISC

    designs grew complex and somewhat bulky

  • 8/8/2019 Pentium a CISC Architecture by Shalvin Maharaj

    6/24

  • 8/8/2019 Pentium a CISC Architecture by Shalvin Maharaj

    7/24

    History: CISC

    If this was done it would be easier to write

    compilers and code would be smaller so it

    would save RAM

  • 8/8/2019 Pentium a CISC Architecture by Shalvin Maharaj

    8/24

    Examples of CISC Processors

    Examples of CISC processors are

    VAX

    PDP-11 Motorola 68000 family

    Intel x86/Pentium CPUs

  • 8/8/2019 Pentium a CISC Architecture by Shalvin Maharaj

    9/24

    CISC

    CISC takes its name from the the very large

    number of instructions (typically hundreds) and

    addressing modes in its ISA. To accommodate

    this variety of instruction complexities, CISC

    instructions are of varying lengths (often ranging

    from 8 - 120 bits).This is as opposed to RISC

    which has a fixed instruction set.

  • 8/8/2019 Pentium a CISC Architecture by Shalvin Maharaj

    10/24

    CISC

    The varying length is used to reduce wasted

    space but there is a disadvantage which

    follows. Variable length instructions are more

    difficult to process, so CISC chips require

    many more transistors than comparableRISC designs.

  • 8/8/2019 Pentium a CISC Architecture by Shalvin Maharaj

    11/24

    CISC

    This increase in transistor count has obvious

    implications for the issue of power

    dissipation, which is central to mobilecomputing.

    The increase in transistor count also makes

    it more expensive to produce CISC chips.

  • 8/8/2019 Pentium a CISC Architecture by Shalvin Maharaj

    12/24

    CISC

    The complexity of CISC also makes it more difficult

    to pipeline than RISC, which again increases the

    required processor logic and, hence, transistor count.

    And CISC chips are relatively slow (compared to

    RISC chips) per instruction, but on the other hand

    uses little (less than RISC) instructions.

  • 8/8/2019 Pentium a CISC Architecture by Shalvin Maharaj

    13/24

    CISC

    Due to the increase in transistor count and

    obvious issue of power dissipation Mobile

    Pentium III introduced a new powermanagement facility.

    This was called SpeedStep. SpeedStep

    detects the power source(wall socket orbattery) and adjusts the processor's clock

    speed and voltage accordingly.

  • 8/8/2019 Pentium a CISC Architecture by Shalvin Maharaj

    14/24

    CISC

    For example when a computer is powered by

    AC mains current it runs at full speed (650 MHz

    depending on the model)and full voltage. But

    when a battery is used the clock speed is

    reduced to 500 MHz and the corresponding

    voltage is decreased. This gives the Mobile

    Pentium III a distinct advantage over processorsthat can reduce only their clock speed.

  • 8/8/2019 Pentium a CISC Architecture by Shalvin Maharaj

    15/24

    Advantages of CISC

    CISC has varying lengths to reduce wasted

    space in memory.

    Has developed a process to manage powerwhich adjusts clock speed and voltage.

    Uses less instructions to perform similar

    instructions than RISC

    Provides programmers with assembly

    instructions to do a lot with smaller programs.

  • 8/8/2019 Pentium a CISC Architecture by Shalvin Maharaj

    16/24

    Disadvantages of CISC

    CISC chips are relatively slow (compared to

    RISC chips) per instruction.

    CISC chips require many more transistorsthan comparable RISC designs .

    Harder to pipeline using CISC architecture.

    Expensive to produce.

  • 8/8/2019 Pentium a CISC Architecture by Shalvin Maharaj

    17/24

    RISC vs. CISC

    RISC vs. CISC is a topic quite popular on

    the Net. Everytime Intel (CISC) or Apple

    (RISC) introduces a new CPU, the topicpops up again.

    Most PC's use CPU based on CISC

    architecture. For instance Intel and AMD

    CPU's are based on CISC architectures.

  • 8/8/2019 Pentium a CISC Architecture by Shalvin Maharaj

    18/24

    RISC vs CISC

    Many claim that RICS is the architecture of the future.

    But even though RISC has been in the market since 1980,

    it hasnt managed to kick CISC out of the picture, some

    argue that if it is really the architecture of the future itshould have been able to do this by now.

  • 8/8/2019 Pentium a CISC Architecture by Shalvin Maharaj

    19/24

    RISC vs CISC

    Typically CISC chips have a large amount of

    different and complex instructions. The philosophy

    behind it is that hardware is always faster than

    software, therefore one should make a powerfulinstruction set, which provides programmers with

    assembly instructions to do a lot with shorter

    programs.

  • 8/8/2019 Pentium a CISC Architecture by Shalvin Maharaj

    20/24

    RISC vs CISC

    On the other hand by making the hardware simpler,

    RISC puts a greater burden on the software. Software

    needs to become more complex and Software developers

    need to write more lines of code to perform similartasks. But by doing this RISC architecture takes the

    burden away form the hardware resulting in an increase

    in performance(mainly speed).

  • 8/8/2019 Pentium a CISC Architecture by Shalvin Maharaj

    21/24

    RISC vs CISC

    There is still considerable controversy among

    experts about which architecture is better. Some

    say that RISC is cheaper and faster and therefor

    the architecture of the future. But because of the

    burden placed on software some argue that

    RISC is not the architecture of the future. And

    conventional CISC chips becoming faster andcheaper isnt helping RISC claim supremacy.

  • 8/8/2019 Pentium a CISC Architecture by Shalvin Maharaj

    22/24

    RISC vs CISC

    The answer isn't quite that simple. RISC

    and CISC architectures are becoming more

    and more alike. Many of today's RISC chipssupport just as many instructions as

    yesterday's CISC chips. The PowerPC 601,

    for example, supports more instructions

    than the Pentium.

  • 8/8/2019 Pentium a CISC Architecture by Shalvin Maharaj

    23/24

    RISC vs CISC

    Yet the 601 is considered a RISC chip, while

    the Pentium is definitely CISC. And today's

    CISC chips use many techniques formerly

    associated with RISC chips.

    So simply said: RISC and CISC are growing to

    each other.

  • 8/8/2019 Pentium a CISC Architecture by Shalvin Maharaj

    24/24

    Sources

    http://ouray.cudenver.edu

    http://en.wikipedia.org/wiki/CISC

    http://groups.engr.oregonstate.edu/tlc/v2/Component_Summaries/cpu/cpu_how_works.

    html

    http://friday.editthispage.com