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1096 IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 53, NO. 5, MAY 2006 Physically Based Quantum–Mechanical Compact Model of MOS Devices Substrate-Injected Tunneling Current Through Ultrathin (EOT 1 nm) SiO 2 and High-κ Gate Stacks Fei Li, Student Member, IEEE, Sivakumar P. Mudanai, Member, IEEE, Yang-Yu Fan, Member, IEEE, Leonard Franklin (Frank) Register, Senior Member, IEEE, and Sanjay K. Banerjee, Fellow, IEEE Abstract—Building on a previously presented compact gate capacitance (C g V g ) model, a computationally efficient and accurate physically based compact model of gate substrate- injected tunneling current (I g V g ) is provided for both ultra- thin SiO 2 and high-dielectric constant (high-κ) gate stacks of equivalent oxide thickness (EOT) down to 1 nm. Direct and Fowler–Nordheim tunneling from multiple discrete subbands in the strong inversion layer are addressed. Subband energies in the presence of wave function penetration into the gate dielectric, charge distributions among the subbands subject to Fermi–Dirac statistics, and the barrier potential are provided from the com- pact C g V g model. A modified version of the conventional Wentzel–Kramer–Brillouin approximation allows for the effects of the abrupt material interfaces and nonparabolicities in com- plex band structures of the individual dielectrics on the tun- neling current. This compact model produces simulation results comparable to those obtained via computationally intense self- consistent Poisson–Schrödinger simulators with the same MOS devices structures and material parameters for 1-nm EOTs of SiO 2 and high-κ/SiO 2 gate stacks on (100) Si, respectively. Com- parisons to experimental data for MOS devices with metal and polysilicon gates, ultrathin dielectrics of SiO 2 , Si 3 N 4 , and high-κ (e.g., HfO 2 ) gate stacks on (100) Si with EOTs down to 1-nm show excellent agreement. Index Terms—Direct tunneling, Fowler–Nordheim (F–N) tun- neling, Franz two-band model, high-κ gate dielectrics, leakage currents, MOS devices, quantum–mechanical effects, Wentzel– Kramers–Brillouin (WKB) theory. I. INTRODUCTION A S THE aggressive scaling of a CMOS technology contin- ues, the equivalent oxide thickness (EOT) of the gate di- electrics is projected by the International Technology Roadmap for Semiconductors (ITRS) (2003 Edition) to be as thin as 1.0 Manuscript received May 11, 2005; revised November 11, 2005. This work was supported in part by the Semiconductor Research Corporation and the Advanced Materials Research Center funded by Semiconductor Manufacturing Technology (SEMATECH). The review of this paper was arranged by Editor S. Datta. F. Li is with the Synopsys Incorporation, Mountain View, CA 94043 USA. S. P. Mudanai is with the Intel Corporation, Santa Clara, CA 95052 USA. Y.-Y. Fan is with the Lovoltech Incorporation, Santa Clara, CA 95052 USA. L. F. Register and S. K. Banerjee are with the Microelectronics Research Center, Department of Electrical and Computer Engineering, The University of Texas at Austin, Austin, TX 78758 USA. Digital Object Identifier 10.1109/TED.2006.871877 to 0.5 nm for high-performance logic, 1.3 to 0.7 nm for low- operating power, and 1.9 to 0.7 nm for low-standby power tech- nologies, respectively, to maintain gate control over the channel from 2006 to 2018 [1]. For SiO 2 gate dielectrics this thin, the gate leakage current can become unacceptably large even at low-gate voltages due to direct tunneling. To address this technological challenge, alternative high-permittivity/relative dielectric constant (high-κ) materials are being considered as replacements for SiO 2 as the dielectric layer [1]–[3]. Several promising alternative materials with moderate to high-dielectric constants such as Si 3 N 4 , ZrO 2 , HfO 2 , and Al 3 O 4 are being studied to reduce the direct tunneling while maintaining small EOTs [4], [5]. Furthermore, when high-κ dielectrics are used, there is usually a thin interfacial layer between the high-κ material layer and the substrate [6], often an intentionally added SiO 2 or SiON layer for better interface quality [2]. In addition, because high-κ dielectrics usually have smaller band offsets to Si [7], Fowler–Nordheim (F–N) tunneling and the transition region to direct tunneling remain potentially important. The increased importance of gate tunneling and the in- creasing complexity of essential physics of tunneling for such ultrathin EOT oxides pose increased challenges to modeling of gate tunneling in general and particularly compact modeling. The quantum–mechanical nature of the source of tunneling carriers in the strong inversion layer with its subband structure must be accounted for. And in doing so, effects of carrier wave function penetration into the dielectric that go hand-in-hand with tunneling must be accounted for to avoid nonnegligible errors in the subband energies, charge distributions and the resulting C g V g for MOS devices with 1-nm EOTs and below dielectrics [8]. For compact modeling of tunneling, the Wentzel–Kramers–Brillouin (WKB) approximation as conven- tionally employed does not address the effects on tunneling of the abrupt potential barrier interfaces [9], [10]—indeed, it was carefully designed for the more conceptually challeng- ing case of smooth potential variations across the classical turning point [11]—which becomes an increasingly important error when tunneling probabilities are large. When considering high-κ dielectrics, the differing material properties (bandgaps, band offsets, tunneling effective masses, etc.) must be allowed for within the probably multilayer gate dielectric tunneling 0018-9383/$20.00 © 2006 IEEE

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1096 IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 53, NO. 5, MAY 2006

Physically Based Quantum–Mechanical CompactModel of MOS Devices Substrate-Injected Tunneling

Current Through Ultrathin (EOT ∼ 1 nm)SiO2 and High-κ Gate Stacks

Fei Li, Student Member, IEEE, Sivakumar P. Mudanai, Member, IEEE, Yang-Yu Fan, Member, IEEE,Leonard Franklin (Frank) Register, Senior Member, IEEE, and Sanjay K. Banerjee, Fellow, IEEE

Abstract—Building on a previously presented compact gatecapacitance (Cg–Vg ) model, a computationally efficient andaccurate physically based compact model of gate substrate-injected tunneling current (Ig–Vg ) is provided for both ultra-thin SiO2 and high-dielectric constant (high-κ) gate stacks ofequivalent oxide thickness (EOT) down to ∼ 1 nm. Direct andFowler–Nordheim tunneling from multiple discrete subbands inthe strong inversion layer are addressed. Subband energies inthe presence of wave function penetration into the gate dielectric,charge distributions among the subbands subject to Fermi–Diracstatistics, and the barrier potential are provided from the com-pact Cg–Vg model. A modified version of the conventionalWentzel–Kramer–Brillouin approximation allows for the effectsof the abrupt material interfaces and nonparabolicities in com-plex band structures of the individual dielectrics on the tun-neling current. This compact model produces simulation resultscomparable to those obtained via computationally intense self-consistent Poisson–Schrödinger simulators with the same MOSdevices structures and material parameters for 1-nm EOTs ofSiO2 and high-κ/SiO2 gate stacks on (100) Si, respectively. Com-parisons to experimental data for MOS devices with metal andpolysilicon gates, ultrathin dielectrics of SiO2, Si3N4, and high-κ(e.g., HfO2) gate stacks on (100) Si with EOTs down to ∼ 1-nmshow excellent agreement.

Index Terms—Direct tunneling, Fowler–Nordheim (F–N) tun-neling, Franz two-band model, high-κ gate dielectrics, leakagecurrents, MOS devices, quantum–mechanical effects, Wentzel–Kramers–Brillouin (WKB) theory.

I. INTRODUCTION

A S THE aggressive scaling of a CMOS technology contin-ues, the equivalent oxide thickness (EOT) of the gate di-

electrics is projected by the International Technology Roadmapfor Semiconductors (ITRS) (2003 Edition) to be as thin as ∼ 1.0

Manuscript received May 11, 2005; revised November 11, 2005. This workwas supported in part by the Semiconductor Research Corporation and theAdvanced Materials Research Center funded by Semiconductor ManufacturingTechnology (SEMATECH). The review of this paper was arranged by EditorS. Datta.

F. Li is with the Synopsys Incorporation, Mountain View, CA 94043 USA.S. P. Mudanai is with the Intel Corporation, Santa Clara, CA 95052 USA.Y.-Y. Fan is with the Lovoltech Incorporation, Santa Clara, CA 95052 USA.L. F. Register and S. K. Banerjee are with the Microelectronics Research

Center, Department of Electrical and Computer Engineering, The University ofTexas at Austin, Austin, TX 78758 USA.

Digital Object Identifier 10.1109/TED.2006.871877

to 0.5 nm for high-performance logic, ∼ 1.3 to 0.7 nm for low-operating power, and 1.9 to 0.7 nm for low-standby power tech-nologies, respectively, to maintain gate control over the channelfrom 2006 to 2018 [1]. For SiO2 gate dielectrics this thin,the gate leakage current can become unacceptably large evenat low-gate voltages due to direct tunneling. To address thistechnological challenge, alternative high-permittivity/relativedielectric constant (high-κ) materials are being considered asreplacements for SiO2 as the dielectric layer [1]–[3]. Severalpromising alternative materials with moderate to high-dielectricconstants such as Si3N4, ZrO2, HfO2, and Al3O4 are beingstudied to reduce the direct tunneling while maintaining smallEOTs [4], [5]. Furthermore, when high-κ dielectrics are used,there is usually a thin interfacial layer between the high-κmaterial layer and the substrate [6], often an intentionallyadded SiO2 or SiON layer for better interface quality [2].In addition, because high-κ dielectrics usually have smallerband offsets to Si [7], Fowler–Nordheim (F–N) tunneling andthe transition region to direct tunneling remain potentiallyimportant.

The increased importance of gate tunneling and the in-creasing complexity of essential physics of tunneling for suchultrathin EOT oxides pose increased challenges to modeling ofgate tunneling in general and particularly compact modeling.The quantum–mechanical nature of the source of tunnelingcarriers in the strong inversion layer with its subband structuremust be accounted for. And in doing so, effects of carrier wavefunction penetration into the dielectric that go hand-in-handwith tunneling must be accounted for to avoid nonnegligibleerrors in the subband energies, charge distributions and theresulting Cg–Vg for MOS devices with ∼ 1-nm EOTs andbelow dielectrics [8]. For compact modeling of tunneling, theWentzel–Kramers–Brillouin (WKB) approximation as conven-tionally employed does not address the effects on tunnelingof the abrupt potential barrier interfaces [9], [10]—indeed, itwas carefully designed for the more conceptually challeng-ing case of smooth potential variations across the classicalturning point [11]—which becomes an increasingly importanterror when tunneling probabilities are large. When consideringhigh-κ dielectrics, the differing material properties (bandgaps,band offsets, tunneling effective masses, etc.) must be allowedfor within the probably multilayer gate dielectric tunneling

0018-9383/$20.00 © 2006 IEEE

LI et al.: COMPACT MODEL OF MOS DEVICES CURRENT THROUGH SiO2 AND HIGH-κ GATE STACKS 1097

barrier. Also, because high-κ dielectrics usually have smallerband offsets to Si than SiO2, F–N tunneling and the transitionregion to direct tunneling remain potentially important forhigh-κ gate stacks even for low-supply voltages. Accordingly,only a few studies on compact gate leakage current model forMOS devices with these advanced ultrathin gate stacks arefound. In existing works such as [12], empirical parameterswithout a clear physical origin were introduced, the interfaciallayers in high-κ were ignored, or comparisons to only measuredgate-injected gate current were made. Of course, agreementwith experiment is the ultimate goal, but experimental uncer-tainty can obscure errors introduced with the simplificationsthat are required for compact modeling. Therefore, predic-tive physically based compact models that agree with bothmeasured data and reference numerical simulations addressingknown physics are needed for characterization and design ofstate-of-the-art MOS devices.

In this paper, a physics-based compact model for substrate-injected tunneling current (Ig–Vg) through ultrathin gate di-electrics including both SiO2 and high-κ-based gate stacksdown to (and potentially below) ∼ 1-nm EOT is provided thataddresses each of the above described limitations. Excellentagreement to both numerical calculations and measured dataare shown. This paper on gate tunneling current builds onour previous paper on physics-based compact gate capaci-tance (Cg–Vg) modeling for MOS devices with ultrathin gatedielectrics that, among other things, addresses the tunnelingcharge source’s quantum–mechanical subband structure subjectto the aforementioned wave function penetration into the gatedielectric, and charge distributions among the subbands subjectto Fermi–Dirac statistics [8]. To this foundation, a modifiedversion of the conventional WKB approximation is added thatallows for the effects of the abrupt material interfaces andnonparabolicities in the complex band structures of the individ-ual dielectrics on the tunneling current. Together these modelsprovide a self-consistent compact modeling capability of both.Together, these papers build and elaborate on previous abstractreports [13], [14].

II. DESCRIPTION OF THE MODEL

A. Algorithm for Substrate-Injected GateLeakage Current Calculation

A flowchart that summarizes the algorithm used in compactmodel in strong inversion or accumulation in the substrate isshown in Fig. 1(a). Much of this algorithm, roughly that onthe left-hand side of Fig. 1(a), is described in our previouspaper, [8]. First, the subband energies and the total sheet chargein the substrate are determined as function of the (effective)dielectric electric field. The effects on the subband structure ofwave function penetration into the gate dielectric and variationof the confining potential from triangular as the electric fieldfalls through the layer of charge carriers, themselves, wereaccounted for. Subband filling within the energy bands subjectto Fermi–Dirac statistics then determines the Fermi energy leveland, thus, by definition the voltage (V = −EF /q). Then, thequasi-static capacitance is obtained, also as per definition, by

Fig. 1. (a) Flowchart for the compact gate capacitance and substrate-injectedgate current model. (b) C–V obtained by compact model, where wave functionpenetration effects into the oxide were included, compared to numerical simu-lation under varying physical assumptions. Here, “classical” means Boltzmannstatistics and particles, but not neglect of the interfacial layer. (c) Band diagramfor substrate tunneling from discrete 2-D subbands.

comparing changes in the sheet charge to changes in the volt-age (Cg = dQg/dVg). The model produces results comparableto a numerical simulation for an nMOS capacitor with only0.5-nm EOT, as illustrated in Fig. 1(b), as well as excellent fitsto experimental data, as presented in [8].

New to this paper, but clearly self-consistent with the pre-vious paper, are the additions, shown on the right-hand sideof Fig. 1(a), required to obtain the Ig–Vg due to tunnel-ing as depicted in Fig. 1(c). The surface impact frequencyand tunneling probability for carriers in each of these sub-bands are also obtained as a function of the dielectric (effec-tive) field. The total substrate-injected tunneling current, the

1098 IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 53, NO. 5, MAY 2006

sum of the components from each subband, is then approx-imated as

j ∼=∑

n

QnfnTn (1)

where Qn are the sheet charge densities of the subbands thatare also used for the Cg–Vg calculation, fn is the subbanddependent surface impact frequency, and Tn is the tunnelingprobability for carriers in the nth subband, respectively. Thesesubstrate-injected gate currents could be electron tunnelingin nMOS in inversion or pMOS in accumulation, and holetunneling in nMOS in accumulation or pMOS in inversion.

B. Subband Energies and Subband Filling

The subband energies required for calculating the impactfrequencies fn and tunneling probabilities Tn for the Ig–Vg

calculations of this paper, and the subband filling Qn for bothCg–Vg and Ig–Vg calculations closely follow a simple power-law form, as demonstrated in [8]

Ei − Ec,v∼= ±γi

(|Fox|cm

MV

)λi

(2)

for electrons and holes, respectively, where Ec and Ev are the(nominal) conduction and valence band edges at the dielectric-Si interface, respectively, i again labels the subband, and Fox

is the effective electric field within the gate dielectric (but notthe field right at the surface that will be slightly lower dueto barrier penetration). Assuming a {100} Si substrate/bodyand that a thin Si–SiO2 interfacial layer exists even in high-κgate stacks as discussed in the Introduction, the λi are 0.61for electrons and 0.64 for holes in strong accumulation orinversion, nearly independent of subband or doping, as ob-tained from fitting reference numerical simulations includingcarrier penetration into the dielectric and variations of thewell shape from triangular as the field is dropped across thecharge layer itself [8]. For triangular wells in the absence ofwave function penetration into the dielectric, the λi would be2/3 [9], [10]. Equation (2), including the leading coefficientsγi for all of what momentarily will be shown to be the im-portant cases, are provided in Table I. These values shouldalso be reasonable for similar interfacial layers such as ofSiON. Perhaps to consider the case of smaller band-gap high-κdielectrics with no such interfacial layer and/or certainly toconsider SiGe substrates, the parameter values would have to berecalculated but the basic model algorithm should be essentiallyunaffected.

Here, as in [8], the total field-induced mobile surface chargedensity, electron or hole, is approximated by

Qs(Fox) = −εoxFox (3)

in accumulation, and

Qs(Fox) = −εoxFox −Qdepletion(Fox) (4)

TABLE ISUBBAND ENERGIES FOR (a) ELECTRONS AND (b) HOLES. HERE Fox CAN

BE REPLACED BY EQUIVALENT ELECTRIC FIELD FOR HIGH-κ SYSTEMS

TABLE IISUBBAND OCCUPATION PERCENTAGES FOR

(a) ELECTRONS AND (b) HOLES

in strong inversion, where εox is the dielectric constant of theoxide and Qdepletion is the depletion region charge as a functionof the effective oxide field Fox. The calculations of subbandfilling in [8] demonstrated that most of these electrons, 99%in strong inversion and 91% in accumulation, are contained inthe first two sets of degenerate electron subbands, from the twoenergy valleys oriented normal to the interface and the fouroriented parallel to the interface, respectively. Similarly, mostholes, 99% in strong inversion and 95% in accumulation, arelocalized to the lowest three-hole subbands. And, although thetotal amount of surface charge varies with the oxide-effectivefield, the fraction of charge in each subband remained roughlyconstant, at the values given in Table II. Note that the smallfraction of charge carriers in higher lying subbands are notsimply neglected but rather are “placed” in the highest ofthe above considered subbands for the purpose of calculatingCg–Vg in [8] and Ig–Vg here.

C. Surface Impact Frequencies

As in [9] and [10], but using the subband energies of (2)above in this paper, surface impact frequencies versus field rela-tions were extracted from self-consistent Poisson–Schrödingersolutions via the semiclassical approximation

f−1n = τn =

∮v−1gz,ndz (5)

LI et al.: COMPACT MODEL OF MOS DEVICES CURRENT THROUGH SiO2 AND HIGH-κ GATE STACKS 1099

Fig. 2. Impact frequencies for (a) first longitudinal subband (solid line) and(b) first heavy hole subband calculated in compact model compared with self-consistent results (symbols) at temperature = 300 K, respectively.

between the classical turning points, where vgz,n is theinterface-normal component of electron group velocity.Fig. 2(a) and (b) show that surface impact frequencies followessentially the same simple power law relations as the subbandenergies (2), F 0.61

ox for electrons and F 0.64ox for holes, again

essentially independent of subband and substrate doping con-centration. The power terms would be 2/3 if wave function pen-etration effects and well nontriangularities are not considered[9], [10]. The surface impact frequencies used in this model forthe lowest two electron subbands and three hole subbands aregiven in Table III.

D. Modified WKB Approximation for Tunneling Probability

The conventionally used WKB expression for tunneling cur-rent was derived for smooth potential barriers [11] and, thus, notsurprisingly and as previously noted, its use can lead to signif-icant errors when applied to barriers with abrupt interfaces, asshown in Fig. 3(a), by comparison to transmission-matrix-basednumerical calculations for electron tunneling through SiO2

from the bottom of the ground-state subband; the boundaryconditions used are simply inappropriate. In this paper, we

TABLE IIISURFACE IMPACT FREQUENCIES IN EACH SUBBAND FOR (a) ELECTRONS

AND (b) HOLES. AGAIN Fox CAN ALSO BE REPLACED BY THE

EFFECTIVE OXIDE FIELD FOR HIGH-κ SYSTEMS

Fig. 3. Tunneling probability by WKB approximation compared to numericalcalculations for electron ground state subband: (a) conventional WKB approx-imation and (b) modified WKB with and without smoothed transition fromdirect to F–N tunneling. In the F–N regime, reflection from the trailing/anodedielectric-gate interface (not the classical turning point) that could cause someoscillation about these results in the absence of strong dephasing scattering havebeen neglected in both compact and numerical calculations.

use a modified WKB approximation such that the transmissionprobability can be written as

T = TWKBTLTR (6)

1100 IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 53, NO. 5, MAY 2006

Fig. 4. Band diagrams for (a) direct and (b) F–N tunneling.

where TWKB is the conventional expression for tunnelingthrough smooth potential barriers (the case which is, by far, themost conceptually challenging to address)

TWKB = exp

−2

xR∫xL

κ(x)dx

(7)

where κ(x) is the magnitude of the carriers imaginary wavevector within the bandgap as a function of position x be-tween the left and right classical turning points xL and xR,respectively. The “correction” or “modification” terms TL andTR, associated with the right or left classical turning points,respectively, are corrections only to the conventionally usedexpression and are still derived within the framework of WKBtheory, as shown (for the first time) in the Appendix. Accord-ingly, TL or TR is simply unity if the potential function remainssmoothly varying at the classical turning point, as for the anodeside of the potential barrier during F–N tunneling [Fig. 4(a)].Otherwise, that is if the classical turning point occurs at theheterointerface as for the cathode side of the barrier duringF–N tunneling or for both interfaces during direct tunneling(Fig. 4(a) and (b), respectively), the corresponding correctionterms are of the form [9], [10], [14]

TL,R =4v(xL,R)

√ν2(xL,R) + v2(xL,R)

16

v2(xL,R) + ν2(xL,R). (8)

Here, for either side of the barrier, v(xL,R) is the magnitude ofthe group velocity ∂E/∂�k of the carrier evaluated just outsideof the classical turning points of the barrier, and ν(xL,R) isthe magnitude of the “imaginary group velocity” ∂E/∂�k justinside of the classical turning point. Note that (6)–(8) are notlimited to parabolic band structures, and a Franz two-bandmodel is employed in this paper, as in [9] and [10].

Note that within the framework of WKB theory, the correc-tion term is actually calculated as (Appendix)

TL,R =4v(xL,R)ν(xL,R)

[v2(xL,R) + ν2(xL,R)]. (9)

However, this expression is unreliable near the transition froman abrupt barrier interface to a smooth one, including thetransition from direct to F–N tunneling. As κ(xL,R) approacheszero, and pulls ν(xL,R) and TL,R with it, it fails to satisfythe restriction |∂κ/∂x| � κ2 required in the WKB analysis.Therefore, an ad hoc correction was made to arrive at theform of (6), which now smoothly approaches unity as κ(xL,R)and ν(xL,R) approach zero, so that the results for abrupt andsmooth barrier interfaces blend seamlessly.

Strictly speaking, (8) should apply for the metal–semiconductor interfaces encountered in metal-gate devices aswell. However, in practice the group velocity values in themetal may not be readily obtainable (a problem for numericalcalculations as well) and the correction term can also be ex-pected to be of little consequence. The correction term is mostsignificant when the carrier energy just outside of the barrierbecomes small compared to the barrier height. Therefore, thecorrection term for metal–semiconductor interfaces has simplybeen set to unity in this paper. Similarly, in principle, forany internal interface within a tunnel barrier, such as occurswithin high-κ gate stacks with SiO2 interfacial layers, a cor-rection term should also be considered of the analogous formTL,R = 4ν(x+)ν(x−)/[v(x+) + ν(x−)]2 where the ν(x±) arethe complex group velocities on either side of the interfaces,but in practice this term also is usually of little consequenceexcept in regions where it no longer satisfies |∂κ/∂x| � κ2 onboth sides of the interface. Therefore, it too has simply beenneglected in this paper.

The accuracy of this modified WKB approach of (6) usingthe correction terms of (8) is exhibited by comparison to thetransmission-matrix-based numerical calculations in Fig. 3(b).Also shown for reference are the modified WKB results usingthe “raw” correction term of (9). (Indeed this modified WKBapproach is so accurate that we have since incorporated it intoour otherwise numerical simulations to save computation timeas we integrate tunneling probabilities over thermal distribu-tions of carriers.)

Although this case is not considered in the examples tofollow, before leaving this section it is noted that the correctionterms vanishes if the complex-group-velocity approaches infin-ity, such as might be expected to occur somewhere between theconduction band and valence band of the barrier material. Inthis case, undoubtedly the model fails at least somewhat–alongwith our numerical transmission-matrix-based calculations—iffor no other reason than failure of the envelope function approx-imation, itself, upon which the derivations are based.

III. COMPACT GATE Ig–Vg MODELING RESULTS

First, comparisons to numerical simulations of two virtualMOS devices with EOTs of 1 nm were made to insure that sig-nificant errors had not been introduced via the approximations

LI et al.: COMPACT MODEL OF MOS DEVICES CURRENT THROUGH SiO2 AND HIGH-κ GATE STACKS 1101

Fig. 5. Comparison between compact model and numerical calculations forsubstrate-injected gate tunneling current through MOS devices with 1-nmEOTs of (a) SiO2, and (b) high-κ gate stacks, respectively. A Franz two-band model was used for band structures in both SiO2 and high-κ ma-terials with mSiO2,conduction = mSiO2,valence = mhigh-κ,conduction =mhigh-κ,valence = 0.5me, where me is the static free electron mass. Bandoffsets to Si are ∆EC = 3.15 eV in conduction band and ∆EV = 4.8 eVin valence band for SiO2, and ∆EC = 1.45 eV and ∆EV = 3.05 eV forthe high-κ material. Dielectric constants are 3.9 for SiO2 and 20 for high-κmaterials, respectively.

make in [8] and this extension to allow compact modeling: first,for a metal gate MOS device with single layer SiO2 and, sec-ond, for a metal gate MOS device with dual layer high-κ/SiO2

gate stack. As shown in Fig. 5(a) and (b), the compact modelproduced substrate-injected tunneling current results that arein excellent agreement with those from numerical simulationsfor both devices using precisely the same material parameters,with a computation speed four to five orders of magnitudefaster. It takes this compact model only a few tens of mil-lisecond on a personal computer with 1.13-GHz processor for200 gate-voltage points. In the gate stack example the band gap,band offsets and tunneling effective masses for ZrO2 are thesame as those used in [15].

Comparisons were then made to measured data of deviceswith ultrathin SiO2 layers. For the purpose of testing the

Fig. 6. Comparison between compact model and measured data for substrate-injected gate tunneling current through MOSFETs with (a) a polysilicon gateand 1.4-, 1.6-, and 1.7-nm SiO2 [17], and perhaps more reliably still (b) anAl-gate and 3.12-, 2.59-, 2.25-, and 1.65-nm SiO2 [18], respectively. Thick-nesses used in (a) are those of the TEM results reported in [17]. The thicknessesused in (b) are those that provide the best fit, but they are within an Angstromat most of the oxide thicknesses obtained in [18] via Cg–Vg measurementsthat are provided in the parentheses here. Simulation results without thecorrection to the WKB approximation are also provided for the intermediateoxide thickness device in (a) and all devices in (b) showing its role particularlyat low voltages.

accuracy if not the flexibility of the model, comparisons toSiO2 devices are more reliable than those to high-κ devicesbecause of the excellent dielectric and interface quality of SiO2

and the existence of more widely accepted material informationfor SiO2. Fig. 6(a) and (b) show the results of fitting thecompact model to measured data for MOSFETs with SiO2

EOTs down to 1.4 nm for polysilicon gate [16] and metal-gatedevices [17], respectively. A Franz two-band model of the SiO2

band structure was used with band-edge effective masses forboth band edges of 0.60m0. Notably, within the F–N regimefor electron tunneling, this two-band model with these band-edge masses is entirely equivalent to the use of a parabolicapproximation with an effective mass of 0.5m0 [9], [10], the

1102 IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 53, NO. 5, MAY 2006

value provided in the well-known work of Weinberg [18],and is consistent with the results of the tight-binding full(complex) band structure calculations of [19]. Besides showingexcellent agreement to data with little room to adjust modelparameters, these results again show that the correction termto the WKB approximations is crucial for model accuracy,especially in the low-gate voltage regime. This latter regimebecomes increasingly important as supply voltages in very largescale integration (VLSI) technologies continue to be scaleddown to about 1.0 V [1].

Ultrathin EOT high-κ gate stacks were then considered, andsimulation results were matched to experimental results forsubstrate-injected gate tunneling currents of MOSFETs withjet vapor deposited (JVD) Si3N4 [20] and sputter-depositedHfO2/SiON gate stacks [21], as shown in Fig. 7(a) and (b),respectively. Band structure parameters and dielectric constantsare from literature [2], [7], [22], [23] as detailed in the figurecaptions. For the HfO2 device, an interfacial layer of SiONwas assumed with a gate stack of n+poly/HfO2/SiON/p-Si of1.1-nm EOT. The physical thicknesses of each layer used inthe calculations are within 0.1 nm of high-resolution trans-mission electron microscopy (HRTEM) and ellipsometry mea-surements. Material parameters for SiON layer are assumedbetween those of SiO2 and Si3N4. Also shown in Fig. 7(b) isthe comparison between the conveniently provided measuredCg–Vg data for the same HfO2 device and the compact Cg–Vg

model [8] that underlies the compact Ig–Vg model, demon-strating the self-consistent Cg–Vg and Ig–Vg compact modelingcapability.

IV. CONCLUSION

A physically based quantum–mechanical compact model ofsubstrate-injected gate tunneling current through ultrathin SiO2

and high-κ gate stack MOS devices has been presented. Asthe extension of a previously reported compact gate capaci-tance model [8], this model accounts for quantum–mechanicalsubband formation and filling in the presence of wave func-tion penetration into classically forbidden regions includingthe dielectric, Fermi–Dirac statistics, and electrostatic self-consistency in both accumulation and inversion regimes. It also,thus, provides a capability for self-consistent Cg–Vg and Ig–Vg

simulations that is implicit in our comparison to numerical sim-ulations, and is explicitly exhibited via the fit to experimentalIg–Vg data and accompanying Cg–Vg data from the literature inFig. 7(b). This model accounts for tunneling through potentialbarriers with abrupt interfaces within the general framework ofWKB theory via an analytically derived correction term to theusual WKB expression for tunneling through smooth barriers.Comparison to reference numerical simulations provided ex-cellent fits with no adjustable parameters, while computationtimes were reduced by about five orders of magnitude (a fewtens of minutes to a few tens of milliseconds on the mere1.13-GHz personal computer used during the compact modeldevelopment) for Ig–Vg (and, necessarily, associated Cg–Vg)curves. Such computational efficiency should allow for incor-poration of this model within parameter extraction routines,where many trial simulations with varying device parameters

Fig. 7. Comparison between compact model and measured Ig–Vg data forsubstrate-injected gate tunneling current through MOSFETs with (a) a 1.42-nmEOT Si3N4 with a polysilicon gate [20] (dielectric constant of 7.5 from [23],a Franz two-band model with mSi3N4 = 0.5me from [22], ∆Ec = 2.1 eVand ∆Ev = 1.8 eV from [23]), and (b) and a 1.1-nm EOT HfO2 gate stackwith a polysilicon gate [21], (SiON a physical thickness of 0.8 nm, a dielectricconstant of 5.7, and a Franz two-band model with mSiON = 0.53me, ∆Ec =2.4 eV, ∆Ev = 3.1 eV; and HfO2 with a physical thickness of 3.4 nm fromellipsometry measurement, a dielectric constant of 25 [2], and Franz two-band model with mHfO2 = 0.18me, ∆Ec = 1.5 eV and ∆Ev = 3.4 eVfrom [7]), respectively. Also shown in (b) is the comparison between thecompact model and measured Cg–Vg data for the same HfO2 device.

must be performed, and perhaps adaptation to standard com-pact device models such as Penn State Philips (PSP)1 andHiroshima-university STARC IGFET Model (HiSIM) [24] forfuture CMOS technology nodes. Comparison to experimentsshowed excellent fits within experimental uncertainty of thematerial and device parameters. Both clearly evidenced theimportance of the WKB correction term at low voltages. Fits toexperimental data were provided for conventional SiO2 oxides,for which there are more widely accepted material parameters,and high-κ gate stacks. Experimental devices with EOTs down

1PSP Model is a Joint Development of the Pennsylvania State University andPhilips Research in 2005. http://www.semiconductors.philips.com/Philips_Models/mos_models/psp/index.html

LI et al.: COMPACT MODEL OF MOS DEVICES CURRENT THROUGH SiO2 AND HIGH-κ GATE STACKS 1103

to 1.1 nm were considered, and there is no apparent reason tobelieve that the model cannot be extended further.

APPENDIX

Within WKB theory [11] the propagation of the wave func-tion to the right above a smoothly varying potential is given by

ψ(xR)ψ(xL)

=

√k(xL)√k(xR)

exp

xR∫xL

ik(x)dx

(A1)

where, for energy E and well defined mass m, the wavevector k satisfies �

2k2/2m = E − V (x). Noting that thecarrier velocity is proportional to k, the leading factor of[k(x1)/k(x2)]1/2—which is then squared when calculatingprobability density–simply serves to conserve current density asa function of position; the larger the k, faster the particle moves,and thus the smaller the probability density must be to conservecurrent. If propagation within a potential barrier is considered,the wave-vector becomes imaginary. Equation (A1) then takesthe form

ψ(xR)ψ(xL)

=

√κ(xL)√κ(xR)

exp

xR∫xL

κ(x)dx

(A2)

for the wave function decaying to the right, where �2κ2/2m =

(V (x) − E) [11].At this point, if the standard analysis for tunneling through

a smoothly varying potential barrier were followed, connectionrules for the wave function across the classical turning pointswould then have to be provided. Furthermore, this latter stepinvolves no small conceptual challenge as the requirement forthe validity of (A1) and (A2), i.e.

∣∣∣∣∂k∂x∣∣∣∣ � |k2| (A3)

for k real or imaginary, is violated in the vicinity of the classicalturning points. In the end, though, taking xL and xR as the leftand right classical turning points, respectively, one, of course,obtains the well-known expression (7) [11], as presented in themain text.

In this paper, a much more conceptually simple case isconsidered, classical turning points at abrupt potential discon-tinuities with smoothly varying potentials consistent with (A3)on either side of the classical turning point, analogous to thecase of Fig. 4(b). Consider a wave function outside the barrierbut near the classical turning point xL on the side of incidenceof the barrier of the form

ψ(x) = aeik(x−xL) + beik(x−xL) (A4)

and within the barrier near xL of the form

ψ(x) = ce−κ(x−xL). (A5)

Conservation of the wave function and its first derivative acrossthe interface at xL requires

a + b = c (A6)

and

ik(a− b) = −κc (A7)

respectively, where we have assumed that k and κ otherwisevary slowly in the vicinity in the classical turning point con-sistent with the limits of (A3) already assumed for (A2). From(A6) and (A7) it is relatively simple to show that

|c|2|a|2 =

4k2(xL)k2(xL) + κ2(xL)

(A8)

where k(xL) and κ(xR) are the values of the real and imaginarywave vectors, respectively, evaluated at the interface. Similarly,consider a wave function inside but near classical turning pointxR of the barrier of the form

ψ(x) = de−κ(x−xR) + fe+κ(x−xR) (A9)

and within the barrier near xR of the form

ψ(x) = geik(x−xR). (A10)

Conserving the wave function and its derivative across theinterface as before produces

|g|2|d|2 =

4κ2(xR)k2(xR) + κ2(xR)

. (A11)

The tunneling probability, the ratio of transmitted prob-ability current (here simply transmitted probability densityweighted by velocity) through the entire abrupt potential barrier|g|2k(xR) to incident probability current |a|2k(xL) current cannow be obtained as

T =|g|2|a|2

k(xR)k(xL)

=|c|2|a|2

|d|2|c|2

|g|2|d|2

k(xR)k(xL)

(A12)

ignoring multiple internal reflections within the barrier betweenthe two interfaces. The remaining ratio |d|2/|c|2 is obtainedfrom (A2)

|d|2|c|2 =

κ(xL)κ(xR)

exp

−2

xR∫xL

κ(x)dx

. (A13)

Substituting into (A12) from (A8), (A11) and (A13) gives

T =4k2(xL)

k2(xL) + κ2(xL)κ(xL)κ(xR)

exp

−2

xR∫xL

κ(x)dx

× 4κ2(xR)k2(xR) + κ2(xR)

k(xR)k(xL)

1104 IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 53, NO. 5, MAY 2006

or

T =[

4k(xL)κ(xL)k2(xL) + κ2(xL)

]

×[

4k(xR)κ(xR)k2(xR) + κ2(xR)

]exp

−2

xR∫xL

κ(x)dx

. (A14)

Note that the exponential term on the right is just the conven-tionally used WKB tunneling expression of (7) in the main text.

What if only one of the classical turning points is abrupt? If,for specificity, the potential is varying smoothly across the rightclassical turning point xR, such as for F–N tunneling depictedin Fig. 4(a), the connection rule connecting the wave functionat some point x1 to the left of the classical turning point to thewave function at some point to the right of the classical turningpoint x2 [11] can be written

1√κ(x)

exp

xR∫x1

κ(x)dx

+

i

2√

κ(x)exp

xR∫x1

κ(x)dx

↔ i√k(x)

exp

i

x2∫xR

k(x)dx− 14π

(A15)

where the first term on the left-hand side corresponds to thewave function decaying to the right within the barrier (the fur-ther to the left x1 is relative to xR the larger the wave functionat x1 is relative to that at xR), the second term correspondsto the reflected wave function within the barrier and the termon the right-hand side to the propagating wave function to theright of the barrier. Thus, the ratio of the probability densityat some point to the right of the barrier x2 to that—chosen forobvious convenience although any point within the boundarywould due—just to the right of the left (abrupt) classical turningpoint x+

L is

|ψ(x2)|2∣∣g(x+L)

∣∣2 =κ(xL)k(x2)

exp

−2

xR∫xL

κ(x)dx

. (A16)

To obtain the corresponding transmission probability, substitutethe ratio of (A16) for |c|2/|g|2 and k(x2) for k(xR) in (A12)[where the intermediate value of d is no longer required an in(A12)] to obtain

T =[

4k(xL)κ(xL)k2(xL) + κ2(xL)

]exp

−2

xR∫xL

κ(x)dx

(A17)

which is identical to (A14) except that the bracketed term asso-ciated with the right classical turning point in (A14) becomesunity for the smooth barrier. Had an abrupt boundary only onthe right been considered, only the subscript “L” would be re-placed by the subscript “R” in leading bracketed term in (A17).

Thus, the leading bracketed terms in (A14) and (A17)amount to “corrections” to the conventionally used WKBtunneling expression—the exponential term in (A14) and(A17)—for any potential discontinuities at the classical turning

points. Note also that the tunneling probabilities of (A14) and(A17) are independent of the direction of carrier incidence, asit must be. Finally, we fill obliged to point out that we have notgone beyond the conventionally used WKB expression so muchas we have stopped short of it by considering the much simplercase of abrupt potential discontinuities at the classical turningpoints, something covered early in every introductory course onquantum mechanics.

Although the shape of the barrier is conceptually simpler todeal with than for smoothly varying potential barriers, withinthe context of this paper, we also must deal with differing ma-terials and nonparabolic band structures, as actually shown inFig. 4(a) and (b). In this paper, this system is addressed withinthe envelope function approximation ψ(x) ≈ ϕ(x)uo(x) al-though not necessarily within an effective mass approximation.

As is usual for the envelope function approximation, herethe approximation is made that the envelope function remainscontinuous across the leading and trailing heterointerfaces ofthe barrier. Consider for the moment, a carrier incident on aheterointerface with positive energy relative to the band edgeson both sides of the interface such that to the left of theheterointerface at xo the envelope function is of the form

ϕ(x) = aeik−(x−xo) + beik−(x−xo) (A18)

and to the right of the interface

ϕ(x) = ceik+(x−xo) (A19)

where k− and k+ are the real wave-vectors just to the left andright of xo, respectively. Conservation of the envelope functionrequires

a + b = c (A20)

as per (A6). However, given this assumption, in general itcannot then simply be assumed that the derivatives of theenvelope function are continuous across the interface. Rathermore fundamentally, conservation of probability current acrossthe interface must be provided. A boundary condition thatsatisfies this condition is

(a− b) vk− = cvk+ . (A21)

That is, multiplying the left- and right-hand sides of (A21)by the complex conjugates of the left- and right-hand sides,respectively, of (A20) gives for the real part

(|a|2 − |b|2

)vk− = |c|2vk+ (A22)

(and for the imaginary part vk−(a∗iar − aia∗r) = 0) where vk is

the magnitude of the group velocity ∂Ek/∂k. By inspection(A22) satisfies current continuity within the envelope func-tion approximation. Notably, in the limit of a particle with asingle well-defined mass, this boundary condition reduces toconservation of the derivative of the wave function as it must.For a well-defined effective mass that, however, may changeacross the interface, this boundary condition reduces to theconventional assumption of conservation of the derivative of theenvelope function divided by the mass, as is at least convenient.

LI et al.: COMPACT MODEL OF MOS DEVICES CURRENT THROUGH SiO2 AND HIGH-κ GATE STACKS 1105

If these boundary conditions are now analytically continuedto the case where the wave-vector on the right side of theheterointerface is imaginary, (A6) and (A7) for the envelopefunction this time become, respectively

a + b = c (A23)

and

ivk(a− b) = −νκc (A24)

where νκ is the magnitude of the “imaginary group velocity”∂E/∂�κ within the barrier. Thus, the difference between (A6)and (A7) and (A23) and (A24), is simply substitution for themagnitudes of the real and imaginary wave vectors k and κby magnitudes of the real and imaginary velocities vk and νκ,respectively. This simple substitution can be made in each ofthe (A8)–(A12).

Furthermore, as per the discussion of the first paragraph ofthis appendix, it is also the velocities not simply the wave-vectors that must be used in the leading ratio on the right-hand side of (A13) for WKB propagation within the barrier.However, within the exponent on the right-hand side of (A13)it is the wave vector, itself, which is (still) called for, of course.

With these substitutions, (A14) now becomes

T =[

4vk(xL)νκ(xL)v2

k(xL) + ν2κ(xL)

]

×[

4vk(xR)νκ(xR)v2

k(xR) + ν2κ(xR)

]exp

−2

xR∫xL

κ(x)dx

. (A25)

Again, if the system varies smoothly across either one or both ofthe classical turning points, the corresponding correction termreduces to unity as per the example of (17). Equation (A25)and these latter limiting results are the results of (6), (7), and(9) of the main text for a tunnel barrier defined by classicalturning points at the heterointerfaces to the barrier material.As described in the main text, (8) then represents an ad hocapproximation to smooth the transition between the results forclassical turning points at abrupt interfaces and those where thesystem (potential and band structure) is varying smoothly withposition.

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[1] International Technology Roadmap for Semiconductors (2003 edition),Process Integration, Devices and Structures, (Table 47–49 for Fu-ture EOTs). [Online]. Available: http://public.itrs.net/Files/2003ITRS/Home2003.htm

[2] G. D. Wilk, R. M. Wallace, and J. M. Anthony, “High-κ gate dielectrics:Current status and materials properties considerations,” J. Appl. Phys.,vol. 89, no. 10, pp. 5243–5275, 2001.

[3] C. M. Osburn, I. Kim, S. K. Han, I. De, K. F. Yee, S. Gannavaram,S. J. Lee, Z. J. Luo, W. Zhu, J. R. Hauser, D.-L. Kwong, G. Lucovsky,T. P. Ma, and M. C. Ozturk, “Vertically scaled MOSFET gate stacks andjunctions: How far are we likely go?,” IBM J. Res. Develop., vol. 46,no. 2/3, pp. 299–315, 2002.

[4] J. C. Lee, H. J. Cho, C. S. Kang, S. Rhee, Y. H. Kim, R. Choi,C. Y. Kang, C. Choi, and M. Akbar, “High-κ dielectrics and MOSFETcharacteristics,” in IEDM Tech. Dig., 2003, pp. 4.4.1–4.4.4,session 4.

[5] E. P. Gusev, D. A. Buchanan, E. Cartier, A. Kumar, D. DiMaria,S. Guha, A. Callegari, S. Zafar, P. C. Jamison, D. A. Neumayer, M. Copel,

M. A. Gribelyuk, H. Okorn-Schmidt, C. D’Emic, P. Kozlowski,K. Chan, N. Bojarczuk, L.-A. Ragnarsson, P. Ronsheim, K. Rim,R. J. Fleming, A. Mocuta, and A. Ajmera, “Ultrathin high-κ gate stacksfor advanced CMOS devices,” in IEDM Tech. Dig., 2001, pp. 20.1.1–20.1.4, session 20.

[6] T. Yamaguchi, H. Satake, N. Fukushima, and A. Toriumi, “Band dia-gram and carrier conduction mechanism in ZrO2/Zr-silicate/Si MIS struc-ture fabricated by pulsed-laser-ablation deposition,” in IEDM Tech. Dig.,2000, pp. 19–22, session 1.

[7] J. Robertson, “Band offsets of wide-band-gap oxides and implications forfuture electronic devices,” J. Vac. Sci. Technol. B, Microelectron. Process.Phenom., vol. 18, no. 3, pp. 1785–1791, May 2000.

[8] F. Li, S. Mudanai, L. F. Register, and S. K. Banerjee, “A physically-based compact gate capacitance–voltage (C–V) model for ultrathin (EOT∼ 1 nm and below) gate dielectric MOS devices,” IEEE Trans. ElectronDevices, 2005. to be published.

[9] L. F. Register, E. Rosenbaum, and K. Yang, “Analytic model for direct tun-neling current in polycrystalline silicon-gate metal-oxide-semiconductordevices,” Appl. Phys. Lett., vol. 74, no. 3, pp. 457–459, Jan. 1999.

[10] F. Stern, “Self-consistent results for n-type Si inversion layers,” Phys. Rev.B, Condens. Matter, vol. 5, no. 12, pp. 4891–4899, Jun. 1972.

[11] L. D. Landau and E. M. Lifshitz, Quantum Mechanics (Non-RelativisticTheory), 3rd ed. New York: Pergamon, 1977.

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[13] F. Li, S. P. Mudanai, Y.-Y. Fan, L. F. Register, and S. K. Banerjee,“Compact model of MOSFET electron tunneling current through ultra-thin SiO2 and high-κ gate stacks,” in Proc. IEEE Device Res. Conf., 2003,pp. 47–48.

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[20] Y. C. Yeo, Q. Lu, W. C. Lee, T.-J. King, C. Hu, X. Wang, X. Guo,and T. P. Ma, “Direct tunneling gate leakage current in transistors withultrathin silicon nitride gate dielectric,” IEEE Electron Device Lett.,vol. 21, no. 11, pp. 540–542, Nov. 2000.

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[22] Y. Shi, X. Wang, and T.-P. Ma, “Electrical properties of high-qualityultrathin nitride/oxide stack dielectrics,” IEEE Trans. Electron Devices,vol. 46, no. 2, pp. 362–368, Feb. 1999.

[23] S. M. Sze, Physics of Semiconductor Devices. New York: Wiley, 1981.Appendix I.

[24] HiSIM 2.0.0 User’s Manual, 2005. [Online]. Available: http://www.hiroshima-u.ac.jp/en/adsm/researchprojects/hisim/

Fei Li (S’04) received the B.S. and M.S. degrees in physics from PekingUniversity, Beijing, China, in 1996 and 1999, respectively, and the M.S.E.E.degree from The University of Notre Dame, Notre Dame, IN, in 2001. He iscurrently pursuing the Ph.D. degree in electrical engineering based on a studyof compact modeling and Flash memories at The University of Texas at Austin,Austin, TX.

He joined Synopsys Incorporation, Mountain View, CA, in January, 2005.

1106 IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 53, NO. 5, MAY 2006

Sivakumar P. Mudanai (M’03) was born in Chennai (formerly Madras), India,in 1975. He received the B. Tech degree from the Indian Institute of Technology,Chennai, in 1996, and the M.S.E. and Ph.D. degrees in electrical engineeringfrom The University of Texas at Austin, Austin, in 1998 and 2001, respectively.

He is currently with Intel Corporation, Santa Clara, CA. His researchinterests are in the area of deep submicrometer MOS device modeling andanalysis, and process integration.

Yang-Yu Fan (S’00–M’03) received the B.S. degree in physics from NationalTaiwan University, Taipei, Taiwan, R.O.C., in 1994, and the M.S. and Ph.D.degrees in electrical and computer engineering from The University of Texas atAustin, Austin, in 1999 and 2002, respectively.

He is now with Lovoltech, Inc., Santa Clara, CA. He has been conductingresearch in the area of high-κ gate stack, nonvolatile memory, and junctionfield effect transistor (JFET) device modeling. He is also involved in the processdevelopment for a power JFET technology.

Leonard Franklin (Frank) Register (S’85–M’89–SM’00) received the B.S. degree both in physicsand in electrical engineering and the Ph.D. degree inelectrical and computer engineering from the NorthCarolina State University, Raleigh, NC.

After graduation, he served as Research Scientistwithin the Computational Electronics Group at theBeckman Institute at the University of Illinois atUrbana–Champaign. From there, he joined the fac-ulty of the Department of Electrical and ComputerEngineering, The University of Texas at Austin,

Austin, in 2000. His current research focuses on the theory and simulation ofcharge transport in deep submicrometer and nanoscaled devices, particularly“nonclassical” CMOS, including quantum and “quantum-corrected” transport.He has also published in areas of device reliability, scattering theory, lasers, andsingle electronics.

Sanjay K. Banerjee (S’80–M’83–SM’89–F’96)received the B.Tech degree from the Indian Instituteof Technology, Kharagpur, in 1979 and the M.S.and Ph.D. degrees from the University of Illinois atUrbana–Champaign, in 1981 and 1983, respectively,all in electrical engineering.

He is the Cockrell Family Regents Chair Pro-fessor of Electrical and Computer Engineering andDirector, Microelectronics Research Center, at theUniversity of Texas at Austin, Austin. As a memberof the Technical Staff, Corporate Research, Develop-

ment, and Engineering of Texas Instruments Incorporated from 1983–1987, heworked on polysilicon transistors and dynamic random access trench memorycells used by Texas Instruments in the world’s first 4-Mb DRAM. He has beenAssistant Professor from 1987–1990, Associate Professor from 1990–1993, andProfessor from 1993 up to present at The University of Texas at Austin. He hasover 500 archival refereed publications/talks, six books/chapters, and 26 U.S.patents. He has supervised 38 Ph.D. and 50 M.S. students.

Dr. Benerjee was corecipient of the Best Paper Award, IEEE InternationalSolid State Circuits Conference, in 1986. He received the Engineering Foun-dation Advisory Council Halliburton Award, 1991, the Texas Atomic EnergyFellowship in 1990–1997, Cullen Professorship in 1997–2001, and the NationalScience Foundation (NSF) Presidential Young Investigator Award, in 1988.His recent awards include the Electrochemical Society (ECS) Callinan Award,in 2003, IEEE Millennium Medal, in 2000, and Semiconductor ResearchCorporation (SRC) Inventor Recognition Award, in 2000. He is a DistinguishedLecturer for IEEE Electron Devices Society, and was the General Chair of theIEEE Device Research Conference, in 2002. He is currently active in the areasof ultrahigh vacuum and remote plasma-enhanced chemical vapor depositionfor silicon–germanium–carbon heterostructure MOSFETs and nanostructures.He is also interested in the areas of ultrashallow junction technology andsemiconductor device modeling.