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ISBN 978-951-42-8920-0 (Paperback)ISBN 978-951-42-8921-7 (PDF)ISSN 0355-3213 (Print)ISSN 1796-2226 (Online)

U N I V E R S I TAT I S O U L U E N S I SACTAC

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OULU 2008

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Tero Kangasvieri

SURFACE-MOUNTABLE LTCC-SIP MODULE APPROACH FOR RELIABLERF AND MILLIMETRE-WAVE PACKAGING

FACULTY OF TECHNOLOGY,DEPARTMENT OF ELECTRICAL AND INFORMATION ENGINEERING,UNIVERSITY OF OULU;INFOTECH OULU,UNIVERSITY OF OULU

C 308

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Tero Kangasvieri

C308etukansi.kesken.fm Page 1 Thursday, October 2, 2008 10:20 AM

A C T A U N I V E R S I T A T I S O U L U E N S I SC Te c h n i c a 3 0 8

TERO KANGASVIERI

SURFACE-MOUNTABLE LTCC-SIP MODULE APPROACH FORRELIABLE RF AND MILLIMETRE-WAVE PACKAGING

Academic dissertation to be presented, with the assent ofthe Faculty of Technology of University of Oulu, forpublic defence in Kajaaninsali (Auditorium L6), Linnanmaa,on November 21st, 2008, at 12 noon

OULUN YLIOPISTO, OULU 2008

Copyright © 2008Acta Univ. Oul. C 308, 2008

Supervised byProfessor Jouko Vähäkangas

Reviewed byDoctor Olli SalmelaProfessor Heiko Thust

ISBN 978-951-42-8920-0 (Paperback)ISBN 978-951-42-8921-7 (PDF)http://herkules.oulu.fi/isbn9789514289217/ISSN 0355-3213 (Printed)ISSN 1796-2226 (Online)http://herkules.oulu.fi/issn03553213/

Cover designRaimo Ahonen

OULU UNIVERSITY PRESSOULU 2008

Kangasvieri, Tero, Surface-mountable LTCC-SiP module approach for reliable RF andmillimetre-wave packagingFaculty of Technology, Department of Electrical and Information Engineering, Infotech Oulu,University of Oulu, P.O.Box 4500, FI-90014 University of Oulu, Finland Acta Univ. Oul. C 308, 2008

AbstractThe rapid growth in the wireless communications markets together with the emerging need for high-bit-rate (≫ 100 Mb/s) multimedia/data services are pushing the usage of radio spectrum resourcesbelow 10 GHz to the uttermost limit. The lack of bandwidth has led to an extensive development ofmobile/fixed BWA systems for the higher microwave and millimetre-wave regions up to the V-bandfrequencies (50–75 GHz). In order for these systems to have mass deployment and to meet cost-sensitive consumer markets’ requirements, their cost and size must be reduced from current levels.One of the most viable packaging approaches to satisfy these demands is the low-temperature co-fired ceramic (LTCC) based system-in-package (SiP) module technology combined with fullyautomated surface-mount assembly techniques. However, one of the main challenges of thisapproach has been previously associated with the broadband radio frequency (RF) and reliabilityperformance constraints of the board-level solder joints in LTCC/PCB assemblies. In this thesis theprimary focus is to tackle these limitations and significantly extend the feasibility of the LTCCmodule technology to various wireless/mixed-signal packaging applications.

The thesis is divided into three main parts. In the first part, design, modelling and implementationof vertical package transitions (BGA, flip-chip, substrate via) over a very wide frequency range arepresented. In the second part, the emphasis is on the improvement of the thermal fatigue enduranceof the board-level solder joints in the LTCC/PCB assemblies. In the last part, the results are mergedto realize a high-performance LTCC module platform for use in a wide variety of SiP products inthe telecommunication sector.

The flip-chip, substrate-via and BGA transition structures exhibited excellent signal transmissionproperties up to the V-band frequencies. The developed equivalent circuit models of the transitionsmatched well with the measurements. Cascading the transitions together allows the building ofdifferent combinations of vertical interconnection paths in SiP modules. To demonstrate this, asurface-mountable LTCC filter package for K-band radio link frequencies was implemented.

The developed composite BGA solder joint structure with plastic-core solder balls significantlyenhanced the thermal fatigue life in LTCC/PCB assemblies in different thermal cycling conditions,indicating adequate board-level reliability for many practical LTCC-BGA packaging applications.Moreover, electromagnetic analysis showed that the use of the plastic-core solder ball has nodetrimental impact on the RF performance of the solder joint.

Finally, based on the obtained results a reliable lead-free LTCC-BGA module platform wasdeveloped for broadband packaging applications. The BGA module platform with a size of15 mm × 15 mm included 38 low-frequency and two wideband RF input/output connections up tothe K-band frequencies. The module structure also allowed plenty of space to mount discrete SMD/bare-die components on the surface and/or to embed passive components in the 1.2 mm thicksubstrate. Preliminary thermal cycling results of the soldered LTCC/PCB assemblies demonstratedsufficient reliability for telecommunication applications. Therefore, the presented module platformcan serve as a physical building block for various wireless/mixed-signal SiP products, and hencesignificantly reduce their development time and associated costs.

Keywords: BGA, broadband, LTCC, packaging, reliability, SiP, transition

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Acknowledgements

First of all, I thank my supervisor Professor Jouko Vähäkangas for all his guidance and for providing me with the opportunity and facilities for doing this research. I thank Professor Heli Jantunen for her tireless support and encouragement. I want also to acknowledge Lic.Tech. Olli Nousiainen from the Materials Engineering Laboratory, for guiding me in my studies in the physical metallurgy and reliability of solder joints in electronic module assemblies.

I thank also my co-workers in the Microelectronics and Material Physics Laboratories and in the VTT Research Center, Oulu. Special thanks are dedicated to M.Sc. Jukka Halme, M.Sc. Mikko Komulainen, M.Sc. Lauri Lehtiniemi, Dr. Jari Juuti, M.Sc. Jussi Putaala, M.Sc. Timo Tick, Dr. Krisztián Kordás, Mr. Jyri Jäntti, Mr. Antti Paavola, Mr. Pekka Moilanen and Dr. Antti Uusimäki, M.Sc. Kari Kautio, M.Sc. Markku Lahti. Professor A.E. Hill is acknowledged for revising the English language of the manuscript.

This work was done mainly under the ACERMI (Advanced ceramic modules for RF- and microwave applications) I & II projects, supported by the Tekes (the Finnish Funding Agency for Technology and Innovation), VTT Technical Research Centre and several high-tech companies: Nokia Networks, Filtronic Comtek, Aplac Solutions, Selmic, Elektrobit, Asperation and Aspocomp. Other financing sources were the Graduate School of Infotech Oulu and the EMPART Research Group of Infotech Oulu. In addition, personal grants from the following Finnish foundations are greatly appreciated: The Nokia Foundation, The Science Foundation of Seppo Säynäjäkangas, Jenny and Antti Wihuri Foundation, Ulla Tuominen Foundation, Foundation for The Advancement of Technology, Riitta and Jorma J. Takanen Foundation and Tauno Tönning Foundation.

Finally, I would like to express my deepest gratitude to my family, Hanna and Veera, for their patient and endless support.

Oulu, September 2008 Tero Kangasvieri

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List of abbreviations and symbols

α Attenuation constant β Phase constant β0 Free-space phase constant γ Complex propagation constant τf Temperature coefficient of frequency λg Guided-mode wavelength λd Dielectric wavelength θ Weibull characteristic lifetime βw Weibull shape factor Z0 Characteristic impedance εr Relative permittivity tanδ Loss tangent 3-D Three Dimensional BWA Broadband Wireless Access BGA Ball Grid Array interconnection method CTE Coefficient of Thermal Expansion CPW Coplanar Waveguide CSP Chip-Scale Package DC Direct Current EM Electromagnetic EDS Energy Dispersive Spectrometry FC Flip Chip interconnection method GCPW Grounded Coplanar Waveguide HFSS High Frequency Structure Simulator, a 3-D EM field solver HTCC High-Temperature Co-fired Ceramic I/O Input/Output IC Integrated Circuit IMC InterMetallic Compound ISS Impedance Standard Substrate LTCC Low Temperature Co-fired Ceramic LGA Land Grid Array interconnection method LMDS Local Multipoint Distribution Service LCP Liquid Crystal Polymer LRRM Line-Reflect-Reflect-Match calibration method MMIC Monolithic Microwave Integrated Circuit

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MCM Multi-Chip-Module MCM-L Laminated MCM MCM-D Deposited MCM MS Microstrip MEMS Micro-Electro-Mechanical Systems MultiCal Advanced VNA calibration software package developed by the

NIST NIST National Institute of Standards and Technology, a federal

technology agency in the USA OSP Organic Solderability Preservative PCB, PWB Printed Circuit/Wiring Board PCSB Plastic-Core Solder Ball QFP Quad-Flat-Package RoHS Restriction of Hazardous Substances directive RF Radio Frequency SAC Sn-Ag-Cu SiP, SoP System-in-Package, System-on-Package SIW Substrate Integrated Waveguide SoC System-on-Chip S-parameters Scattering parameters SL Stripline SMD, SMT Surface-Mount Device/Technology SAM Scanning Acoustic Microscopy SCM SingleChip Module SEM Scanning Electron Microscopy TCT Thermal Cycling Test TEM Transverse Electromagnetic TRL Through-Reflect-Line calibration method VNA Vector Network Analyzer WG Waveguide WLAN Wireless Local Area Network

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List of original papers

Original papers are referred to throughout the text by their roman numbers.

I Jantunen H, Kangasvieri T, Vähäkangas J & Leppävuori S (2003) Design aspects of microwave components with LTCC technique, Journal of European Ceramic Society 23: 2541-2548.

II Kangasvieri T, Komulainen M, Jantunen H & Vähäkangas J (2008) Low-loss and wideband package transitions for microwave and millimeter-wave MCMs. IEEE Transactions on Advanced Packaging 31: 170–181.

III Kangasvieri T, Halme J, Vähäkangas J, & Lahti M (2006) Ultra-wideband shielded vertical via transitions from DC up to the V-band. In: Proceedings of 1st IEEE European Microwave Integrated Circuits Conference (EuMiC), Manchester, UK, 10–15 September: 476–479.

IV Kangasvieri T, Halme J, Vähäkangas J & Lahti M (2007) An ultra-wideband BGA-via transition for high-speed digital and millimeter-wave packaging applications. In: Proceedings of the IEEE MTT-S International Microwave Symposium, Honolulu, HI, USA, 3–8 June: 1637–1640.

V Kangasvieri T, Halme J, Vähäkangas J & Lahti M (2007) High-performance vertical transition for broadband and millimeter-wave BGA module packaging. IEE Electronics Letters 43: 638–639.

VI Kangasvieri T, Halme J, Vähäkangas J & Lahti M (2008) Low-Loss and broadband BGA Package Transition for LTCC-SiP applications. Microwave and Optical Technology Letters 50: 1036–1040.

VII Kangasvieri T, Piatnitsa V, Jantunen H, Vähäkangas J & Lahti M (2007) A Low-Loss Surface-Mountable LTCC-BGA Filter Package for K-band Radio Link Applications. In: Proceedings of the 11th International Symposium on Microwave and Optical Technology, Rome, Italy, 17–21 December: 505–508.

VIII Kangasvieri T, Nousiainen O, Putaala J, Rautioaho R & Vähäkangas J (2006) Reliability and RF performance of BGA solder joints with plastic-core solder balls in LTCC/PWB assemblies. Microelectronics Reliability 46: 1335–1347.

IX Kangasvieri T, Nousiainen O, Vähäkangas J, Kautio K & Lahti M (2007) Development of a reliable LTCC-BGA module platform for RF/microwave telecommunication applications. In: Proceedings of the 16th IMAPS European Microelectronics and Packaging Conference (EMPC), Oulu, Finland, 17.–20. June: 703–708.

X Kangasvieri T, Halme J, Vähäkangas J & Lahti M (2008) Broadband BGA-via transitions for reliable RF/microwave LTCC-SiP module packaging. IEEE Microwave and Wireless Components Letters 18: 34–36.

Paper I discusses design aspects critical to successful and profitable development of microwave and millimetre-wave (mm-wave) LTCC module assemblies. It covers important issues such as manufacturing tolerances, mechanical and

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electrical material properties, chip and board-level module interconnections, and thermal and reliability management. In fact, this paper provides the baseline for this thesis work.

Paper II describes the design and implementation of flip-chip, through-substrate via and BGA transitions applicable in microwave and mm-wave system-in-packages and multichip modules (MCMs). It provides in-depth knowledge of the design and analysis of low-loss and broadband vertical transition structures. All the designs are validated with on-wafer scattering parameter measurements up to 40/50 GHz.

Paper III focuses on the design and development of three ultra-wideband shielded vertical via transitions for use in broadband mm-wave/mixed-signal LTCC-SiP module applications. The broadband RF performance of the transitions was optimized by full-wave electromagnetic simulations and finally validated with microwave probe measurements from DC up to the V-band frequencies.

Papers IV–VI introduce low-loss and broadband BGA package transitions with various BGA sphere sizes (300, 500 and 800 μm in diameter). Detailed design guides are given to accomplish high performance BGA package transitions up to mm-wave frequencies. Moreover, Paper VI studies more critically the effect of grounding via fences on the transition performance and provides an accurate equivalent circuit model for the entire BGA-via transition path up to the top surface of the LTCC module package.

Paper VII presents a high-performance surface-mountable filter package for K-band radio link applications utilizing previously developed BGA-via transitions. Aspects affecting board-level reliability and manufacturability are also addressed.

Paper VIII investigates reliability and RF performance of BGA solder joints with plastic-core solder balls in LTCC/PWB assemblies. The thermal fatigue, electrical and thermal performance of plastic-core solder joints is compared with conventional non-collapsible solder joints (i.e. eutectic solder and 90Pb10Sn spheres). As an outcome, a composite BGA joint structure with enhanced thermal fatigue endurance in various thermal cycling conditions is presented.

Papers IX and X describe the design and development of a reliable LTCC-BGA module platform for RF/microwave telecom applications. The module platform can serve as a physical building block for various wireless/broadband SiP-based products up to the K-band frequencies. The module comprises of two broadband RF and multiple low-frequency BGA input/outputs (I/Os). The board-level reliability and RF performance of the soldered module assemblies are

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experimentally verified by accelerated thermal cycling tests and microwave probe measurements. Moreover, equivalent circuit models for the vertical RF transitions are developed which accurately describe their behaviour over the frequency range of interest.

The main idea behind the Papers II–X was the contribution of the author. All the papers, excluding Paper I, were prepared mainly by the author. In Paper I, the author was responsible for the interconnection, thermal and reliability management issues. In Paper VIII, in-depth metallurgical analysis of the solder joints was the contribution of the co-author Olli Nousiainen. All the microwave measurements, electromagnetic (EM) simulations and circuit modellings presented in the articles were conducted or supervised by the author. The fabrication of most of the LTCC test panels as well as flip-chip gold-bumping and mounting was done at the VTT Research Center, Oulu. Other manufacturing and process steps were performed at the Microelectronics and Material Physics laboratories together with the co-authors.

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Contents

Abstract Acknowledgements 5 List of abbreviations and symbols 7 List of original papers 9 Contents 13 1 Introduction 15

1.1 Status and trends in microwave and millimetre-wave packaging ........... 15 1.2 Aims and outline of the thesis................................................................. 22

2 Experimental and simulation procedures 25 2.1 Microwave measurements....................................................................... 25 2.2 Electromagnetic field simulations........................................................... 26 2.3 Reliability characterization methods....................................................... 28 2.4 Manufacturing of test assemblies............................................................ 29

3 Electrical design and implementation of low-loss and wideband package transitions 31 3.1 Design issues of wideband vertical package transitions ......................... 31 3.2 Flip-chip transition.................................................................................. 33 3.3 Substrate via transitions .......................................................................... 37

3.3.1 Unshielded via transition.............................................................. 37 3.3.2 Shielded via transitions................................................................. 39

3.4 BGA transitions....................................................................................... 41 3.4.1 Shielded BGA transition............................................................... 41 3.4.2 Partially shielded BGA transitions ............................................... 45

3.5 Equivalent circuit modelling of the transitions ....................................... 48 3.6 EM-based transition library development ............................................... 49 3.7 An application demonstrator – A low-loss LTCC-BGA filter

package for K-band radio link frequencies ............................................. 50 4 Design and characterization of a reliable BGA solder joint

structure for LTCC/PCB assemblies 53 4.1 Typical failure modes of BGA solder joints in LTCC/PCB

assemblies ............................................................................................... 54 4.2 Thermo-mechanically enhanced BGA joint structure ............................. 55 4.3 Reliability characterization of the LTCC-BGA test assemblies .............. 56

4.3.1 Thermal cycling results ................................................................ 56 4.3.2 X-ray, SAM and SEM analyses.................................................... 57

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5 Development of a reliable LTCC-BGA module platform for RF/microwave applications 59 5.1 Broadband BGA-via transition structure................................................. 61 5.2 Thermal cycling results ........................................................................... 63

6 Conclusions 67 References 71 Original papers 85

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1 Introduction

1.1 Status and trends in microwave and millimetre-wave packaging

Due to the rapid growth of wireless communication markets and an emerging need for high-bit-rate (» 100 Mb/s) wireless multimedia/data links, current radio spectrum resources are suffering from a shortage of bandwidth at frequencies below 10 GHz. This spectral limitation has generated an extensive development of mobile/fixed broadband wireless access (BWA) systems, such as point-to-point / point-to-multipoint radio links and wireless local area networks (WLANs), at higher microwave and mm-wave frequencies between about 20 and 60 GHz [1]. Especially, a wide unlicensed frequency band (7 GHz) around 60 GHz has gained large interest because of its possibility of allowing ultra-high speed (> 1 Gb/s) short-range wireless data transmission [2, 3]. Also various automotive radar based systems, including e.g. collision avoidance and adaptive cruise control systems, are shifting deeper into the mm-wave region (77/94 GHz) [4]. Moreover, in the near future, many new commercially feasible applications are arising at millimetre and sub-millimetre frequency range. These include advanced ultra-high-speed digital/optical (> 100 Gb/s) [5, 6] and wireless communication systems (> 100 GHz) [7, 8], compact range radars, biological and chemical sensors, medical diagnostic and security imaging systems [9–12].

In order for microwave and mm-wave communication and sensor systems (> 10 GHz) to have mass deployment and meet cost-sensitive consumer markets’ requirements, their cost and size have to be scaled down below what is being achieved today using traditional packaging and interconnection technologies. Microwave/mm-wave modules and sub-systems have usually composed of highly-integrated monolithic millimetre-wave integrated circuits (MMICs) or even discrete transistors, and sub-unit thin-film ceramic/organic substrates and thick-film hybrids for power supply, biasing and clock signals. All of the RF parts are automatically mounted and interconnected using mature dispensing, pick-and-place and wire-bonding processes inside a metal package with external RF/direct current (DC) feedthroughs. Although this leads to technically sound microwave and mm-wave module solutions, their overall costs are far from acceptable for commercial high-volume applications. [13–15]

In the past few years, various packaging concepts have been reported for producing microwave and mm-wave modules in higher volumes and greater

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circuit/functional integration, and most importantly, at much lower cost. One of these packaging approaches relies on mature and well-known surface-mount device (SMD) assembly technology. It means that discrete passives and single packaged MMICs together with highly integrated SiP modules are mounted and reflow-soldered onto a common PCB using automated SMD assembly processes, enabling true high-volume and low-cost manufacturing [15–18]. The SiP is defined here to be much more than a traditional MCM. It is considered as a fully functional system or sub-system package containing one or more integrated circuit (IC) chips together with other discrete or integrated optical/electrical/micromechanical components. Another obvious advantage of this packaging approach is that it leads to a fast and modular design process by using commercial SMD packaged components. In addition, it yields shorter time-to-market and easier product customization. Fig. 1a shows the implementation of a local-multipoint distribution service (LMDS) receiver demonstrator at 42 GHz based on the SMD module architecture. It is worth noting that the power, signal and logic electronics are also placed in the same module. The packaged MMIC components are mounted and soldered on a low-loss PCB made from Ro4003 material, whereas the power/low-frequency components are connected onto a standard low-cost FR-4 substrate. Afterwards both the PCBs are laminated together and finally attached to a metal baseplate for an efficient thermal management of high-power devices. The connections to a receiving antenna and a local oscillator are made through microstrip-to-waveguide transitions. In another application example (Fig. 1b), a complete 26 GHz point-to-point transceiver module is also implemented using only SMD-packaged MMICs.

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Fig. 1. a) A LMDS receiver demonstrator module at 42 GHz (edited from [16]) and b) a complete point-to-point transceiver module at 26 GHz using only SMD packaged components [18].

Three other previously presented concepts for packaging of mm-wave radio front-end modules are schematically illustrated in Fig. 2. In Fig. 2a, a complete radio front-end is implemented on an organic low-cost liquid-crystal polymer (LCP) substrate with excellent dielectric material properties (low loss and dispersion) [19–21]. The baseband and power electronics have been mounted on the standard FR-4 board, located on the other side of the module substrate. The chip-scale-packaged (CSP) or bare MMICs, based on low-cost CMOS and SiGe process technologies [22, 23], can be mounted onto the LCP substrate using, for example,

(a)

(b)

Power, signal, logic circuits

SMD IC packages

Antenna/RF input

Local oscillator(LO) input

IF output

© [2002] IEEE

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standard SMD component or flip-chip reflow-soldering processes. The LCP has good moisture resistance and its electrical material properties (εr, tanδ) are not sensitive to temperature variations and are hence well-suited for high-quality passive and active component integration [24, 25]. The coefficient of thermal expansion (CTE) value of LCP can also be tailored (8–17 × 10−6/K) close to that of Si-based chips, facilitating chip-level reliability management [26]. This type of hybrid LCP/MMIC integration approach for 60 GHz radio modules was recently implemented in [27]. In addition, a cost-effective CSP solution for a mm-wave chipset in the 60 GHz band was presented in [28].

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Fig. 2. Various concept views of mm-wave radio front-end modules a) [19], b) [29, 34], c) [30].

Highly-integrated LTCC-SiPs mounted on a common organic motherboard by BGA or LGA solder joints are also widely seen as viable packaging platforms for satisfying commercial markets' demand for miniaturized electronic components,

(a)

(b)

(c)

© [2005] IEEE

© [2005] IEEE

© [2005] IEEE

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sub-assemblies and integrated modules with high performance [31–33]. Two different LTCC-SiP approaches for implementation of wireless communication modules are presented in Figs. 2b and 2c. In the former figure, a 60 GHz transmitter is implemented into the 9-layer LTCC module with LGA solder joints. The module consists of five active MMIC devices (up-converting mixer, drive amplifier, power amplifier and two frequency multipliers) and two embedded passive components (band-pass filter and antenna array). The bare MMICs are wire-bonded to the ceramic cavities and hermetically sealed with a ceramic/metal lid. The functionality of this concept has been successfully verified in [34]. Other similar successful LTCC-SiP demonstrators are reported in [35, 36]. The last figure (Fig. 2c) depicts a hybrid module construction which utilizes both multilayer ceramic and organic substrate technologies to integrate a compact high-efficiency antenna array into a single front-end module. All the active functions are integrated into a single transceiver chip. The high radiation efficiency is achieved by minimizing the length of the antenna feeding path and by use of low-dielectric constant (εr < ~3) organic low-loss substrates (such as LCP or Teflon) for improving the radiation properties of the antenna array. This approach has been experimentally studied in [30].

Although System-on-Chip (SoC) oriented integration seems to be a very attractive approach to realize compact, low-weight and low-cost radio modules for up to 60 GHz frequencies [28, 37], the multilayer SiP approach also has its strong points. The SiP technology has the advantage of compatibility with chip design changes and integration of various chip technologies (e.g., SiC, Si, SiGe, GaAs, GaN, InP, SOI, MEMS and optical) without the high starting costs and lead time which are typically associated with IC development and manufacturing. Moreover, the multilayer packaging technology fully supports dense three-dimensional (3-D) integration schemes. Vertical via transitions inside the packages can be used for interconnecting active IC devices and high-quality passive components such as filters, antennas, capacitors, inductors, baluns and power dividers in buried layers. Closely spaced metallic via arrays and multiple ground/power planes provide improved electrical and thermal performance in terms of reduced electromagnetic coupling and radiation loss, as well as enhanced thermal dissipation [38]. They also enable an implementation of advantageous substrate integrated waveguide (SIW) structures and components [39, 40]. As stated earlier, the multilayer LTCC is widely considered to be one of the module solutions with the highest potential for commercial applications [41]. The compatibility with high-volume thick-film production processes and their stable

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dielectric properties in harsh environments are some of the distinct advantages of LTCC based components, and hence they are widely employed in the cost-sensitive automotive industry [42]. It also has good material properties for wireless/RF telecom applications, including for example, low material losses and dispersion properties over a very wide range of frequencies [43], a near-zero τf

(temperature coefficient of frequency) [44] and medium-range permittivity values for RF component miniaturization [Paper I, 45]. Today, LTCC manufacturing processes and materials are continually evolving [46–48]. Novel functional ceramic materials, such as ferromagnetic, ferroelectric and piezoelectric tapes/pastes, have been introduced [49–53]. This, together with advancements in integration of various sensors, actuators and photonic and fluidic microsystems, dramatically increases embedded functionality within a LTCC package [54–59], making LTCC an attractive candidate for implementation of next-generation miniaturized and multifunctional module assemblies.

Besides LTCC technology, there are also various other multilayer manufacturing technologies such as high temperature co-fired ceramic (HTCC) [60], deposited MCM (MCM-D) [61], advanced multilayer thick-film [62, 63] and laminated MCM (MCM-L) [64, 65], which are all suitable for implementing mm-wave SiP module solutions. However, the HTCC system uses lower conductivity metals than the LTCC, resulting in higher conductor losses. Also, LTCC technology has the advantage of having commercial mixed dielectric constant and magnetic tape systems, which are not available for HTCC. Due to its thin-film processing, MCM-D yields high precision modules and thus, lower performance variation at mm-wave frequencies than standard multilayer ceramic technologies but, on the other hand, this is typically at the expense of much higher manufacturing cost. In recent years, an advanced multilayer organic module technology (i.e. MCM-L) based on LCP material has evolved to be one of the prime (low-cost) candidates for commercial microwave/mm-wave module platforms [20, 26, 66]. The LCP enables a large area processing capability leading to significant cost reduction compared to LTCC substrates [19]. Due to its low-temperature processing, the active MMICs can be efficiently buried inside the module package [67]. Moreover, the low dielectric constant of the LCP implies that harmful surface-waves are not so easily triggered inside the module, thus significantly improving isolation properties. However, processing challenges such as Cu adhesion, bond registration and vias processing have limited widespread LCP implementation in module packaging compared to the relatively mature LTCC technology [68, 69].

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As a summary, the choice between the various packaging concepts and manufacturing technologies for the specific microwave/mm-wave product is ultimately dictated by several key deciding factors such as size, cost, production volume, power consumption, RF/thermal/mechanical performance, time-to-market, testability and manufacturability. Common to all the packaging approaches is the fact that that the role of interconnection technologies will be more emphasized as the operation frequencies move to the region of tens of GHz. To highlight the bandwidth requirements, e.g. for high-speed digital systems, data rates of 50 Gb/s necessitate the use of low-loss interconnection solutions that work up to 60 GHz [70]. At these frequencies, if not properly accounted for in the design stage, interconnections can critically degrade package performance; for example, in the form of increased losses, reduced isolation, excitation of detrimental resonances or narrower bandwidth. Also, as the current miniaturization and integration trends are forcing a reduction in the size and weight of the modules, interconnection sizes must scale down accordingly to accommodate the increasing number of I/Os. This leads to reduced solder joint sizes and higher interconnect densities, which in turn have an adverse impact on the high volume manufacturability and the thermal fatigue life of solder joints. Therefore, it is reasonable to argue that successful packaging and interconnection design is a key enabler towards profitable production of highly-integrated microwave/mm-wave module assemblies for cost-sensitive, high-volume consumer markets. These issues have been highlighted in more detail in Paper I, which basically provides the baseline for this thesis work.

1.2 Aims and outline of the thesis

The first objective of this thesis was to design, model and implement very wideband BGA, flip-chip and substrate-via interconnection/transition structures applicable in multilayer MCM/SiP-based modules for use up to the V-band frequencies. These interconnection types are schematically illustrated in Fig. 3, which shows a simplified example of an advanced 3-D integrated LTCC-SiP assembly on an organic motherboard. Furthermore, these transition structures needed to be compatible with each other, allowing the building of various transition chain types from the motherboard up to the top/buried layer of the module package. The second aim was to improve the BGA solder joint reliability in LTCC/PCB assemblies. The third and last target of the thesis was to combine

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the previous results in order to realize a reliable lead-free LTCC-BGA module platform for use in a wide variety of wireless/mixed-signal SiP products.

In Chapter 2, experimental procedures conducted in this thesis are presented. In Chapter 3, design issues important for the development of wideband mm-wave package transitions are discussed. Design and modelling procedures of the developed wideband package transitions are also described and the main results are presented. In addition, an EM-based transition library development is presented. Finally, to demonstrate the feasibility of the developed transition structures, a high-performance SMD-type LTCC filter package at K-band radio link frequencies is developed. In Chapter 4, design of a thermo-mechanically enhanced BGA solder joint structure for LTCC/PCB assemblies is introduced and its thermal cycling reliability is experimentally validated under various thermal loading conditions. In Chapter 5, design and implementation of a reliable LTTC-BGA module platform for wireless/mixed-signal SiP applications is presented.

Fig. 3. Schematic view of 3D Integrated LTCC-SiP with various internal and external package interconnections.

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2 Experimental and simulation procedures

2.1 Microwave measurements

The microwave measurements were carried out with an Agilent 8510C (45 MHz – 50 GHz) vector network analyzer (VNA) together with a Cascade Microtech’s probe station with 250 / 450 / 600 μm pitch air coplanar probes. In order to calibrate the measurement system, two different calibration procedures were utilized in this thesis. In Papers IX and X, the measurement system was calibrated from 45 MHz to 35 GHz using a one-tier line-reflect-reflect-match (LRRM) calibration technique and a Cascade’s impedance standard substrate (ISS). To further improve measurement accuracy, parasitic capacitance and inductance effects of the measurement probe pads were de-embedded using Cascade’s Wincal calibration software.

In Papers II–VII, a two-tier calibration procedure was adopted. An initial off-wafer LRRM calibration was done with the Cascade’s ISS substrate. A second-tier multiline through-reflect-line (TRL) [71] calibration was conducted using coplanar line standards fabricated on the same test panels as the investigated test structures. While the conventional TRL technique selects line pairs for applicable frequency ranges, the multiline TRL uses an optimally weighted average of all measured line standards. This greatly improves both the accuracy and the bandwidth of the calibration over the conventional TRL method. An implemented multiline-TRL calibration set used for wideband LTCC calibrations through Papers IV-VI is presented in Fig. 4a. The calibration kit is composed of 9 standards, including a pair of short elements (i.e. reflect elements), one thru element and 7 delay lines of different lengths. The sizing rules for the line lengths are similar to the conventional TRL technique. The optimal line is considered to be a quarter-wave in electrical length at the design centre frequency. For valid broadband calibration, it is also recommended that the lines’ phases remain between 20° and 160° in their corresponding frequency ranges [72].

After the two-tier calibration procedure, the measurement impedance is referenced to the characteristic impedance of the lines and the measurement reference planes can be adjusted to their desired locations, thus effectively de-embedding parasitic effects caused by the feedlines in the test structures [73]. In addition, the multiline TRL calibration with the NIST MultiCal software provides very useful information on the complex propagation constant (γ = α + jβ) of the

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measured transmission lines. For instance, the measured normalized phase and attenuation constants for the grounded coplanar waveguide (GCPW) lines in the LTCC test panel are shown in Fig. 4b. The rise in the normalized phase constant at low frequencies is typical of that caused by the series resistance of the thin metal conductors, while the slight monotonic increase in the phase constant at high frequencies is consistent with the quasi-transverse electromagnetic (quasi-TEM) behaviour of the GCPW mode [74]. Sometimes abnormal behaviour in the phase (β) or attenuation (α) constant can reveal unwanted multimode propagation in the transmission lines [Paper II, 75].

Fig. 4. a) A fabricated multiline-TRL calibration kit on a LTCC substrate and b) measured propagation properties of the GCPW lines.

2.2 Electromagnetic field simulations

Electromagnetic field simulations in this thesis were primarily performed using a full-wave 3-D field simulator, HFSS (Ansoft Co.), which is based on a finite-element method (FEM). The HFSS was selected because an accurate characterisation of complex vertical transition structures required the use of a full

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3-D field simulator. In addition, the HFSS was the only 3-D EM simulator tool available in the laboratory at the time of starting the thesis work. It is worth mentioning that there are also several other 3-D EM field solvers commercially available, which could have been used. These are, for example, Microwave Studio (CST, GmbH.), MEFiSTO-3D Pro (Faustus Scientific Co.), QuickWave-3D (QWED Co.), FIDELITY (Zeland Software, Inc.), XFDTD (Remcom, Inc.) and EMPIRE (IMST, GmbH.).

A half-symmetry was utilized mainly in all of the simulated EM models in order to shorten the computation time. This necessitated ensuring that the applied symmetry boundary condition did not suppress any critical propagation modes in the signal path. For instance, by applying the magnetic-field symmetry on a coplanar-type line prevents an excitation of a coplanar odd-mode (i.e. slot-line mode) in the line, and hence can lead to erroneous results. In addition, absorbing/radiation boundary conditions were assigned to the outermost air surfaces of the models to prevent harmful back-reflections from the radiated waves. The feeding transmission lines in the EM models were excited using wave ports. In order to optimize meshing of the EM models, an adaptive mesh refinement process was employed with a convergence criterion of Δ|S-matrix| < 0.02 at the transitions’ upper cut-off frequencies. Moreover, virtual (dummy) objects were used to control the meshing process, particularly in the feeding port areas for capturing correct propagation modes.

Constant loss-tangent and dielectric permittivity approximations were used for the dielectric material models, although the first assumption clearly violates the causality principle, leading to physically inconsistent results [76]. On the other hand, low-loss (tanδ < ~0.005) dielectric materials used in the thesis are known to be only weakly dispersive over a wide frequency range [77–80], and thereby the usage of constant approximations for their electrical dielectric properties is well justified. For the thick-film conductors, electrical conductivities of 90% of their bulk values were employed. This estimate was adopted after fitting broadband simulated loss data to corresponding straight transmission-line measurement results. The emphasis of the fitting procedure was on the lower side of the frequency spectrum because the conductor surface-roughness loss causes increasing deviation at the higher frequencies.

The contribution of the conductor surface-roughness loss was not considered in the EM simulations, although a couple of EM simulation methods for including the surface-roughness effect exist for the HFSS solver [81, 82]. Nevertheless, in order to accurately simulate the surface-roughness effect, root-mean-square

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(RMS) roughness values of conductor side(s) with the highest current magnitude have to be known. Other microstructural non-idealities, which were not accounted for in the simulations, were a penetration phenomenon of top conductors into the LTCC substrate [83–85], embedded air pores in the thick-film conductors and sharpened conductor edges in LTCC striplines [86, 87]. These process defects have been reported to alter the transmission-line properties (characteristic impedance, effective εr, loss) by up to ~10%.

2.3 Reliability characterization methods

In Papers VIII and IX, the reliability characterization of BGA solder joint structures in LTCC/PCB assemblies was performed according to test procedures shown in Fig. 5. X-ray microscopy (FeinFocus FXS-160.23) was used for the qualitative analysis of the BGA solder joint voiding and for the documentation of the misalignment and deformation of the non-collapsible spheres. The assembled test boards were subjected to a thermal cycling test (TCT) in the −40 to 125 ºC and/or 0–100 ºC temperature ranges at 1 cycle per hour. Ramp rates of 11 and 5 ºC/min as well as dwell times of 15 and 10 min were employed, respectively. Both TCTs were based on the guidelines of ‘‘JEDEC Standard No. 22-A104C’’ [88].

Resistance changes in the daisy-chained test assemblies were monitored by a Fluke 2635A data logger. Since a continuous resistance measurement cannot be done by the data logger, a test module was defined to be damaged when its initial resistance was doubled in the test. Scanning acoustic microscopy was used to detect the initiation and propagation of thermal fatigue cracks and to locate crack paths in the test modules during the thermal cycling tests. Test boards were taken out of the test chambers for SAM imaging at intervals of 15–100 cycles. The equipment consisted of a Sonoscan D-9000 C-mode scanning acoustic microscope with 50 MHz and 100 MHz focused transducers (F# = 2, pulse-echo mode). C-images were produced by using the interface scan technique [89].

For the characterization of microstructures, compositions and crack paths of the test assemblies in Paper VIII, scanning electron microscope (SEM)/energy dispersive spectrometry (EDS) investigations were carried out after the thermal cycling tests. The equipment consisted of a JEOL JSM 6400 scanning electron microscope and an INCA analyzer program.

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Fig. 5. Reliability test flow used for developed BGA test assemblies [Paper VIII].

2.4 Manufacturing of test assemblies

Most of the BGA and via interconnection test substrates/modules were fabricated using a standard LTCC process with screen-printed conductor lines [90, 91]. Typical LTCC manufacturing process flow is presented in Fig. 6. Only in Paper II, fine-line photoimaged thick-film conductors for feeding of through-substrate via transitions were used. A commercial DuPont 951 (εr = 7.8, tanδ = 0.0055) and Ferro A6-S (εr = 5.9, tanδ = 0.002) tape systems with Ag/AgPt metallization were employed in all test cases. In order to obtain well-defined and accurate conductor lines/spaces, fine-mesh trampoline printing screens were employed in critical signal layers. Via catch pads between the intermediate layers were omitted. In LTCC-BGA test assemblies, non-collapsible metal or plastic-core solder balls were first attached to the module pads using stencilled solder paste. After that the test modules were mounted onto motherboards employing standard SMD assembly processes.

Flip-chip interconnect test structures, discussed in Paper II, were made on alumina substrates. Narrow thick-film Au conductors were patterned on the substrates by an etching technique. Ceramic test chips were gold-bumped with a stud bumping process. To achieve sufficient bump height, a double stacked Au

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bump configuration was adopted. The Au bumped chips were finally mounted onto the ceramic boards using thermo-compression bonding.

Fig. 6. Standard LTCC manufacturing process flow.

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3 Electrical design and implementation of low-loss and wideband package transitions

3.1 Design issues of wideband vertical package transitions

There are two main techniques for implementing the transition between vertically offset transmission lines in a multilayer module package. The first method utilizes the electromagnetic coupling between multilayered transmission line structures [92–94]. However, the bandwidth of the electromagnetically coupled transitions is typically relatively narrow and their physical size can become impracticably large, especially at lower frequencies. The coupling structures can also be prone to leak the signal power into unwanted substrate-waves, thus causing undesired crosstalk between different components in the module package. This issue is more emphasized if the coupling mechanism is based on resonant-mode coupling instead of reactive near-field coupling [94]. The second transition implementation method is based on a direct galvanic coupling in which vertical connections are made using metallic via holes, solder balls/bumps or bonding wires. These transitions can provide compact size and very wide bandwidth from DC up to mm-wave frequencies. In this thesis work, the design focus was bounded on the development of vertical package transitions (via, BGA, flip-chip) with galvanic connection up to V-band frequencies, while closely keeping in mind aspects affecting thermal fatigue reliability and manufacturability.

To develop an electrically long via transition with good RF performance over a very wide frequency range, it is necessary to consider the vertical via structure as a transmission line with constant characteristic impedance, Z0. Consequently, parasitic reactances are then uniformly distributed along its length and do not harm as long as the characteristic impedance of the via structure is matched to the impedance of the feedlines and the feedline-to-via transition sections. Moreover, the electromagnetic field pattern of the propagating wave mode in the feedline needs to be transformed to a desired guided mode field pattern in a vertical via structure. Unfortunately, this mode conversion process can also induce parasitic guided modes, as well as radiation into free-space and substrate modes [95], thus reducing overall efficiency of the mode conversion. The parasitic guided modes, e.g. higher-order modes, degrade the signal propagation properties and can cause isolation problems (if leaky in nature) as well as longitudinal half-wavelength resonances. The radiation leakage phenomena, in turn, produce undesired

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crosstalk between nearby circuit elements and can generate unexpected package effects such as spurious resonances in a module package. [Paper II]

Therefore, as a summary, in order to design the via transition with low loss and very wide bandwidth, the mode conversion needs to be implemented with minimum impedance mismatch and high conversion efficiency. If the mode-field distributions differ greatly between input and output transmission structures (i.e. between the feedline and the via structure), a practical approach to implement efficient wideband mode conversion is to smoothly and gradually change boundary conditions at the transition (i.e. feedline-to-via) region, while simultaneously providing impedance matching [96]. This is usually implemented with a stepped or continuous tapering method [97]. In this case, the electrical length of the transition region becomes comparable to or larger than the wavelength. On the other hand, if the mode-field distributions are similar between the transmission structures, only one or more matching elements may be necessary to add at the interface in order to minimize the impedance discontinuity and thus to obtain low-loss and wideband operation. This results typically in an electrically short, lumped transition section (< 0.1λg), consequently all of its associated effects can be explained by the lumped equivalent circuit model. [Paper II]

In lumped-element transitions (e.g. in BGA and flip-chip), the upper frequency limit is determined by the magnitude of their parasitic reactances (i.e. capacitances and inductances), presuming that there exist both the impedance and field match at the transition/feedline interface, and that the excitation of parasitic transmission modes at the transition section is sufficiently suppressed over the frequency range of interest. Hence, to effectively reduce the reactances associated with the lumped-element transition structure, it is possible to significantly widen its bandwidth. On the other hand, if the reduction in reactance values is not possible, their effect can be compensated over a wide frequency range by incorporating them into a low-pass matching filter network [98, 99]. Furthermore, it has also shown that increasing the low-pass filter order allows significant widening of its bandwidth [100]. The primary downside of this approach is that higher order filters consume more valuable substrate/module space. Finally, it is worth mentioning that the connecting/feeding planar transmission lines in the vertical transition path need to be designed with low-dispersion and single-mode propagation properties over the frequency range of interest. Otherwise, these lines can severely degrade the electrical transfer characteristics of the vertical transition path.

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One of the main challenges in the development of wideband vertical package transitions is related to manufacturing tolerances and multimoding effects, especially at high frequencies. This is principally because as the wavelength of the propagating wave mode decreases, the sensitivity to the manufacturing tolerances increases. Moreover, any impedance discontinuities in the signal path caused by fabrication non-idealities (e.g. via-to-via or via-to-line alignment in a multilayer structure) can trigger parasitic transmission modes in a guiding wave structure or into a module substrate, degrading the signal transmission characteristics. The multimoding effects are more pronounced as the wavelength approaches the physical size of the guiding wave structure and/or the thickness of the module substrate. Therefore, an essential design requirement is to implement transition structures which are not sensitive to manufacturing variations, and hence can be produced using standard, high-volume manufacturing processes.

3.2 Flip-chip transition

There are two widely used chip-to-substrate interconnection methods in RF/microwave packaging applications; wire bonding and flip-chip bonding. These are depicted in Fig. 3. Wire bonding is a very mature chip-level interconnection technique and hence is often utilized for cost-sensitive and high-volume applications. However, above several GHz, relatively long wire bonds start to cause increasingly high signal losses and crosstalk problems. It has been estimated that a maximum cut-off frequency for a 410 μm long and 17 μm thick wire bond lies around 15 GHz, using 15 dB return loss as a criterion [101]. To increase the upper frequency limit of the wirebond transitions up to mm-wave frequencies, more costly and space consuming ribbon bonds and multiple wire configurations have been used [102–104]. These methods allow a reduction of the characteristic impedance of the highly-inductive wire connections by reducing their effective series inductance. Moreover, radiation loss at mm-wave frequencies can be reduced by placing the wires at an optimal angle [105]. Other more efficient solutions for bandwidth enhancement include shortening the wire bonds using a chip-cavity construction (see Fig. 3) or incorporating the parasitic wire inductance into a low-pass filter structure. It has been reported that these techniques can provide low-loss signal transmission properties up the W-band (75–110 GHz) frequencies [106–108].

The flip-chip interconnect technique has been previously demonstrated to be a highly feasible solution for microwave and mm-wave frequencies up to

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100 GHz [109–112]. Compared to the wire technology, it offers higher interconnect density and much better electrical performance in terms of repeatability, lower insertion losses and crosstalk due to its much shorter (~ tenfold) interconnection lengths. Moreover, flip-chip assembly processes are smoother and potentially more cost-efficient because all the chip-level interconnections are made simultaneously. However, the technique has some well-known concerns which limit its full-scale adoption in high-volume RF/mm-wave applications. One such limitation is a proximity effect in which the mounting substrate beneath the MMIC affects its RF behaviour [113]. This effect becomes more pronounced if the surface of the mounting substrate is metallized. This can typically be the case in highly integrated MCMs when improved shielding/grounding or heat-sinking performance is needed. The close proximity can also generate power leakage into substrate modes, which in turn can degrade isolation performance and induce harmful resonances [114]. Consequently, the MMIC may need to be redesigned every time the MCM substrate material or layout is altered. Another approach to avoid this is to increase the standoff height between the MMIC and the substrate to a level where the electromagnetic interaction between them becomes insignificant. This necessitates, in some cases, the employment of 50 μm or even taller flip-chip interconnects [113, 114]. The larger standoff height also potentially enables enhanced flip-chip joint reliability and facilitates capillary flow underfill process.

Unfortunately, the use of the larger bumps leads inevitably to larger bump-pad sizes, which are reported to be the primary reason for performance degradation at high frequencies when the unwanted proximity effect and substrate moding are sufficiently suppressed over the frequency range of interest [110]. Heinrich in [115] has estimated by simulations that an uncompensated flip-chip transition with a pad size of 110 μm can limit the upper end of the transition’s bandwidth to around 20 GHz. This is basically why the bump and pad sizes in many previous mm-wave flip-chip transition studies have been restricted to as low as 15–25 μm in height and 60–75 μm in diameter [110–112]. As a consequence, a utilization of low-cost solder bumping processes, such as wafer-level stencil printing [116], is not possible because they typically require pad and pitch sizes to be at least 100 μm and 200 μm, respectively. In practice, a pad size of 100 μm results in a flip-chip solder joint height of ~70 μm [117], which could sufficiently mitigate the proximity and substrate moding effects [113, 114].

In Paper II, a compact coplanar (CPW-to-CPW) flip-chip transition is designed and fabricated to minimize the adverse proximity and substrate moding

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effects while simultaneously providing excellent broadband transmission properties from DC to at least 50 GHz. More importantly, all of this is achieved by using bump-pad diameters of 135 μm – about twice as large as in [110–112] – and applying a simple impedance compensation structure. An optimized broadband flip-chip transition structure, 50 Ω CPW feedlines and its main dimensions are shown in Fig. 7.

Fig. 7. Optimized coplanar flip-chip transition structure. Dimensions are in μm (not to scale); H = 635, HB = 50, S = 130, WG = 4S = 520, G = 65, WC = 130 and LC = 120 [Paper II].

The measured normalized phase constant (β/β0, where β0 is the free-space phase constant) of the connecting CPW lines showed a smooth monotonic increase at high frequencies, which is consistent with the single quasi-TEM mode behaviour [74]. Also the measured attenuation constant (α) exhibited a square root (i.e. skin effect) dependence with increasing frequency, which verifies that the line loss is dominated by the conductor loss [95, 118]. Moreover, the results imply that the distributed radiation along the line into the substrate modes is not of concern, although the substrate thickness becomes comparable to a dielectric one-third wavelength at 50 GHz [119].

The measured and EM simulated S-parameter results for the optimized back-to-back flip-chip transition structure are presented in Fig. 8a. The measurement reference planes were established to the edges of the flip-chip transitions. The CPW line on the chip side was 3 mm in length. The measured insertion loss (|S21|) was less than 0.4 dB up to 50 GHz. The correspondence is very good with the simulated insertion loss. The measured return loss (|S11|) is better than 25 dB over the whole measured frequency range, which matches well with the simulation result. The measured insertion loss of the back-to-back flip-chip structure, its associated line loss and mismatch loss (evaluated as 10·log (1 − |S11|2)) are shown

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in Fig. 8b. The signal loss of a single flip-chip transition can be evaluated by subtracting the line loss from the overall insertion loss and dividing by two. Hence, the signal loss per flip-chip transition is less than ~ 0.05 dB up to 50 GHz, which is in the order of measurement accuracy.

Overall, the measurement results demonstrated that the reflections along the flip-chip signal path were successfully minimized. In addition, the very low transmission loss for the flip-chip transition indicated that the possible substrate modes launched at the transition are insignificant. A direct performance comparison with previous flip-chip studies is rather difficult to perform because the experiments differ in used materials, structures and dimensions. To our knowledge, the presented loss values for such large flip-chip interconnects are the best ever reported. The obtained results also indicate that low-cost solder bumping and surface-mount assembly processes could be highly viable alternatives for producing mm-wave flip-chip assemblies for cost-sensitive and high-volume applications.

Fig. 8. a) Measured and EM simulated S-parameters of the back-to-back flip-chip transition structure. b) Measured overall, line and mismatch losses of the back-to-back flip-chip transition structure as a function of frequency. [Paper II]

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3.3 Substrate via transitions

3.3.1 Unshielded via transition

One of the most interesting and versatile vertical transition types is the coplanar-to-coplanar waveguide (CPW-to-CPW) line transition. Various CPW line configurations, including symmetric and asymmetric CPW, embedded CPW, GCPW and finite-ground CPW, have shown great potential over microstrip lines at microwave and mm-wave frequencies and are thus being increasingly employed in MMICs and in MCM-based modules [120]. Besides having low-dispersive propagation properties, the CPW fields are concentrated at the slots, which makes the CPW line characteristics relatively insensitive to substrate thickness. In addition, the CPW lines yield typically better isolation performance than microstrip lines [121], and they allow implementation of a variety of high-quality uniplanar lumped elements, filters and antennas, thus providing optimal circuit compactness [122]. The CPW lines are also very suitable for connecting flip-chip MMICs and other external components with small parasitic effects. Therefore, it is of practical importance to be able to vertically interconnect various coplanar structures in a multilayer package with low transmission losses up to the mm-wave region.

Wideband CPW-to-CPW substrate-via transitions with a ground-signal-ground (G-S-G) via configuration have previously been reported in [31, 123]. However, these transitions are shown to be useful only up to 32 GHz, above which spurious resonance-like effects degrade their frequency response. In Paper II, an enhanced wideband CPW-to-CPW via transition is designed and implemented up to 45 GHz, thus providing a notable improvement in RF performance in terms of wider bandwidth (~ 15 GHz) and smaller transition losses. The design optimization included a throughout analysis of the effects of via size and grounding on the performance of the coplanar via structure. This allowed efficient suppression of parasitic mode excitations, which is one of the key factors in achieving excellent performance at the mm-wave frequencies. A designed CPW-to-CPW via transition topology, 50 Ω feedlines and main dimensions are presented in Fig. 9.

The measured complex propagation constant of the connecting CPW lines indicated single quasi-TEM mode operation across the measured band (45 MHz–50 GHz), as in the previous case with the flip-chip ceramic substrates. However, the measured line loss now showed a linear dependence at higher frequencies

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(> ~20 GHz), which suggests that dielectric loss now begins to dominate over conductor loss at these frequencies. Nevertheless, there was again no sign of power loss to the substrate-waves although the substrate becomes electrically quite thick (0.37λd @ 50 GHz, where λd is the dielectric wavelength) at mm-wave frequencies.

Fig. 9. Schematic view of the optimized through-substrate LTCC via structure (100 μm vias) with its main dimensions in μm; H = 800, S = 250, G = 90 and WG = 4S = 1000 [Paper II].

The measured and EM simulated performance of the fabricated back-to-back via structure is presented in Fig. 10a. The measurement reference planes were set to the edges of the probe tips. The CPW feedlines and the line between the via transitions were 2.5 and 5 mm in length, respectively. The measured performance is excellent, showing that |S11| is better than −20 dB over the whole measured frequency range. In addition, the measured results (|S11| and |S21|) correlate very well with the EM simulation results. Fig. 10b shows the measured insertion loss of the back-to-back via structure, its associated line loss and mismatch loss. Again, the signal loss of a single via transition can be evaluated by subtracting the line loss from the overall insertion loss and dividing by two. From the figure, it can be estimated that the signal loss per via transition is as low as ~0.3 dB at 45 GHz. After that the signal loss increases clearly, indicating that more power is coupled into unwanted substrate modes because the mismatch loss is maintained at very low level over the whole measured frequency range. Therefore, in order not to degrade the isolation performance of a multilayer package after 45 GHz, various circuit sections should be shielded with ground/power planes and dense via fences.

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Fig. 10. a) Measured and EM simulated S-parameters of the back-to-back through-substrate via transition structure. b) Measured overall, line and mismatch losses of the back-to-back via transition structure as a function of frequency. [Paper II]

3.3.2 Shielded via transitions

Densely populated via fences and solid ground/power planes in a multilayer package can provide improved RF performance in terms of reduced electromagnetic coupling and radiation loss. Moreover, shielded vertical via structures, formed by a signal via and its surrounding ground vias, not only minimize unwanted signal crosstalk between adjacent circuit elements and suppress power leakage into parasitic substrate modes but they also provide well-controlled transition impedance, which is a prerequisite for implementation of wideband via transitions.

GCPW, microstrip (MS), and stripline (SL) are widely used planar transmission-line types in multilayer packaging applications. Vertical via transition designs between these line types have been previously presented in [31, 123, 124]. However, their usable bandwidth has in many cases been limited to between 27 and 37 GHz. Therefore, there is a distinct need to develop low-loss via transitions up to the V-band frequencies (50–75 GHz).

In Paper III, three shielded LTCC via transitions that provide very wideband operation with low transmission losses from DC up to the V-band are designed and implemented. Briefly, these transition types are: GCPW-to-GCPW, GCPW-to-MS and GCPW-to-SL. The geometry and dimensions of the transition structures were designed to achieve an optimal mode-field and impedance

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matching between the via transitions and the feedlines. To ensure low-loss operation, radiation leakage into parasitic substrate modes is suppressed by using closely spaced shielding vias.

The designed transition structures together with their measured and EM-simulated S-parameters are shown in Figs. 11, 12 and 13. All the fabricated via transitions were arranged in back-to-back configuration for the probe measurements. The measurement reference planes were established to the edges of the transitions. The connecting lines between the via transitions were 6 mm in length. As shown from the figures, the measured return and insertion losses are better than 18 dB and 1.07 dB, respectively, in all cases up to 50 GHz. The extracted insertion loss values for the single transitions were less than about 0.4 dB at 50 GHz. Moreover, full-wave EM simulations demonstrated the high potential of the GCPW-to-GCPW and MS-to-GCPW via transitions up to 70 GHz (shown in Paper III). The main reason for the discrepancies between the measured and simulated results is most likely attributed to manufacturing tolerances: for example, maximum deviances of 30 μm in conductor line dimensions were determined in the test panels. The imperfections in the calibration elements also affect the quality of the calibration and thus the measurement accuracy. Moreover, the EM field simulator seems to underestimate the insertion loss values of the implemented test structures at higher frequencies (> 30 GHz). A reasonable explanation for this is that the simulator does not account for losses due to the conductor surface roughness.

Fig. 11. Optimized GCPW-to-GCPW via structure with main dimensions in μm; H1 = 200, H2 = 400, a = 225 and b = 325, and measured and EM simulated performance. [Paper III]

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Fig. 12. Optimized MS-to-GCPW via structure with main dimensions in μm; H1 = 200, H2 = 400, a = 225 and b = 325, and measured and EM simulated performance. [Paper III]

Fig. 13. Optimized SL-to-GCPW via structure with main dimensions in μm; H1 = 200, H2 = 600, H3 = 400, a = 275 and b = 350, and measured and EM simulated performance. [Paper III]

3.4 BGA transitions

3.4.1 Shielded BGA transition

Surface-mountable IC packages and modules, including SiPs and singlechip/multichip modules (SCM/MCM), connected onto an organic motherboard with high-density LGA or BGA solder joints are widely considered to be a low-cost packaging solution for high-volume microwave and mm-wave

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electronic systems [98, 100, 108, 125–127]. The LGA interconnection method enables smaller solder joint sizes compared with the BGA technique, which in turn leads to smaller interconnect parasitics and hence improved signal transmission properties. Moreover, the LGA joints are easier and cheaper to fabricate. However, it is well known that the LGA joints are more susceptible to thermal fatigue failures owing to their reduced standoff height (i.e. joint height) between the motherboard and the module package. It has been estimated that this can limit the maximum allowable LTCC-LGA package size to about 8 mm × 7 mm [32]. Hence, the BGA module packages have the advantage of providing enhanced board-level reliability and larger/thicker module sizes but at the expense of compromising the RF performance of the transitions, e.g. reduced bandwidth and higher radiation loss.

Although BGA is a well-known interconnect method for surface-mounting electronic module packages, its broadband microwave and mm-wave properties have so far been studied very little. In the literature there are only a few papers [128–131] that address the issue. Moreover, all of these papers are presented or co-authored by a commercial company representative, with the result that the transition structures are not revealed sufficiently. Only some basic principles of the transition structures or photographs of the top/bottom of the BGA package are given and thus the reproduction of those experimental results is practically impossible. The reported results are also mainly focused on BGA transitions with solder joint sizes of around 300 μm, which are not necessarily enough to attain sufficient board-level reliability in soldered BGA module assemblies [132]. This concern is emphasized with larger/thicker module sizes and greater global CTE mismatch values between module and motherboard base materials [133–135]. Besides the broadband designs, there are also a couple of reports on band-limited microwave and mm-wave BGA transition designs utilizing quarter-wave open stubs for realizing ground connections at their operation frequencies [31, 32]. However, due to their relatively narrow bandwidth and their propensity for excitation of harmful substrate modes [32], improved transition designs are needed.

In Paper II, a detailed shielded BGA-via transition design from DC up to mm-wave frequencies using solder joints as large as 500 μm is described, analyzed and experimentally validated with measurements. The obtained increase in BGA joint height from 300 to 500 μm can potentially enhance the board-level reliability of a RF/mm-wave module package more than tenfold [136]. The

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schematic view of the developed broadband BGA-via transition structure is depicted in Fig. 14.

Fig. 14. Cross-sectional view of the shielded BGA-via transition structure; (a) LTCC module side with BGA joints (b) motherboard side with circular BGA solder pads marked on the top surface. [Paper II]

Fig. 15. Measured normalized phase and attenuation constants of the GCPW feedlines in the BGA-via transition test structure.

The measured complex propagation constant (45 MHz–40 GHz) of the GCPW feedlines in the fabricated BGA-via transition test structure is shown in Fig. 15. The normalized phase constant showed a smooth monotonic increase up to about 33 GHz, after which some waviness in its value was noticed. In addition, the attenuation constant exhibited a clearly increasing ripple after 33 GHz and grew

(a) (b)

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significantly again near 38 GHz. These results indicate that the parasitic WG mode excited at the measurement probe-to-GCPW line transition begins to propagate and interfere with the dominant GCPW mode soon after 33 GHz. It should be noted that this frequency matches quite well with the approximated cutoff frequency (35.3 GHz) for the ideal TE10 mode in the GCPW line.

Fig. 16a shows the measured and simulated insertion and return losses of the back-to-back BGA-via structure. The measurement reference planes were shifted to the edges of the BGA transitions. The measured |S21| value is less than 0.75 dB up to 28 GHz and correlates very well with the simulations within that band. Correspondingly, the measured |S11| value is less than −15 dB up to 28 GHz, after which the correspondence with simulated values clearly begins to differ. This is partly believed to occur due to increased sensitivity to manufacturing tolerances at higher frequencies and partly due to the overmoding in the GCPW line which degrades the measurement accuracy [137]. Nevertheless, the |S21| and |S11| of the back-to-back transition configuration remain better than 2 dB and 10 dB, respectively, up to 38 GHz. In other words, the single BGA transition has the |S21| and |S11| better than 1 dB and 16 dB, respectively, up to 38 GHz.

Fig. 16b presents measured insertion and mismatch losses of the back-to-back BGA structure, as well as the EM simulated line loss of the connecting SL. From the results, the signal loss for the complete BGA-via transition structure can be evaluated to be as low as 0.5 dB (1 dB) at 32.5 GHz (38 GHz). It should be noted here that the loss of the bare BGA section would be even less. The steep loss increase after 38 GHz is probably attributed to two main reasons. Firstly, the increased impedance mismatch at the BGA transition section begins to degrade the signal transmission properties (shown in Paper II). Secondly, the parasitic WG mode in the GCPW line starts to severely interact with the dominant GCPW mode, thus degrading its propagation properties [138–140].

Also, some sharp parasitic peaks (i.e. weak resonance-like effects) were observed in the insertion loss curve, which were not shown in the initial simulations. Subsequent simulations verified that the peaks were caused by longitudinal standing-wave (i.e. cavity-like) resonances in the shielded SL structure. Therefore, the proposed via transition structure was not sufficient for complete prevention of the parasitic WG mode excitation in the SL section, although it presumably suppressed the mode considerably.

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Fig. 16. a) Measured and EM simulated S-parameters of the back-to-back BGA transition structure. b) Measured overall, line and mismatch losses of the back-to-back BGA transition structure as a function of frequency. The line loss is EM simulated. [Paper II]

3.4.2 Partially shielded BGA transitions

The upper bandwidth of the broadband BGA transitions/packages has previously mainly been limited between 30 to 40 GHz [128–131]. Therefore, it is of great practical interest to develop a BGA transition that covers a wider range of commercial applications up to V-band frequencies.

In Paper IV, a design of a high-performance BGA-via transition structure that provides very wideband operation with low transmission loss, potentially up to 70 GHz, is described. More specifically, two slightly different versions of the BGA-via transition structure are presented. The first one is optimized up to 50 GHz, while the latter one shows high potential even up to 70 GHz, but at the expense of higher impedance mismatch loss over the whole frequency range. The optimized DC-to-50 GHz version is depicted in Fig. 17. To provide a well-controlled interconnection height, non-collapsible plastic-core solder balls (PCSBs) with a diameter of 300 μm are employed in the BGA transition section. The wideband through-substrate via transition design is adopted from Paper III.

The very wide bandwidth in both design cases is achieved by reducing capacitive loading in the BGA transition (i.e. to minimize the impedance discontinuity) at the expense of reduced shielding. This method also allows a decrease in the BGA ball pitch well below one-quarter of the free-space wavelength over the bandwidth of interest while maintaining the pad size large

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enough without sacrificing the reliability of the solder joints. The reduction in capacitive loading is implemented in practice by making circular aperture openings in the ground planes on both sides of the BGA signal joint, as shown in Fig. 17. However, to prevent excitation of detrimental package/substrate modes, especially at higher microwave frequencies, shielding cages need to be placed around the ground openings (see Fig. 17). It was also important to ensure that their shielding performance was adequate by placing the vias in close proximity (less than one-quarter of the dielectric wavelength) and by connecting them together in multiple layers [141, 142]. In addition, to prohibit possible resonance modes inside the shielding cages, their size had to be scaled well below the wavelength of interest.

Fig. 17. Cross-sectional view of the partially-shielded BGA-via transition structure. The BGA ball size is 300 µm. [Paper IV]

In Papers V and VI, the same bandwidth enhancement technique is utilized in BGA transition designs employing bigger 500 µm and 800 µm BGA balls. The use of bigger BGA balls aims to increase the board-level reliability of soldered BGA module assemblies, since the stand-off-height is one of the main parameters that affect the thermal fatigue life of the solder joints. In Paper VI, the possibility of removing the bottom shielding fence (i.e. motherboard side) around the BGA signal joint was also studied, because the reduction in processed PCB layer count would naturally lower the manufacturing costs. Moreover, in Paper VI, a cascaded equivalent circuit model for the entire BGA-via transition path from the PCB up to the top surface of the LTCC module package was developed. The circuit modelling results also verified that both the BGA and via transitions start to act as inductive chokes near their cutoff frequencies, thus explaining the abrupt degradation in performance.

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The measured and simulated S-parameter results of the DC-50 GHz BGA-via transition structure using 300 μm solder balls are presented in Fig. 18a. The measurement reference planes were shifted to the edges of the BGA-via transition structure. As shown from the figure, the measurement results match very well with the simulations exhibiting return and insertion loss values better than 22 dB and 0.6 dB, respectively, up to 50 GHz. The insertion loss of the adopted via transition has previously been determined to be 0.25 dB at 50 GHz [Paper III]. Thus, it follows that the bare BGA transition has a loss of 0.35 dB at 50 GHz. Moreover, open circuit isolation between two opposite transition structures with a gap width of 5 mm was measured. This case evaluates the input/output port isolation of the BGA package when use of an IC die with a size of 5 mm is considered. The measured isolation performance is presented in Fig. 18b, showing that the isolation remains better than 40 dB up to 50 GHz.

Fig. 18. a) Measured and EM simulated S-parameters of the BGA-via transition structure. b) Measured open circuit isolation between two opposite BGA-via transition structures; D = 5 mm. [Paper IV]

The measured 1-dB cut-off frequency and open circuit isolation for the BGA-via transition structures with different BGA sphere sizes are presented in Table 1. The results are collected from Papers IV–VI. It should be mentioned that the 1-dB cut-off frequency for the 800 μm BGA transition case would likely be ~10% higher if the shielding cage was used on the motherboard side. It can be noticed from the Table that the 1-dB cut-off frequency reduces in inverse proportion to the BGA sphere size. This is due to the fact that the bigger BGA joints have inherently larger interconnection reactances, which ultimately determine the upper frequency limit of the BGA transition. Therefore, the electrical and the board-level reliability performance issues clearly compete against one another and the final BGA module design is always a trade-off between them.

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Table 1. Measured 1-dB cut-off frequency and open circuit isolation for the BGA-via transition structures with different BGA sphere sizes.

BGA sphere size [μm] 1-dB cut-off frequency [GHz] Open isolation***

300 55*, 67** ≤ 40 dB @ 50 GHz

500 47 ≤ 38 dB @ 50 GHz

800 29 ≤ 40 dB @ 28 GHz *Simulated value for the DC-50 GHz transition structure, **Simulated value for the enhanced DC-70 GHz

structure, ***The gap width between opposite transition structures was 5 mm.

3.5 Equivalent circuit modelling of the transitions

An equivalent circuit used for both the BGA and via sections is presented in Fig. 19. It is based on a conventional T-model, where L, C, and R are the effective series inductance, the shunt capacitance and the series DC resistance of the vertical via/BGA transition, respectively. C1 and C2 denote the shunt capacitance of the via/BGA pads seen from port 1 and port 2, respectively. To account for frequency-dependent losses associated with skin and proximity effects, Rp and Lp have been added to the model. First order approximations of the T model circuit values were obtained using analytical expressions derived for a three-wire line in [143]. This is justified, since a significant part of the current flows through the signal joint and its two adjacent ground joints in both the BGA and via transitions. The BGA pad capacitances were evaluated by applying a simple parallel-plate capacitor equation. The subsequent fitting of the model with the EM simulated results was performed with a linear RF circuit simulator (Ansoft Designer).

The validity of the developed lumped equivalent circuit model for the BGA and via transitions has been demonstrated in Papers VI and X. The circuit modelling results correlated well with the EM simulations and the microwave measurements over a very broad bandwidth. It is worth mentioning that the same circuit model with a small modification is also well suited for flip-chip transition structures. In the case of flip-chip, the C parameter in the model (i.e. describing the coupling capacitance between signal and ground bumps) can be omitted because the bump interconnections are typically very short (~25–50 μm). Hence, the transition model actually reduces into a simple П-circuit, which has been previously applied successfully in the modelling of wideband coplanar flip-chip transitions [144, 145].

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Fig. 19. Equivalent circuit model for the BGA and via sections [Paper VI].

3.6 EM-based transition library development

In order to speed up the design process of surface-mountable RF/mm-wave module packages, it is essential to develop a set of EM-based models for different types/sizes of BGA and via transitions. The separate EM transition models can then be cascaded together as “building blocks” in a RF circuit simulator to form a desired package transition with tight impedance and mode pattern control. In practice, this can be accomplished by using modern design software packages, such as the Ansoft DesignerTM from Ansoft Co. Ltd., which support efficient EM/circuit co-simulation [146]. They also provide the possibility to geometrically parameterize the EM transition models, which allows an effective analysis of their sensitivity to manufacturing tolerances or a rapid re-optimization of their electrical performance if the layer stack-up or the material system of the module is altered. However, the final design verification of the developed package transition should always be performed with a full-wave 3-D EM simulator in order to capture all possible parasitic effects such as, for example, spurious resonances and near- and far-field couplings between various transition sections. For instance, if the transition models are placed too close to each other in the final package layout, higher-order evanescent modes launched at the transitions can degrade the electrical performance of the designed transition path [147].

In this thesis, broadband GCPW-to-GCPW BGA transition models with three different solder joint sizes (300, 500 and 800 μm), as well as three types of shielded via transition models, are developed for Ferro’s A6-S LTCC system. The developed set of geometrically parameterized transition models enables the implementation of 9 different transition path combinations from the motherboard up to the top/buried layer of the module package. The decision on which

Copyright © 2008 John Wiley & Sons, Inc.

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transition models are selected for inclusion into the application specific BGA module package depends on many factors, e.g. reliability, signal loss and frequency-range requirements. In Fig. 20, a BGA-via transition set applicable for broadband mm-wave module development is presented.

Fig. 20. A set of developed EM-based transition models for mm-wave BGA module development.

3.7 An application demonstrator – A low-loss LTCC-BGA filter package for K-band radio link frequencies

To demonstrate the applicability of the previously developed transition structures, a high-performance LTCC-BGA filter package was realized for K-band radio link frequencies in Paper VII. Consideration was also given to achieving a process-tolerant and reliable filter package assembly. A simplified schematic view of the developed package is shown in Fig. 21. A four-pole edge-coupled bandpass filter element with a centre frequency of 22.5 GHz was fully embedded inside a multilayer LTCC substrate. The wideband vertical BGA-via transition path between an organic motherboard (PCB) and the filter structure was adopted from Paper II. The complete BGA filter package was mounted onto the hybrid-PCB using standard SMD assembly processes.

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Fig. 21. A principle view of the TCC-BGA filter package for K-band frequencies [Paper VII].

A picture of the implemented LTCC-BGA filter package assembly is presented in Fig. 22a. To provide efficient shielding against radiation and low-dispersion properties, the resonators were arranged in a symmetric SL configuration. The planar SL topology is also insensitive to layer-to-layer alignment tolerances. The line/gap widths of the resonator circuits were realized to be quite large (min. 180 μm) in order to alleviate sensitivity to screen printing tolerances. To avoid parasitic waveguide moding inside the package, continuous shielding vias around the filter structure were omitted. To address the board-level reliability issues, PCSBs were employed. Moreover, the PCSBs provide predictable RF characteristics because they do not collapse during reflow soldering.

Microwave measurement results of the four fabricated BGA test assemblies are depicted in Fig. 22b. The results showed good repeatability and matched well with simulations. The measured |S21|min and |S11|max values in the passband were better than 1.45 dB and 16 dB, respectively, in all cases. The measured frequency responses were free from parasitic package resonances and the out-of-band rejection levels were better than 35 dB up to 37 GHz. In addition, the EM post-simulations (HFSS) explained the offset drifting out of the acceptable range and demonstrated the importance of determining the substrate’s permittivity at the design frequency and the overall thickness prior to the design stage.

Finally, to verify the accuracy of the conducted EM simulations, an additional simulation was made on the band-pass filter structure using the CST Microwave Studio, which is based on a finite integration technique. It was found that the simulation results were almost identical to those of HFSS (FEM-method) in terms of the filter’s bandwidth and centre frequency. There was only 22 MHz difference in the simulated centre frequencies, which actually corresponds to an εr value change of ~0.01. Therefore, since the simulations correlated very well with each

Reprinted with permission from IJMOT/ISRAMT- ISMOT’07 proceedings, 505-508.

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other, it is highly likely that the numerical solutions are fully converged and hence accurate enough to confirm the obtained results.

Fig. 22. a) A fabricated LTCC-BGA filter assembly and b) S-parameter measurement results (|S21|, |S11|) of four BGA filter packages. [Paper VII]

(a) (b) Reprinted with permission from IJMOT/ISRAMT- ISMOT’07 proceedings, 505-508.

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4 Design and characterization of a reliable BGA solder joint structure for LTCC/PCB assemblies

The LTCC is a highly viable substrate platform for developing highly-integrated microwave and mm-wave SiPs due to its excellent high-frequency material properties (low loss and dispersion) and its dense 3-D integration and miniaturization capability [148]. To provide high interconnection density and compatibility with automated high-volume SMD assembly, LTCC-SiP modules are connected to organic motherboards using area-array compatible BGA or LGA interconnection methods [31, 32, 126]. From the perspective of interconnect reliability, LTCC module substrates typically have a CTE value comparable with MMICs, thus providing good chip-level reliability. On the other hand, the board-level reliability can easily be degraded when the LTCC modules are mounted on the PCBs with solder joints because the global CTE mismatch between the substrate materials is commonly in the order of 10–15 ppm/ºC causing large shear strains/stresses in the solder joints during thermal fluctuations [149]. The cyclic thermal stresses, in turn, induce typically creep/fatigue related cracks in the solder joints or/and cracking in the ceramic substrate due to overload [150]. After initiation, the cracks will continue to propagate through the weakest points of the joint structures and degrade their mechanical integrity until failure occurs.

Therefore, it is important to reduce the susceptibility of the solder joints in LTCC/PCB assemblies to such premature failures and hence to improve the board-level reliability to a level which is adequate for a wide range of telecom, industrial and automotive applications. As a solution to alleviate the thermal mismatch effects, a thermo-mechanically enhanced LTCC-BGA joint structure is developed and experimentally verified in Paper VIII. Compared to the conventional composite BGA joint structure (i.e. eutectic solder and 90Pb10Sn spheres), the enhanced joint structure is shown to provide higher board-level reliability and narrower failure distribution under various thermal loading conditions.

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4.1 Typical failure modes of BGA solder joints in LTCC/PCB assemblies

Typical failure modes of conventional composite BGA solder joints in LTCC/PCB assemblies can be characterized as:

– Failure mode A: Cracking in the ceramic – Failure mode B: Metallization detached from the ceramic – Failure mode C: Cracking within the solder

Failure mode A usually results from the reaction between Sn-based solders and some thick-film pad metallizations (e.g. AgPd) during the reflow soldering process. Due to the formation of a mixed intermetallics/solder layer, the strength and elastic modulus of the solder region next to the ceramic interface is increased by dispersion hardening. This causes cracks to propagate in the LTCC ceramic instead of in the solder region [151–155]. In failure mode B, the pad metallization detaches from the LTCC substrate during cyclic thermal loading due to inadequate adhesion between the metallization and the ceramic substrate [152]. Failure mode C represents cracking in the solder region near the pad metallization. This is considered to be the preferred fracture mechanism because in this case the crack propagation rate, and thereby fatigue life, can be estimated with reasonable accuracy, which is not possible with the other failure modes [156, 157].

Previously, a couple of methods for the elimination of failure modes A and B have been reported. One common approach is to reduce the CTE mismatch between the LTCC and PWB base materials. This can be achieved by using a ceramic substrate with a higher CTE value or a PCB with a lower CTE value [158, 159]. However, this option limits the number of material vendors and thus probably increases the material costs. Another method is to apply a solder mask defined pad construction on the LTCC side [156, 157]. More specifically, circular shaped solder pads with an overlapping solder mask layer made of either a co-fired glaze or a polymer-based coating are used to increase the adhesion strength of the LTCC/metallization interface. This type of BGA joint structure has resulted in the preferred failure mode C and an acceptable thermal fatigue lifetime (~1000 cycles) in the thermal cycling test between −40 and +125 ºC [157]. In addition, Okinaga et al. [160] have recently introduced PCSBs as an alternative to solderballs. The non-collapsible plastic-core with low Young’s modulus is primarily aimed at relaxing thermally induced stresses in BGA solder joints.

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4.2 Thermo-mechanically enhanced BGA joint structure

A thermo-mechanically improved BGA joint structure with its main dimensions is depicted in Fig. 23. Compared to the conventional composite BGA solder joint structure, the non-collapsible solder balls were changed from the lead-rich 90Pb10Sn balls to the more elastic PCSBs, lowering the thermally induced shear stress/strains in the solder joints. Moreover, the AgPt metallized pads with the overlapping glass solder mask were made on the LTCC side in order to prevent ceramic cracking and metallization detachment from the ceramic.

Fig. 23. Schematic view of developed BGA joint structure and its main dimension in millimetres (not to scale).

Besides being an elastic interconnection option, the PCSBs are also highly feasible for microwave BGA packaging applications. The PCSBs provide predictable RF characteristics since they maintain their standoff height during the board-level assembly. Moreover, as shown in Paper VIII, the plastic-core material of the solder ball has no degrading impact on the RF properties of the BGA transition. However, thermal management in high-power BGA packaging applications would be slightly degraded due to the fact that the PCSB joint has a lower effective thermal conductivity (about 20 W/mK) [161] than lead-rich 90Pb10Sn solder (36 W/mK) joints [162]. On the other hand, the high power/current handling capability of PCSBs at very low frequencies is expected to be very close to that of 90Pb10Sn solder balls. This assumption has been drawn after calculating the cross-sectional resistances of plastic-core and metal solder ball interconnects at low frequencies [161, 163]. The results show that the thicknesses of the metal layers (solder and copper) of the PCSBs are sufficient to

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give electrical resistance similar to that of the metal solder balls with the same diameter.

4.3 Reliability characterization of the LTCC-BGA test assemblies

4.3.1 Thermal cycling results

The fabricated LTCC test modules with PCSBs and 90Pb10Sn spheres were 15 mm × 15 mm in size. The BGA connections were arranged in a matrix form of 9 × 9 with 1.5 mm pitch and the two outermost BGA rows were daisy-chain interconnected. The test modules were mounted on seven FR-4 boards (total 63 test modules), using standard SMD processes and near eutectic Sn-Pb-Ag solder. The thermal cycling tests were performed in the temperature ranges of 0–100 ºC and −40 to 125 ºC. After testing, the cumulative Weibull failure distribution of each test version was determined. The two-parameter Weibull plots together with the values of the characteristic lifetime (θ) and the Weibull shape factor (βw) are shown in Fig. 24. The acceleration factor for the test modules with PCSBs and those with 90Pb10Sn spheres were 2.9 and 3.4, respectively.

The thermal cycling test results demonstrated that the PCSBs enhanced the board-level reliability of LTCC/PWB module assemblies remarkably when compared to the assemblies with conventional 90Pb10Sn spheres. There was nearly 50% and over 75% increase in the characteristic lifetime values in the 0–100 ºC and −40 to 125 ºC temperature ranges, respectively. The achieved difference in characteristic lifetime results is explained by the fact that the more flexible PCSBs (Young’s modulus 4.7 GPa) [160] reduce the magnitude of maximum thermal stresses in the solder joints when compared to the relatively rigid 90Pb10Sn spheres (Young’s modulus 16 GPa) [162]. The results also prove that the PCSBs maintain their elastic behaviour, whereas strong plastic deformation occurs in 90Pb10Sn joints in the harsh temperature range (Fig. 25). This explains the greater increase in characteristic life-time of PCSB joints over 90Pb10Sn joints under the harsher test conditions. A typical reliability requirement in terms of failure-free time in cycles is between 800 and 1000 cycles in the −40 to 125 ºC temperature range [164]. Similarly, the failure-free requirement is typically 3000 cycles in the 0–100 ºC temperature range [165]. The LTCC modules with PCSBs had failure-free times over 900 and 3000 (Fig. 24) cycles in the −40 to 125 ºC and 0–100 ºC temperature ranges, respectively.

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Therefore, the LTCC-BGA modules with the developed PCSB joint structure are a promising option for various telecommunication applications.

Fig. 24. Cumulative failure distributions for test modules with PCSBs and 90Pb10Sn spheres in the thermal cycling tests. (a) Temperature range 0–100 ºC and (b) −40 to 125 ºC. [Paper VIII]

4.3.2 X-ray, SAM and SEM analyses

Based on the X-ray, SAM and SEM investigations, the primary failure mechanism was concluded to be thermal fatigue cracking near the AgPt metallization/solder interface in all test versions. This is illustrated by SEM photos in Fig. 25. However, if the thermal stresses are smaller in the test joint (i.e. the global thermal mismatch of the test assembly decreases) due to a smaller temperature gradient or an increased flexibility of the test assembly, other crack locations will appear, as shown in Fig. 26. In other reliability studies [132, 160, 163] where PCSBs have been used in ceramic (CTE ≈ 7 ppm/K) module/PWB assemblies, cracks have been propagated through the solder and copper layers in the middle of PCSB joints despite differences in thermal cycling conditions, ball size and ceramic/PWB substrate thickness. Furthermore, it has been reported that the large amount of solder paste in proportion to the volume of the PCSB in the LTCC/PWB assembly has resulted in cracking in the solder area of a joint. This has been explained by the reduced flexibility of the PCSB joint [166].

(b)(a)

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Fig. 25. Characteristic thermal fatigue failures in (a) a test module with PCSBs and (b) a test module with 90Pb10Sn spheres after thermal cycling at −40 to 125 ºC. [Paper VIII]

Fig. 26. Characteristic thermal fatigue failures in a test module with PCSBs after thermal cycling at 0–100 ºC [Paper VIII].

(b)(a)

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5 Development of a reliable LTCC-BGA module platform for RF/microwave applications

Considering the design of a reliable LTCC-BGA module assembly on a PCB, the global thermal expansion mismatch, joint height, sphere material and creep/fatigue resistance of applied solders and the composition of the LTCC solder pad metallization together with the solder pad structure are the main factors that determine the fatigue life of the BGA solder joints under the thermal loading conditions [Paper VIII, 133, 155, 159, 167]. Moreover, the thickness and rigidity of the PCB/module substrates, as well as the size, density and configuration (peripheral, full or partial area-array etc.) of the joint array have an effect on the overall stress levels and distributions in the solder joints, and hence on their long-term reliability [149, 168].

It has been reported that the required transition from the Sn-Pb solder joints to lead-free joints improves the reliability in most packaging applications such as in the widely used quad-flat-package (QFP) and plastic BGA assemblies. However, there are also many reports of cases in which the impact on the reliability has been the opposite. It is noticed that this effect depends on both the thermal-cycling conditions and the package/component types. For instance, very stiff packages/components on a PCB with large global thermal mismatch (e.g. ceramic BGA packages on FR-4) have exhibited poorer reliability for lead-free joints in the harsher thermal cycling conditions. On the other hand, for the same package/component types in the milder thermal cycling conditions, the Pb-free solder joints have been more reliable compared to Sn-Pb solder joints [136, 169–171]. Thus, there is a distinct need to improve the thermal-fatigue endurance of lead-free LTCC-BGA assemblies with large global thermal mismatch in the harsh thermal cycling conditions (e.g. −40 to 125 ºC) since these test conditions are typically used in an accelerated thermal cycling test for various applications [172, 173].

One of the most convenient and effective methods of improving the board-level reliability of the LTCC-BGA module assemblies is to increase the BGA ball size. However, parasitic reactances associated with the large BGA joints can pose a serious limitation on their broadband RF properties if not carefully accounted for in the design stage. Another obvious disadvantage is that the maximum allowable BGA interconnect density reduces as the solder ball size increases. Another feasible method to enhance the reliability of the composite BGA solder joints is to select commercial solder alloys with better creep/fatigue properties. A

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third possible method for obtaining reliability improvement in lead-free LTCC-BGA assemblies is related to the proper selection of the LTCC pad metallization, since it has recently been reported that the inadequate adhesion of the Sn-Ag-Cu (SAC) solder/intermetallic compound (IMC) interface degrades the thermal fatigue endurance of the composite BGA solder joints in LTCC/PCB assemblies under various thermal cycling conditions [171]. Therefore, if this failure mechanism could be prevented by using different solder pad metallization in the LTCC side, it would probably lead to an improvement in the long-term reliability performance.

Fig. 27. Schematic illustration of the developed LTCC-BGA module platform, and its BGA joint distribution with the daisy-chain test pattern. The LTCC substrate is 15 mm × 15 mm × 1.2 mm in size.

Paper IX describes the development of a reliable lead-free LTCC-BGA module platform for use in RF/microwave telecom applications up to the K-band frequencies. The developed BGA module platform, depicted in Fig. 27, includes 38 low-frequency I/Os and two wideband RF I/O paths. A single RF I/O path is composed of cascaded BGA and through-substrate via transition sections. There is also plenty of room to place discrete SMD/bare-die components on the module surface and to integrate passive components inside the 1.2 mm-thick module substrate (potentially up to 30 dielectric layers). Therefore, the module platform can serve as a physical building block for various wireless/mixed-signal SiP products and hence significantly speed up their development time, presuming that adding multiple components and/or a metal lid onto the module surface does not severely affect its board-level reliability performance. In order to fulfil the board-level reliability requirements of the lead-free LTCC-BGA module platform, various material and dimensional changes have been made to the composite PCSB joint structures presented in chapter 4 and in [171]. These changes were

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mainly as follows: 1) applying larger 1100 μm PCSBs, 2) using commercially available lead-free solders which have better endurance against thermal fatigue than the widely used ternary SAC solder, and 3) using different LTCC pad metallizations for finding optimal solder/metallization pairs. Finally, it should be mentioned that the word “lead-free” in this context is only associated with the solder joints. The LTCC material itself (DuPont 951) contains between 2 and 3 mol% of PbO [174]. Currently, this is not forbidden, since ceramic materials are exempted from the RoHS legislation [175]. However, this may change in the near-future. Therefore, the LTCC material vendors have also developed lead-free replacements for their lead-containing tape systems [176, 177].

Fig. 28. Photograph of the fabricated LTCC–BGA module assembly with (a) a shielded and (b) an air-cavity BGA transition structure. [Paper X]

5.1 Broadband BGA-via transition structure

In Paper X, two different types of broadband RF I/O paths for the LTCC-BGA module platform are designed and implemented. One BGA-via transition provides better electromagnetic shielding, while the other exhibits a 40% wider bandwidth by including an air-cavity in the LTCC module. Photographs of the fabricated LTCC module assemblies with the developed broadband BGA-via transitions are shown in Fig. 28. The applied design procedures for the BGA-via transitions are largely similar to those in the earlier Papers IV–VI, which are described in section 3.4.2. In Paper X, the additional reduction of parasitic interconnect reactances in the BGA transition structure was achieved by incorporating an air-cavity into the LTCC module and limiting the solder pad dimensions. The equivalent circuit

(b)(a)

© [2008] IEEE © [2008] IEEE

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modelling procedure used for the entire BGA-via transition path is presented in the previous section, 3.5.

Fig. 29 shows the circuit modelled and EM-simulated S-parameter magnitude data for the BGA-via transitions. The circuit modellings match closely with the EM-simulations. The modelled S-parameter phases, especially the |S21| phases, also correlated well up to the 1-dB cutoff frequencies. The modelling results verify that the cutoff frequency of both the BGA-via transitions is determined by the interconnect reactances associated with the BGA transitions. In other words, the BGA transitions start to act as inductive chokes near the cutoff frequencies.

The measured S-parameters of the fabricated BGA-via transitions are also presented in Fig. 29. The measurements correlate well with the EM-simulation and modelling results. The results also prove that the use of the air-cavity raises the 1-dB cutoff frequency by 40% from 19 to 27 GHz. Moreover, the open circuit isolation between two opposite transition structures with a gap of 3.4 mm (see Fig. 28) was measured. This evaluates the input/output port isolation of the package when use of an IC die with a size of 3 mm is considered. The isolation characteristics in the shielded and air-cavity cases were better than 38 dB and 25 dB, respectively, up to their 1-dB cutoff frequencies. In order to investigate the repeatability, ten different BGA-via transition structures incorporating the air-cavity were measured. The measured insertion loss values for these transitions are shown in Fig. 30. The measured average insertion loss at 25 GHz is 0.75 dB and its standard deviation is as low as 0.033.

Fig. 29. Measured, EM-simulated and circuit modelled results (|S11|, |S21|) of the BGA-via transitions with (a) a shielded and (b) an air-cavity BGA structure. [Paper X]

© [2008] IEEE © [2008] IEEE (b)(a)

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Fig. 30. Measured insertion loss values of ten different samples for the air-cavity BGA-via transition structure.

5.2 Thermal cycling results

In order to find a lead-free composite BGA joint configuration with adequate thermal fatigue endurance in harsh environments, several different types of LTCC test modules were fabricated and mounted on 1.6 mm-thick hybrid PCBs (FR-4/Rogers 4003) for thermal cycling testing in the temperature range of -40 to +125 ºC. The BGA joint materials on the LTCC side of the joint were varied with solder composition and pad metallization. The solder and pad materials on the PCB side of the joint were Sn4Ag0.5Cu and copper with organic solderability preservative (OSP) finish, respectively, in all test cases. Tested lead-free solders with their compositions in parentheses were Koki’s S3XNI (Sn3Ag0.5Cu0.5In0.05Ni) and Singapore Asahi’s Viromet 347 (Sn4.1Ag0.5Cu7In). Both of them have exhibited better thermal fatigue properties than SAC solder [178–180]. The selected LTCC pad metallizations for the test were solderable Ag, AgPt and electroless Ni/Au plated Ag pads. Moreover, in order to evaluate the effect of the air-cavity on the reliability, most of the test cases were varied with and without the air-cavities.

For reliability testing, all the low-frequency BGA joints were interconnected with a daisy-chain test pattern, as illustrated in Fig. 27. The complete test matrix of different module types together with their thermal cycling results (failure free-time) are presented in Table 2. The total number of the fabricated test modules was 56, comprising 8 modules for each of the seven module types. The thermal cycling results showed that the modules with Ag/Pt and Ni/Au metallizations (total of 40 modules) had a failure free-time value over 1000, which can be

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considered adequate for telecommunication applications [164, 172, 173]. Moreover, the results implied that the effect of the air-cavity on the reliability is not significant because the failure free-time values were not congruent with all the test cases.

Table 2. Failure free-time values of the test assemblies in the thermal cycling test at temperature range of −40ºC–125ºC.

Module type (solder / pad metallization) Air-cavity included

(Y/N)

Failure free-time

(cycles)

Reference

Koki S3XNI / Ag Y 922 [Paper IX]

Koki S3XNI / Ag N 1241 [Paper IX]

Koki S3XNI / AgPt N 1236 [181]

Viromet 347 / AgPt Y 1474 [181] Viromet 347 / AgPt N 1015 [181] Viromet 347 / Ni/Au plated Ag Y 1137 [181] Viromet 347 / Ni/Au plated Ag N 1248 [181]

Preliminary SAM results of the test modules with Ag metallization and Koki S3XNI solder paste indicated that the ceramic cracking was not of concern and two separate joint cracks were formed at the interface of the composite solder joints and the LTCC substrate [Paper IX]. The crack that propagated from the inner edge to the centre of a joint seemed to be the dominant one and was related to the failure induced at the high temperature extreme (125 ºC). In fact, such failure strongly resembles that caused by the inadequate adhesion at the IMC/solder interface [171]. Hence, the SAM results suggested that the Ag metallization and Koki S3XNI solder material cannot prevent the formation of that undesired failure mode. To fully characterize the failure mechanisms and the lifetime distributions of all of the test assemblies, a detailed metallurgical and Weibull failure analyses will be made after finishing the thermal cycling tests and reported in [181].

In order also to investigate the effect of thermal cycling on the performance of the broadband RF transition structure, 20 different BGA-via transitions were measured at 250, 500, 1000 and 1400 cycles at room temperature [Paper IX]. All the measured RF transitions worked properly up to 1000 cycles, showing no clear indication of performance degradation. However, the measurements at 1400 cycles exhibited a strong detrimental resonance at ~3 GHz. This phenomenon was consistent with several RF transition structures (9/20). To illustrate this resonance behaviour, measured S-parameter results of the thermally cycled RF transition

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structure at 0, 1000 and 1400 cycles are presented in Fig. 31. The S-parameter results at 250 and 500 cycles were omitted from the figure for the sake of clarity, since the results varied very little up to 1000 cycles. As shown from the figure, the measurement exhibited a strong detrimental resonance, which occurred between 1000 and 1400 cycles. According to the EM simulations (shown in Paper IX) the observed resonance was caused by an open failure in the RF ground joint(s).

Fig. 31. Measured S-parameters of the BGA-via transition structure after 0, 1000 and 1400 cycles [Paper IX].

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6 Conclusions

The main purpose of this thesis was two-fold; to develop and model wideband vertical transition structures (BGA, FC and substrate via) for use in the deployment of surface-mountable RF/mm-wave LTCC-SiP modules and simultaneously to address and improve thermal fatigue life of board-level solder joints in LTCC/PCB assemblies. An additional aim was to design the transition structures to be compatible with each other, providing RF designer tools to build various types of vertical transition paths in multilayer FC-BGA packages. The last objective of the thesis was to combine the obtained results to implement a reliable lead-free LTCC-BGA module platform applicable in a wide variety of wireless/mixed-signal SiP products.

In the course of this thesis work several high-performance LTCC package transitions were implemented through careful design and optimization, necessitating not only tight impedance and mode-field control along the signal path but also efficient suppression of parasitic mode excitations. All of the developed transitions offered significant performance enhancements in terms of wider bandwidth and better loss characteristics compared with similar types of transitions existing in the literature. The implemented FC transition structure exhibited the lowest reported loss-value (~0.05 dB @ 50 GHz) to date for such large FC bumps. This strongly suggests that low-cost solder bumping and assembly processes could enable profitable mm-wave FC implementation for cost-sensitive and high-volume applications. Similarly, the different designed types of via transitions showed superior signal transmission properties over previously reported designs. The extracted insertion loss values of the shielded via transitions were less than ~ 0.4 dB up to 50 GHz. Moreover, the full-wave EM simulations demonstrated that the applicable frequency range of the shielded via transitions can be widened even up to 70 GHz, thereby covering numerous commercially viable frequency bands. The broadband BGA package transitions provided an in-depth analysis and state-of-the-art performance results, as well as gave a new valuable insight into how the solder sphere size affects the transition’s RF characteristics. All of them exhibited low-loss operation (< ~1 dB) at least up to the mm-wave frequency region, while the BGA transition with the smallest sphere size used (300 μm) indicated a high potential even for 60 GHz packaging applications.

The vertical transition structures were designed to be compatible with each other, allowing the building of a variety of different transition path configurations

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in a multilayer BGA package. In order to facilitate their adoption in application-specific BGA packages without constraints on layer stack-up, material system or manufacturing technology (i.e. MCM-C/L/D), the transition structures were geometrically parameterized in an EM-based simulation environment. In addition, to allow an accurate simulation of the transitions’ effects in the time domain and to gain a better physical understanding of their electrical behaviour, equivalent lumped circuit models accounting also for frequency-dependent loss effects were developed for the transition structures. The measured results of the transitions correlated well with the circuit modellings up to their cut-off frequencies, verifying that their upper frequency limit is determined by the interconnect reactances (i.e. capacitances and inductances) and not by parasitic effects such as, for example, spurious package resonances, multimode propagation in a guiding wave structure or excessive radiation into substrate/free-space waves. Lastly, to demonstrate the feasibility of the developed wideband transitions, a high-performance LTCC-BGA filter package was implemented for the K-band radio link frequencies.

To address the reliability of the board-level solder joints in LTCC/PCB assemblies, a thermo-mechanically enhanced BGA joint structure was developed. The composite BGA solder joint structure considerably improved thermal fatigue life and narrowed failure distribution in various thermal cycling conditions, indicating adequate board-level reliability for many practical LTCC-BGA packaging applications. This was accomplished by using the more elastic PCSBs instead of metal solder balls and by applying AgPt-metallized pads with an overlapping glass solder mask on the LTCC side. Moreover, the performed electromagnetic analysis showed that the use of the PCSB has no degrading impact on the RF performance of the solder joint.

Finally, based on the achieved results a reliable lead-free LTCC-BGA module platform was developed for broadband packaging applications. The BGA module platform with a size of 15 mm × 15 mm included 38 low-frequency and two wideband RF input/output connections up to the K-band frequencies. The module structure also allowed plenty of space to mount discrete SMD/bare-die components on the surface and/or to embed passive components in the 1.2 mm thick substrate. The presented thermal cycling results of the BGA module assemblies demonstrated a sufficient reliability level for telecommunication applications regardless of the existing large global thermal mismatch between the applied substrate materials. This was realized by using PCSBs as large as 1100 μm and finding an optimal solder/pad metallization pair on the LTCC side of

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the joint. The broadband RF measurements of the thermally cycled test assemblies showed no degradation in the electrical performance of the module RF connections before 1000 cycles in the temperature range of −40 ºC to +125 ºC. Therefore, the presented module platform can serve as a physical building block for various wireless/mixed-signal SiP products, and hence significantly reduce their development time and associated costs.

Further work is needed to fully qualify the presented RF transitions designs for commercial high-volume module production. One possible way to accomplish the electrical performance validation is to perform a comprehensive sensitivity analysis of the effects of manufacturing tolerances on the transitions’ RF properties. Similarly, the reliability verification should be conducted with the BGA assemblies fabricated in a real production environment and with a greater sample size.

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181. Nousiainen O, Kangasvieri T & Vähäkangas J Reliability study of a LTCC module platform with lead-free BGA composite joints for RF/microwave telecommunication applications. To be submitted to the Microelectronics Reliability in 2008.

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Original papers

I Jantunen H, Kangasvieri T, Vähäkangas J & Leppävuori S (2003) Design aspects of microwave components with LTCC technique, Journal of European Ceramic Society 23: 2541–2548.

II Kangasvieri T, Komulainen M, Jantunen H & Vähäkangas J (2008) Low-loss and wideband package transitions for microwave and millimeter-wave MCMs. IEEE Transactions on Advanced Packaging 31: 170–181.

III Kangasvieri T, Halme J, Vähäkangas J, & Lahti M (2006) Ultra-wideband shielded vertical via transitions from DC up to the V-band. In: Proceedings of 1st IEEE European Microwave Integrated Circuits Conference (EuMiC), Manchester, UK, 10–15 September: 476–479.

IV Kangasvieri T, Halme J, Vähäkangas J & Lahti M (2007) An ultra-wideband BGA-via transition for high-speed digital and millimeter-wave packaging applications. In: Proceedings of the IEEE MTT-S International Microwave Symposium, Honolulu, HI, USA, 3–8 June: 1637–1640.

V Kangasvieri T, Halme J, Vähäkangas J & Lahti M (2007) High-performance vertical transition for broadband and millimeter-wave BGA module packaging. IEE Electronics Letters 43: 638–639.

VI Kangasvieri T, Halme J, Vähäkangas J & Lahti M (2008) Low-Loss and broadband BGA Package Transition for LTCC-SiP applications. Microwave and Optical Technology Letters 50: 1036–1040.

VII Kangasvieri T, Piatnitsa V, Jantunen H, Vähäkangas J & Lahti M (2007) A Low-Loss Surface-Mountable LTCC-BGA Filter Package for K-band Radio Link Applications. In: Proceedings of the 11th International Symposium on Microwave and Optical Technology, Rome, Italy, 17–21 December, 505–508.

VIII Kangasvieri T, Nousiainen O, Putaala J, Rautioaho R & Vähäkangas J (2006) Reliability and RF performance of BGA solder joints with plastic-core solder balls in LTCC/PWB assemblies. Microelectronics Reliability 46: 1335–1347.

IX Kangasvieri T, Nousiainen O, Vähäkangas J, Kautio K & Lahti M (2007) Development of a reliable LTCC-BGA module platform for RF/microwave telecommunication applications. In: Proceedings of the 16th IMAPS European Microelectronics and Packaging Conference (EMPC), Oulu, Finland, 17.–20. June: 703–708.

X Kangasvieri T, Halme J, Vähäkangas J & Lahti M (2008) Broadband BGA-via transitions for reliable RF/microwave LTCC-SiP module packaging. IEEE Microwave and Wireless Components Letters 18: 34–36.

Published papers have been reprinted with permission from Elsevier B.V. (I, VIII), IEEE (II–V, X), John Wiley & Sons, Inc. (VI), IJMOT/ISRAMT (VII), and IMAPS EMPC (IX).

Original publications are not included in the electronic version of the dissertation.

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