system on package(sop) for wireless communication 임근원 2005. 06. 16

System On Package(SOP) for Wireless Communication

임근원2005. 06. 16

2Lim Geun Won, June 16, 2005Seoul National University

Contents

Packaging System Shortcoming of SOC for RF, Digital, Optical Integration Advantage of SOP SOP for Wireless Communication RF SOP - Embedded Passives ( Inductor, Capacitor, Filter, Antenna) - Integrated RF module Digital SOP Optoelectronics SOP SOP Status of SOP Vision of SOP SOP R&D


Package system

System-on-chip (SOC)

Multichip module (MCM)

System-in-package (SIP)

System-on-package (SOP)


Shortcoming of SOC for RF,Digital,Optical Integration

the difficulty of composing the specification of a mixed digital-analog-RF system the lack of architectural templates and experience in heterogeneous SOC implementation the lack of design and test methodologies and tools for partitioning, floor planning, placement, routing high cost for large ICs due to the high cost of wafer fabrication and low yield at less than 0.1 um technologies long design and test cycles in the face of system-level requirements wiring delay in SOC damage for computing application intellectual property issues


Advantage of SOP

Wiring delay, “latency”, can be avoided by either moving wiring from nanoscale on Ics to the microscale on SOP or making the digital chips smaller

RF components are best fabricated in the package rather than on silicon The highest Q factors reported on silicon are about 10-25, in contrast to

100-400 achieved in the SOP package Optoelectronics is moving onto the package for high I/O and high-speed interconnections, r

eplacing copper and addressing both the resistance and cross-talk of electronics ICs design time shorter, flexibility to use emerging technology smaller chip with high yield and wiring length


SOP for wireless communications

: cross section of SOP substrate illustrating diverse technology function : wireless communication system in SOP technology


RF-System-On-Package

RF-SOP :complete packaging solution for RF module by integrating embedded passives components and MMIC at the package level passives components (filter, antenna, and external high-Q passive element for block such as PA and VCO) +MMIC chipset (PA, low-noise amplifier(LNA), up-and-down mixer(MIX), VCO)

: Components fabricated on SOP


RF-System-On-Package

Progress in lines and spaces, and microvias on SOP substrate - 5 and 10 um wide lines, 10 um spaces, 4 um copper thickness - fabrication planar multilayer wiring with stacked microvias


Embedded Passives

Multilayer Inductor

(a) Planar spiral (b) offset 3D (c) helical inductors

: effective inductance of the planar and 3D inductors : Q of the planar and 3D inductor


Embedded Passives

Multilayer Capacitors

:The conventional MIM structure consists of a dielectric layer sandwitched between two

square plates neglecting the higher order excitation mode.

However, the vertically interdigitated configuration (VIC) makes the

plate size smaller as more plates are deployed on a larger number of dielectric layers

VIC topology occupies nearly an order of magnitude less area than the MIM

:Three-dimensional views of MIM and VIC configuration


Embedded Passives

Multilayer filter

Integrated Antenna

filter 와 connection

:3D layer by layer view of multilayer filter structure

:3D integrated module with CBPA and embedded filter

:configuration of CBPA


Integrated RF-SOP Modules

Ku-Band Transmitter Module - the balanced stripline topology where coupled line segments are sandwiched by two ground planed at an equal distance of 17.6 mil(4 LTCC tape layers) - the compact module by embedding the filter saves more than 40% area compared to the module on a typical alumina substrate

• total gain : 41 dB

• out power : 26 dBm

• LTCC module(integration of BPF)

- insertion loss:

1.8 dB at 14.5 GHz

:Configuration and picture of compact Ku-band transceiver module


Integrated RF-SOP Modules

Integrated Power Amplifier Module - a two-stage 1.9 GHz PA with second harmonic tuning circuits using Si M-MOSFET

(a) the 1.9 GHz power amplifier module with fully on-package passives (b) die photo

• N-MOSFET : 0.8 um BiCMOS on the LTCC board

• MIM capacitor : matching components

• RF ground capacitor : VIC topology (requirement

for large capacitance value for 1.9 GHz)

• Second Harmonic tuning circuit:

series inductive-capacitance resonator at 3.8 GHz

• 48% PAE

• out power : 26 dBm

• power gain at 1.9 GHz with 3.3 drain supply voltage

: 17 dB


Integrated RF-SOP Modules Performance comparison of the 1.9 GHz power amplifier

On-package components

achieve superior Q performance


Digital SOP

Digital SOP - 60 um gap between the power and ground planes low impedance path for the power distribution - dielectric material : epoxy with copper matallization - split power islands to isolate the trans. and receiver FPGA’s from transceiver chip - embedded decoupling layer : low impedance path for decouple capacitor - 2.48 Gb/s differential serial channal

: Layout and cross section of digital block


Optoelectronics SOP

Optoelectronics SOP - the heterogeneous integration of optically active devices (laser, detector array, laser amplifier) and passives(waveguides, gratings, beam splitter)

a) waveguide array embedded in FR-4 board

b) embedded p-i-n detector

c) polymer microlens

d) embedded i-MSM

e) beam splitter

f) curved waveguide array

g) blazed polymer grating, blaze angle 29°

: optoelectronics SOP concept and design


System-On-Package(SOP) SOP concept for system integration of thin film components


Status of SOP

problem of SOP technology - interference between each of the block in a package :EMI/EMC - on-/off-chip power management :power supply stability, thermal problem according to power - how to test - design infrastructure :the lack of design concept to on-/off- chip packaged environment and design tool

application example - 803.11b IFE module ( Agere Co.) - CIS/CCD camera module - 15 AQ DC/DC point of load converter ( Power One Co.)


Vision of SOP

SOP: Moore’s Law for ICs

SOP for system integration as IC for transistors

SOP is a system level technology


Global SOP R&D


Summary

SOP requires system design and architecture leading to IC-package-system codesign and addressing signal and power integrity, EMI, and wiring layout

In future, business and legal barriers are significantly more difficult to overcome for the SOC than for SOP based product

SOP is system level technology with all the system functions and interconnections and takes advantage of the synergy between IC, package, and the system


Reference• R. Tummala and V. Madisetti, “System on chip or system on package,” IEEE Des. Test Comp., vol. 1

6, pp. 48-56, Apr.-June 1999.

• R. Tummala “SOP;What Is It and Why? A New Microsystem-Integration Technology Paradigm-Moor’s Law for System Integration of Miniaturized Convergent System of the Next Decade”

• Tummala, R.R.; Swaminathan, M.; Tentzeris, M.M.; Laskar, J.; Gee-Kung Chang; Sitaraman, S.; Keezer, D.; Guidotti, D.; Zhaoran Huang; Kyutae Lim; Lixi Wan; Advanced Packaging, IEEE Transactions on “The SOP for Miniaturized, Mixed-Signal Computing, Communication, and Consumer Systems of the Next Decade” Volume 27, Issue 2, May 2004 Page(s):250 - 267

• Kyutae Lim; Pinel, S.; Davis, M.; Sutono, A.; Chang-Ho Lee; Deukhyoun Heo; Obatoynbo, A.; Laskar, J.; Tantzeris, E.M.; Tummala, R.”RF-System-On-Package(SOP) for Wireless Communications”, Volume 3, Issue 1, March 2002 Page(s):88 - 99

• Pinel, S.; Lim, K.; DeJean, R.G.; Li, L.; Lee, C.-H.; Maeng, M.; Davis, M.F.; Tentzeris, M.; Laskar, J.; Microwave Conference, 2003. 33rd European, “System-On-Package (SOP) architectures for compact and low cost RF front-end module,” Volume 1, 7-9 Oct. 2003 Page(s):307 - 310 Vol.1,

system on package(sop) for wireless communication 임근원 2005. 06. 16

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