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The State-of-the-Art Test Compression and Test Compression and Test Response Compaction Techniques
2008.11.152008 테스트 기술 워크샵
Hong-Sik KimHong-Sik Kim
Contents
IntroductionTest Stimulus CompressionTest Response CompactionIndustrial PracticeConclusion
Computer Systems & Reliable SoC Lab. 2
Test Data Increase
Increase in the number of test patternsIncreasing number of embedded IP cores
Increasing number of target fault models for DSM t h l itechnologies
Transition fault testing requires 3~5 times more test patterns than stuck at fault testing
Newer chips with more pins and functionality but older ATE equipmentfunctionality but older ATE equipment
Less test channels
Not enough ATE memoryNot enough ATE memory
Low-cost ATE : reduced pin count test
Keep do n test cost
Computer Systems & Reliable SoC Lab. 3
Keep down test cost
Test Data Volume vs Technology Introduction
TTest Dataa Size
Gate Size
Computer Systems & Reliable SoC Lab. 4
Source : Blyler, Wireless System Design, 2001
Test Quality Improvement for Nano Technology IntroductionNano Technology
Multiple detectShown to improve test quality in 200K production run experiment
DFM-oriented testExtractions from physical p ydatabase (such as Calibre)For example, deterministic bridge fault modelfault model
Timing aware testTiming aware testUse SDF to test longest paths
Computer Systems & Reliable SoC Lab. 5
Test Data Volume vs Technology Introduction
TTest Dataa Size
Technology
Source : www.elecdesign.com
Computer Systems & Reliable SoC Lab. 6
Why Test Compression? Introduction
TestTestQuality
Requirement
180nm 130nm 90nm
Computer Systems & Reliable SoC Lab. 7
Full Scan VS Compressed Scan Introduction
Computer Systems & Reliable SoC Lab. 8
Test Data Compression Introduction
AdvantageComplete set of ATPG test Complete set of ATPG test patterns can be appliedCompatible with the
ti l d i l d convectional design rules and test generation flow for scan testing
fiBenefitsReduce amount of test data
Life cycle of older tester with ylimited memory is extended
Test time reduces for a given test data bandwidth
With test compression, larger number of scan chains can be used
Computer Systems & Reliable SoC Lab. 9
Test Data Compression Introduction
Test (Stimulus) CompressionCode-based compressionCode based compressionLinear-decompression based schemeBroadcast scan
Test Response CompactionSpace compactionTime compactionMixed one
Computer Systems & Reliable SoC Lab. 10
Introduction
Test Stimulus CompressionTest Response CompactionIndustrial PracticeConclusion
Computer Systems & Reliable SoC Lab. 11
Categories of TC Test StimulusCompression
Code-based SchemesTraditional coding algorithm
Compression
Traditional coding algorithmEntropy coding
Linear-Decompression-based SchemesLinear-Decompression-based SchemesCombinational
XOR networksSequential (Static/Dynamic)Sequential (Static/Dynamic)
LFSR reseeding
Broadcast Scan Based SchemesBroadcast-Scan-Based SchemesTraditional
Scan forest/Illinois scanR fi blReconfigurable
Static/Dynamic
Computer Systems & Reliable SoC Lab. 12
Code-Based TC Test StimulusCompression
Dictionary coding
Compression
fixed to fixed
Huffman codingfi d t i blfixed to variable
Run-length codingvariable to fixedvariable to fixed
Golomb codingvariable to variablevariable to variable
Arithmetic codingfixed to variableed o a ab e
Computer Systems & Reliable SoC Lab. 13
Test StimulusCompression
Code-Based TC
Run-length coding based test compression
Compression
A.Jas et al, “Test Vector Decompression via Cyclic Scan Chains and its application to Testing Core-Based Designs,” ITC, 1998g , ,
Computer Systems & Reliable SoC Lab. 14
Test StimulusCompression
Code-Based TC
Golomb coding based test compression
Compression
A.Chandra et al, “System-on-a-Chip Test-Data Compression and Decompression Architecture Based on Golomb Codes,” IEEE Trans. on CAD, 2001, ,
Computer Systems & Reliable SoC Lab. 15
Test StimulusCompression
Code-Based TC
Dictionary coding
Compression
S.M.Reddy et al, “On Test Data Volume Reduction for Multiple Scan Chain Designs,” VTS 2002
Computer Systems & Reliable SoC Lab. 16
Test StimulusCompression
Code-Based TC
Selective HC based test compression
Compression
A.Jas et al, “An Efficient Test Vector Compression Scheme Using Selective Huffman Coding,” IEEE Trans. on CAD, 2003,
Computer Systems & Reliable SoC Lab. 17
Test StimulusCompression
Linear Decompression Based Scheme
Compress test data by using linear equation d l
CompressionScheme
and solver
Cl ifi iClassificationCombinational linear de-compressorSequential linear de compressorSequential linear de-compressor
Fixed lengthVariable length
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Test StimulusCompression
Linear Decompression Based Scheme
Compress test data by using linear equation d l
CompressionScheme
and solver
Computer Systems & Reliable SoC Lab. 19
Test StimulusCompression
Linear Decompression Based Scheme
Compress test data by using linear equation d l
CompressionScheme
and solver
Computer Systems & Reliable SoC Lab. 20
Test StimulusCompression
Linear Decompression Based Scheme
Compress test data by using linear equation d l
CompressionScheme
and solver
X1 X2 X3 X4 X5 X6 X7 X8 X9 X100 0
1 01 0
01
0111
110 1 1 1 0 0 0 x x 1
Computer Systems & Reliable SoC Lab. 21
Test StimulusCompression
Linear Decompression Based Scheme
Combinational Linear DecompressionI.Bayraktaroglu et al, “Concurrent Application of Compaction and
CompressionScheme
y g , pp pCompression for Test Time and Data Volume Reduction in Scan Design,” IEEE Trans on Computers, 2003
Computer Systems & Reliable SoC Lab. 22
Test StimulusCompression
Linear Decompression Based Scheme
LFSR Reseeding SchemeB Koenemann “LFSR-coded Test Patterns for Scan
CompressionScheme
B.Koenemann, LFSR coded Test Patterns for Scan Designs,” ETC, 1991
00xxx0xx0111
C1
C2
Test Cubes
+
a2 a1 a0 c5 c4 c3 c2 c1 c0
x1x0x100xxx0
C0
C1
a0a1a2a0+a2a0+a1 +a2
a0+a1
a1=1a0=0a0+a2=0a0+a1 =1
A system of linear equations
a1=1a2=0
Seed for C0
Computer Systems & Reliable SoC Lab. 23
Test StimulusCompression
Linear Decompression Based Scheme
Ring GeneratorG Mrugalski et al “Ring Generators-New Devices for
CompressionScheme
G. Mrugalski et al, Ring Generators New Devices for Embedded Test Applications,” IEEE Trans. on CAD, 2004
Computer Systems & Reliable SoC Lab. 24
Test StimulusCompression
Linear Decompression Based Scheme
Variable rank LFSR with BFHong-Sik Kim et al, “Increasing Encoding Efficiency of LFSR
CompressionScheme
g , g g yReseeding-based Test Compression,” IEEE Trans. on CAD, 2006
Computer Systems & Reliable SoC Lab. 25
Test StimulusCompression
Broadcasting
Concept
Compression
Input the same test data to multiple scan chains
V i TC S h b d B dVarious TC Schemes based BroadcastILLINOIS scanScan forestScan forestMulticast based TC
Computer Systems & Reliable SoC Lab. 26
Test StimulusCompression
Broadcasting
Concept
Compression
Input the same test data to multiple scan chains
Force ATPG tool to generatepatterns for broadcast scan
Computer Systems & Reliable SoC Lab. 27
Test StimulusCompression
Broadcasting
ISA (Illinois scan architecture)
Compression
I.Hamzaoglu et al, “Reducing Test Application Time for Full Scan Embedded Cores,” FTCS, 1999
Computer Systems & Reliable SoC Lab. 28
Test StimulusCompression
Broadcasting
Scan forestD Xiang et al “Reconfigured Scan Forest for Test Application
Compression
D.Xiang et al, Reconfigured Scan Forest for Test Application Cost, Test Data Volume and Test Power Reduction,” IEEE Trans. on Computers, 2007
Scan forest is constructed based on structural analysisReduced number of scan l f d th leaf decreases the number of XOR gate in response compactorReduce both test data Reduce both test data volume and power consumption
Computer Systems & Reliable SoC Lab. 29
Test StimulusCompression
Broadcasting
Multicast based TCD Xiang et al “Reconfigured Scan Forest for Test Application
Compression
D.Xiang et al, Reconfigured Scan Forest for Test Application Cost, Test Data Volume and Test Power Reduction,” IEEE Trans. on Computers, 2007
Computer Systems & Reliable SoC Lab. 30
Contents
IntroductionTest Stimulus Compression
Test Response CompactionIndustrial PracticeConclusion
Computer Systems & Reliable SoC Lab. 31
Categories of TC Test ResponseCompression
Space compactionReducing the number of output bit size
Compression
Reducing the number of output bit size
Time compactionReducing the number of output response patternsReducing the number of output response patterns
Mixed space and time compaction
Computer Systems & Reliable SoC Lab. 32
Categories of TC Test ResponseCompression
Space compactionReducing the number of output bit size
Compression
Reducing the number of output bit size
Time compactionReducing the number of output response patternsReducing the number of output response patterns
Mixed space and time compaction
Computer Systems & Reliable SoC Lab. 33
Response Compaction Issues Test ResponseCompression
Aliasing problem
Compression
X propagationManay sources of unknown X’s in output response data
Unmodeled ATPG logics : RAM’s mixed signal logic black boxes Unmodeled ATPG logics : RAM s, mixed signal logic, black boxes etcUninitialized memory elements (non scaned FF’s)Floating tri-statesgMulti-cycle pathsEtc
Computer Systems & Reliable SoC Lab. 34
X propagation Problem Test ResponseCompression
Conventional ScanEasy to handle X values in test response by masking them on
Compression
y p y gtester
Logic BIST and test response compactionLogic BIST and test response compactionX’s corrupt final signaturePrevents observation of other scan cellsOutput compression ratios and ATPG results are degreated by Output compression ratios and ATPG results are degreated by the capture of unknown value
1 1 0 0 1 X 1 0MI0 1 1 0 X 1 0 0
0 1 1 1 0 0 0 X
ISR
Computer Systems & Reliable SoC Lab. 35
0 1 1 1 0 0 0 X
Handling X’s Test ResponseCompression
X-Bounding (X-blocking)Insert DFT to prevent X’s from propagating to output
Compression
p p p g g p
X-tolerant compactorMake compactor resilient to one or several X’s propagated to Make compactor resilient to one or several X s propagated to the compactor
X MaskingX-MaskingMask X’s at the input to compactorMask data required
Computer Systems & Reliable SoC Lab. 36
X-Tolerant TRC Test ResponseCompression
X-CompactS.Mitra et al, “X-Compact: An Efficient Response Compaction Technique ” IEEE Trans on CAD 2004
Compression
Technique, IEEE Trans. on CAD, 2004
C bi ti l tCombinational compactorTolerates one X per scan sliceDetects 1 2 or any odd errors
Computer Systems & Reliable SoC Lab. 37
Detects 1, 2, or any odd errorsCorrupted outputs will be masked on tester
X-Tolerant TRC Test ResponseCompression
X-CancelingN.A.Touba,”X-canceling MISR – New Approach for X-Tolerant Output Compaction ” ITC 2007
Compression
Output Compaction, ITC, 2007
Computer Systems & Reliable SoC Lab. 38
X-Masking TRC Test ResponseCompression
X-MaskingX’s can be masked off right before the
Compression
X s can be masked off right before the response compactorMask data is required to indicate when the Mask data is required to indicate when the masking should take placeMask data can be compressedMask data can be compressed
LFSR reseeding, run-length coding
Computer Systems & Reliable SoC Lab. 39
X-Masking TRC Test ResponseCompression
Masking compression based on HCG.Zeng et al, “X-tolerant test data compression for SOC
Compression
g , pwith Enhanced Diagnosis Capability,” IEICE IS, 2005
Computer Systems & Reliable SoC Lab. 40
X-Masking TRC Test ResponseCompression
X-BlockS.Wang et al, “X-Block: An Efficient LFSR Reseeding-
Compression
g , gbased Method to Block Unknowns for Temporal Compactors,” IEEE Trans on Computers, 2008
Computer Systems & Reliable SoC Lab. 41
Contents
IntroductionTest Stimulus CompressionTest Response Compaction
Industrial PracticeConclusion
Computer Systems & Reliable SoC Lab. 42
Mentor Graphics IndustrialPractice
Embedded Deterministic Test (EDT)
Practice
TestKompressFirst commercially available on-chip test compression productproduct
Computer Systems & Reliable SoC Lab. 43
SynTest IndustrialPractice
Virtual scanTestKompress
Practice
TestKompressFirst commercial product based on the broadcast scan scheme using combinational logic for pattern decompression
Computer Systems & Reliable SoC Lab. 44
Synopsys IndustrialPractice
Adaptive scan
Practice
DFTMAX
Computer Systems & Reliable SoC Lab. 45
Summary of Commercial Solutions
IndustrialPracticeSolutions Practice
Industrial Practice Stimulus Compression
Response Compression
EDT (Mentor) Ring generator XOR tree
Virtual Scan Combinational logic Virtual Scan (Syntest)
Combinational logic network (broadcast) XOR tree
Combinational MUX DFTMAX (Synopsys) Combinational MUX network (broadcast) XOR tree
Computer Systems & Reliable SoC Lab. 46
Conclusion
Test CompressionEffective method to reduce test data volume and test application time
Good solution for test cost reduction
Easy to implement and capable of producing high-lit t tquality tests
Part of design flow
Computer Systems & Reliable SoC Lab. 47