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XMOS—Unified Design for Hardware and Software Version 1.0 Publication Date: 2010/07/07 Copyright © 2010 XMOS Ltd. All Rights Reserved.

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Page 1: Unified Design for Hardware and Software

XMOS—Unified Design for Hardware and Software

Version 1.0

Publication Date: 2010/07/07

Copyright © 2010 XMOS Ltd. All Rights Reserved.

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1 Introduction

XMOS programmable chips bring together the capabilities of processors, DSPs andFPGAs. The XMOS XCore®processor is specifically designed for implementing hard-ware functions in software alongside general purpose processing and DSP functions.It is also designed to be entirely programmed using a high-level language.

The event-driven XCore processor runs multiple real-time tasks simultaneously us-ing hardware threads. Each thread executes RISC-style instructions and shares ac-cess to memory. Threads can run standard computational code, DSP code andcontrol software (taking logic decisions, or executing a state machine). Threads canalso use tightly coupled ports to control I/O pins with precision timing and interactwith each other using hardware communication channels.

Threads have fully deterministic behavior, with a guaranteed share of the processingpower and memory bandwidth, and guaranteed response times to external events.

Task A

Task B Execute Task B Task B paused Execute Task B

Task C

Tim

er T

imer

Execute Task B

Task C paused Execute Execute Execute Execute

A B C

PORT

Port

Task A running

Output Output Output Output

Event Event

Channel Output

Channel Output

Channel Output

Channel Output

Figure 1: Task execution on an XCore

The key to designing both hardware and software in a unified high-level abstractionis the XC programming language. XC is based on the widely used C language, withextensions to support concurrency, events, I/O, precision timing and communica-tion.

www.xmos.com

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The XMOS tools also provide a unified design environment for creating completehardware/software solutions. Based on the industry-standard Eclipse software de-velopment platform, the tools have been extended with support for implementinghardware interfaces. The tool set includes compilers, simulator, waveform viewer,debugger, timing analyzer and board manufacturing utilities. They are equally avail-able as command-line tools, ensuring they can be integrated into existing designflows.

Figure 2: The XMOS IDE

www.xmos.com

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2 Designing hardware in software

The XMOS solution dramatically increases productivity by providing a unified designflow for the creation of hardware and software, all written in a high-level language.

The XMOS tools support C and C++ alongside XC, ensuring existing source canbe easily integrated. A common high-level language approach makes it a simplerand more intuitive process to develop and integrate the hardware and softwarecomponents of an application.

2.1 XCore/XC features

There are many features of the XCore processor that enable the creation of hardwareinterfaces in high-level languages. Each feature is supported in the XC language.

XCores support concurrency through hardware threads, providing the ability tosimultaneously perform multiple tasks. XC adds the par keyword to support con-currency - the statements within a par are run on separate hardware threads, eachwith guaranteed performance and deterministic timing.

int main(void) {par {

taskA();taskB();

}return 0;

}

Controlling I/O pins of a device is done through the hardware ports which aretightly coupled to the processor. XC uses the port type to instantiate a port, andthe in (:>) and out (<:) operators to read and drive pin values.

The precise timing of port operations, with a resolution of 10ns, is available throughtimed and timestamped operations. An extract from a UART implementation showsthis:

void txByte(out port txd, unsigned byte) {unsigned time;

txd <: 0 @ time; // Timestamped output of start bit

for (int i = 0; i < 8; i++) {unsigned bit = (byte >> i) & 1;

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time += BIT_TIME;txd @ time <: bit; // Timed output of data bit

}...

}

Other operations can be timed precisely through the use of hardware timers whichare added to XC through the timer type. Timers have a 10ns resolution.

void delay(unsigned d) {timer t;unsigned time;

t :> time;t when timerafter(time + d) :> time;

}

Events allow threads to manage multiple ports, timers and channels. An eventis handled within the current stack context and therefore much more responsivethan an interrupt which has to save and restore context. The time for a threadto respond to an event is guaranteed to be less than 50ns @400MHz. XC adds theselect keyword for managing events, which is like the switch statement in C exceptthat each case is a handler for an event caused by a hardware resource.

select {case miiRxDataPort :> word:

// Receive data...break;

case miiRxDataValidPort when pinseq(0) :> void:// End of packet - data valid pin low...break;

}

2.2 Closing timing

Once an application has been coded, compilation takes a matter of seconds, ratherthan the minutes or hours of programmable hardware solutions like FPGAs. (For amore detailed comparison with Verilog see the XC for Verilog Designers Whitepa-per [1]).

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Where the application implements hardware interfaces there are real-time constraintswhich must be met. Due to the deterministic nature of the XCore processor thesecan be verified during compilation.

XMOS devices are processor-based so there is no need to check register to registertiming paths across multiple design corners. Instead designers can concentrateon application-level timing paths—from an event occurring to a resulting actionbeing completed. For example, the ability to receive and process data words atthe maximum data rate or meet the required time from a packet being received tosending an acknowledge.

Figure 3: The timing tool

The timing tool allows timing critical sections of code to be defined interactively ina GUI. The tool can then automatically generate a timing script to be run wheneverthe application is compiled, ensuring that the timing requirements of the applicationcontinue to be met as the application is developed and debugged.

The timing tool only takes a matter of seconds to verify the timing of an application,resulting in a short timing closure cycle. Due to the deterministic nature of theXMOS architecture, the output from the tool can be taken as a guarantee of worstcase timing. (For more information on the timing analyzer see the XMOS TimingAnalyzer Whitepaper [2].)

www.xmos.com

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2.3 Partitioning

Particular timing challenges may be overcome by partitioning applications usinghardware communication channels. Tasks can be seamlessly spread across multi-ple communicating threads running on the same core, different cores - or even ondifferent chips. For example, the following function is shown as a sequential pieceof code and as it would look after partitioning over two threads.

void process(chanend dataIn, chanend dataOut) {unsigned x;x = step1(dataIn);step2(dataOut, x);

}

unsigned process(chanend dataIn, chanend dataOut) {chan c;par {

step1(dataIn, c);step2(c, dataOut);

}}

2.4 Verification and debug

Once an application has been implemented and meets its timing requirements, it isstill necessary to verify the application functions correctly. The XMOS tools providedifferent options for verifying the functionality.

An existing reference design or development board can be used to run the appli-cation. (There are a number of different boards available to help develop differenttypes of application and interfaces.)

If there is no appropriate development board available, the XMOS tools providesimulation-based methodologies. Testbenches can be created by either loopingback device pins and driving them with other threads or by writing an externaltestbench in C/C++/SystemC.

The simulator provides full, configurable visibility of the design under test. Com-plete instruction traces of the application as well as VCD waveform files are avail-able. The waveform viewer provided in the XMOS tools gives full visibility of thedesign and correlates the values driven onto the I/Os with their source lines in theapplication code.

Debug is provided using GDB with support for multi-thread, multi-core debug. Itcan be used within the graphical IDE or on the command-line.

www.xmos.com

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2.5 Software IP

XMOS provides a large number of interfaces implemented in XC. These are avail-able from the company website (http://www.xmos.com) and ensure that productdevelopment time is kept to a minimum, for example:

• LED tile controller

• Ethernet - MAC, TCP/IP stack, web server

• Digital audio interfaces - S/PDIF, ADAT, HDA

• Standard serial interfaces - UART, I2C, SPI, I2S

• Memory interfaces - SRAM, SDRAM

• Class D power amplifier

Complete reference designs are also available including:

• Ethernet AVB

• USB-Audio-2.0

• iPod dock - digital iPod and iPhone dock (Requires MFI registration with Apple)

3 Conclusions

XMOS provides a unique programmable solution making it quick and easy to de-velop complete systems. Its deterministic processor architecture makes it possibleto create hardware and software solutions programmed entirely in a high-level lan-guage - with the resulting gains in productivity and maintainability.

The XMOS tools offer a complete and unified design environment to enable de-signers to rapidly create complete, customizable hardware/software solutions. Thetools, available free of charge as a single download, contain a suite of integratedcomponents suitable for design exploration right through to verification and hard-ware deployment.

www.xmos.com

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4 What to Read Next

This document provides only an introduction to some of the key concepts used byXC and the XMOS tools. The following documents provide more in-depth informa-tion:

• Programming XC on XMOS Devices [3]: A practical guide for embedded engi-neers, and educators of concurrent programming and the XMOS architecture.It provides a standalone reference that blends techniques from both hardwareand software design, and shows how the XC language is being used to pro-gram the world’s electronics.

• The XMOS Tools User Guide [4]: Provides a brief tutorial on how to usethe XMOS Development Environment to do the most common tasks and a fullreference to the XMOS command line tools.

You may also find information from the following online resources useful:

• The XMOS Corporate Website: http://www.xmos.com/

• The XMOS Community Website: http://www.xcore.com/

Bibliography

[1] XMOS Limited. XC for Verilog Designers. Website, 2010. http://www.xmos.com/published/xc-verilog-design.

[2] XMOS Limited. Validating Timing Constraints with XMOS Tools. Website, 2010.http://www.xmos.com/published/xtatut.

[3] Douglas Watt. Programming XC on XMOS Devices. XMOS Limited, Sep 2009.http://www.xmos.com/published/xc_en.

[4] Douglas Watt and Huw Geddes. The XMOS Tools User Guide. XMOS Limited,2009. http://www.xmos.com/published/xtools_en.

www.xmos.com

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Disclaimer

XMOS Ltd. is the owner or licensee of this design, code, or Information (collectively, the“Information”) and is providing it to you “AS IS” with no warranty of any kind, express orimplied and shall have no liability in relation to its use. XMOS Ltd. makes no representationthat the Information, or any particular implementation thereof, is or will be free from anyclaims of infringement and again, shall have no liability in relation to any such claims.

Copyright © 2010 XMOS Ltd. All Rights Reserved. XMOS and the XMOS logo are registeredtrademarks of XMOS Ltd in the United Kingdom and other countries, and may not be usedwithout written permission. Company and product names mentioned in this document arethe trademarks or registered trademarks of their respective owners. Where those designa-tions appear in this document, and XMOS was aware of a trademark claim, the designationshave been printed with initial capital letters or in all capitals.

www.xmos.com