unit 2. boolean algebraocw.ulsan.ac.kr/ocwdata/2012/01/g01036-03/lecturenotes/[2... ·...

L i D i (2012)Logic Design (2012)

Unit 2. Boolean Algebra

Spring 2012

School of Computer Engineering & Information TechnologyInformation Technology

P f J M Ki

1 마이크로프로세서© 2010, Jong-Myon Kim http://eucs.ulsan.ac.kr

Prof. Jong-Myon Kim

Objectives

Topics introduced in this chapterTopics introduced in this chapter Understand the basic operations and laws of Boolean algebra Relate these operations and laws to AND, OR, NOT gates and switches Prove these laws using a truth table Manipulation of algebraic expression usingManipulation of algebraic expression using

Multiplying out Factoring Si lif i Simplifying Finding the complement of an expression

2 마이크로프로세서© 2010, Jong-Myon Kim 2 Logic Design© 2012, Jong-Myon Kim

Introduction

B i th ti f l i d i B l l b Basic mathematics for logic design: Boolean algebraRestrict to switching circuits (Two state values 0, 1) –

S it hi l bSwitching algebra Boolean Variable : X, Y, … can only have two state

l (0 1)values (0, 1) representing True(1) False (0)


Basic Operations

Not (Inverter)

01' and 1'0 1X if 0X' and 0X if 1X'

Gate Symbol


Basic Operations

AND

Truth Table

111 ,001 ,010 ,000

Truth Table

A B C = A · B

0 0 00 00 11 0

0001 0

1 101

Gate SymbolGate Symbol


Basic Operations

OR

111101110000

Truth Table

111 ,101 ,110 ,000

A B C = A · B

0 0 00 00 11 0

011

1 1 1

Gate SymbolGate Symbol


Basic Operations

Apply to Switch

AND T=A·B

OR T=A+BOR T=A+B


Boolean Expressions and Truth Tables

Logic Expression :

)'( CAB

Circuit of Logic



Logic Expression :

BEDCA )]'([

Circuit of Logic

0000)]'1(1[01)]'01(1[)]'([ BEDCA

Logic Evaluation : A=B=C=1, D=E=0


0000)]'1(1[01)]'01(1[)]'([ BEDCA


2-Input Circuit and Truth Table

A B A’ F = A’ + B

0 0 1 10 00 11 0

110

110

1 1 0 1



Proof using Truth Table))(( )')((' CBCACAB

n variable needs 2x2x2x = 2n rowsn variable needs 2x2x2x… = 2n rows

n times

A B C B’ AB’ AB’ + C A + C B’ + C (A + C) (B’ + C)

0 0 00 0 1

11

00

01

01

11

010 0 1

0 1 00 1 11 0 01 0 1

10011

00011

10111

10111

10111

101111 0 1

1 1 01 1 1

100

100

101

111

101

101


Basic Theorems

Operations with 0, 1

00111 0

XXXXXX

Idempotent(멱등) Laws 00 11

XXXXXXXX

Involution(누승) Laws

Complementary(상보) Laws 0' 1' )''(

XXXXXX

p y( )

101'11 ,1 if and ,10'00 ,0 XXProof

11)'( EDABExamples

11)( EDAB0)'')('( DABDAB


Basic Theorems with Switch Circuits


Commutative, Associative, Distributive

Commutative Laws : YX,XY XYYX

Associative Laws : ZYXZYXZYX

XYZYZXZXY

)()()()(

Proof of Associative Law for AND

ZYXZYXZYX )()(

X Y Z XY YZ (XY)Z X(YZ)

0 0 00 0 1

0 00 0

0 00 00 0 1

0 1 00 1 11 0 0

0 00 00 10 0

0 00 00 00 01 0 0

1 0 11 1 01 1 1

0 00 01 01 1

0 00 00 01 1


1 1 1 1 1 1 1

Associative Laws for AND and OR


Commutative, Associative, Distributive

AND : 1iff1 ZYXXYZOR :

Distribute Laws :

0 iff 0 ZYXZYX

XZXYZYX )( XZXYZYX )())(( ZXYXYZX

Valid only Boolean algebra not for ordinaryalgebra not for ordinary algebra

ProofYZYXXZXXZXYZXXZXYX )()())((

YZXYZXYZYZXYZXYXZXYZXYXZX

YZYXXZXXZXYZXXZXYX

1)1(1

)()())((


YZXYZXYZYZX 1)1(

Simplification Theorems

Useful Theorems for Simplification

XYXXXXYXXYXYXXXYXY

)( )')(( '

YXYXYXYYYX ' )'(

Proof

XYXYYYXYXYY 1)()')(('XXYXXYXXYXX )(

XXYXXYXXYX 1)1(1

)())((

Proof with Switch

=


Simplification Theorems

Equivalent Gate Circuits

ABBAAF )'(

=


Multiplying Out and Factoring

To obtain a sum-of-product form Multiplying out using distributive laws

EACECDAB ''' Sum of product form :

EFCDBA )(Not in sum of product form :

BCEBCDABCAEADAEDABCA ))((Multiplying out and eliminating redundant terms :

BCEBCDABCEBCDBCEDA

)1(

BCEBCDA


Multiplying Out and Factoring

To obtain a product of sum form all sums are the sum of single variable

Product of sum form : )'')(')('( ECAEDCBA


Circuits of SOP and POS Forms

Sum of product formSum of product formSum of product formSum of product form

P d t f fP d t f f


Product of sum formProduct of sum form

DeMorgan’s Laws

'')'('')'(

YXXYYXYX

DeMorgan’s LawsDeMorgan’s Laws'')'( YXXY

ProofProof

X Y X’ Y’ X + Y ( X + Y )’ X’ Y’ XY ( XY )’ X’ + Y’

0 00 1

1 11 0

01

10

10

00

11

110 1

1 01 1

1 00 10 0

111

000

000

001

110

110

''...'')'...( 321321 nn XXXXXXXX DeMorgan’s Laws for n variablesDeMorgan’s Laws for n variables

'...''')'...( 321321 nn XXXXXXXX ExampleExample


'''')'()'( 321321321 XXXXXXXXX

DeMorgan’s Laws

Inverse of A’B + AB’

ABBABBABABAABABAABBAABBAF

'''''' )')('()''()''()'''('

A B A’ B A B’ F = A’B+AB’ A’ B’ A B F’ = A’B’ + AB

0 00 1

01

00

01

10

00

100 1

1 01 1

100

010

110

000

001

001

Dual: ‘dual’ is formed by replacing AND with OR, OR with AND, 0 with 1, 1 with 0

CBACABCBACABCAB D )'()'( so ,')'(')''()''(

......)( ......)( XYZZYXZYXXYZ DD


)()(,)()()(

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