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Short channel effects in MOST

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Short-channel device: channel length is comparable to

depth of drain and source junctions and depletion

width

In general, short channel effects visible when L 1m

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If we shrink all length scales, a number of physical effects

can become relevant that are unimportant in largerMOSFETs:

Channel shortening, Punch-through, Tunneling,

Thermionic leakage, Threshold voltage variation with

drain bias, Velocity saturation, Field-dependent

mobility, Avalanche breakdown, Oxide failure ..

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1) Channel shortening

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Happens when VDS approaches VDSsat = VGS - VT

In long channel devices, we get pinch-off and saturation

ofID

In short devices, L can be a significant fraction ofLElectric field is large over L - thats where most of thesource-drain voltage is dropped.

Drift is enhanced by high electric field there: result is a

boost in ID as VDS is increased beyond VDSsat 5

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2) Threshold voltage variation

In threshold voltage equation, channel depletion region

is assumed to be created by gate voltage only -

Depletion regions around source and drain neglected:

valid if channel length is much larger than depletion

region depths

In short-channel devices, depletion regions from drainand source extend into channel

As channel length L decreases, threshold voltage

decreases 6

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Source

depletionregion

Drain

depletion

regionGate-induced depletion region

N+

source

N+

drain

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Drain-induced barrier lowering (DIBL)

As VDS increases, threshold voltage decreases

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3) Carrier velocity saturation

Field along channel - As channel length is reduced,

electric field increases

Electron drift velocity is proportional to electric field

only for small field values - For large electric field,

velocity saturates

9

If the velocity of carriers becomes large enough,

they can lose energy through inelastic processes.

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10

If L is large compared to the inelastic scattering length,

one sees velocity saturation

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Results:

There is a significant reduction in current.

Saturation current now depends linearlyon VGS - VT

rather than quadratically in longer devices.

IDsat = W Cox (VGSVT) vsat

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Ballistic Devices

If the channel is short enough (below the mean free path

length scales), then the carriers can travel from source to

drain without going through any significant scattering

events. This is called ballistic transport.

Carriers can often gain an average velocity over vsat .

This phenomena is known as velocity overshoot.

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4) Avalanche breakdown

At high enough energies/fields (in regions with large

electric fields, like drain pinch-off area), carriers can

produce electron-hole pairs through collisions.

These pairs may not be bound, and can also get

accelerated, leading to more pairs.

Result is runaway ID not controlled by VG.

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5) Thermionic leakage / tunneling

Both processes can be relevant.

Tunneling matters more for smaller devices

Thermionic emission matters more at higher

temperatures.

Biggest problem is that these can lead to substantial

off-currents and power dissipation

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Tunneling Leakage Current

For SiO2 films thinner than 1.5 nm, tunneling leakage

current has become the limiting factor.

HfO2 has several orders lower leakage for the same EOT.15

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Unless a new gate dielectric (other than SiO2) is

developed, leakage current due to tunneling will forceminimum transistor dimensions to be 25-50 nm.

HfO2 has a relative dielectric constant of ~ 24, six times

larger than that of SiO2 .

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Fowler-Nordheim Tunneling

For very thin gate oxide, electrons can tunnel through

the gate oxide, resulting in current from gate to drain orsource

oxE

E

oxFN eWLECI

0

2

1

E0, C1 constants

Eox = electric field across

oxide

Gate leakage

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To keep VT variations under control, the gate oxide

thickness is reduced. Eventually this leads to tunneling

of electrons from the gate to the silicon substrate which

results in leakage current.

Gate oxide considerations

The maximum acceptable leakage current for a device

with Vdd = 1V is about 1A/cm2.

This corresponds to an oxide thickness of roughly 2 nm.

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Leakage

Power consumed even when circuit is inactive - Leakage

power raises temperature of chip - Can cause

functionality problem in some circuits

Reducing transistor leakage

Long-channel devices

Small drain voltage

Large threshold voltage VT19

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Leakage

Leakage vs. performance tradeoff:

For high-speed, need small VT and L

For low leakage, need high VT

and large L

Process scaling

VT reduces with each new process (historically)

Leakage increases ~10X!20

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6) Mobility degradation

In short-channel devices, n and p are not constant -As vertical electric field increases, surface mobility

decreases

TGS

VV

1

0

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As VDS is increased, drain depletion region gets

deeper and extends further into channel

For very large VDS, source and drain depletion

regions can meet punch-through

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7) Punch-through

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8) Hot-carrier effect

Increased electric fields causes increased electron

velocity

High energy electrons can tunnel into gate oxide

This changes the threshold voltage (increases VT

for NMOS)

Can lead to long-term reliability problems

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High-velocity electrons can also impact the drain,

dislodging holes

Holes are swept towards the substrate cause

substrate current impact ionization

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Both devices have same W/L ratio

Short-channel device has ~ 40% lesser current

Linear dependence of current on VGS in short-channel

deviceit is quadratic in long channel device 25

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MOS ID-V

GSCharacteristics

0

1

2

3

4

5

6

0 0.5 1 1.5 2 2.5

VGS (V)

(for VDS = 2.5V, W/L = 1.5)

X 10-4

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9) Subthreshold conduction

When VGS < VT, transistor is off

However, small drain current ID still flows -

subthreshold leakagecurrent

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10) Oxide failure

High energy electrons accelerated by large fields can

break bonds - can effectively introduce enough defect

states in gap to permit sufficient conduction to get

runaway failure.

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Trends:

Shorter channel lower threshold voltage

Higher VD lower threshold voltage.

Thinner oxide higher threshold voltage.

To keep up with source-drain field, we must scale oxide

to be thinner.

Thinner oxide higher gate field enhanced

surface scattering at channel-oxide interface

lower effective mobility. 29

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MOSFET Technology Scaling

New technology node every three years or so.

Defined by minimum metal line width.

All feature sizes, e.g. gate length, are ~70% of previous

node.

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MOSFET Scaling

Constant Field

Ideal, helps reliability

Constant Voltage

Traditional, board-level compatible

Hybrid - practical

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Constant Field Scaling

Uniformly scale all linear dimensions by factor of s > 1

Also reduce supply voltage by s

Preserves field strength

Also known as full scaling

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Before

Scaling

After Scaling

Length L L/s

Width W W/s

Oxide Thickness tox tox/sJunction Depth Xj Xj/s

Supply Voltage VDD VDD/s

Threshold Voltage VT VT/s

Doping Densities NA,ND sNA,sND

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oxscaledox sCC ,

s

CC

g

scaledg ,

Capacitance:

s

I

s

V

s

V

sL

sW

stI

DTGS

ox

ox

scal edD

2

,2

Current:

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Power:2s

P

s

I

s

VP

DDS

scal ed

AP

sLsW

sP

A

P

scaled

scaled

2

Power density :

Delay: ssI

sVsCscaled

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Constant Voltage scaling

Before Scaling After Scaling

Length L L/s

Width W W/s

Oxide Thickness tox tox/s

Junction Depth Xj Xj/s

Supply Voltage VDD VDD

Threshold Voltage VT VT

Doping Densities NA,ND s2NA,s

2ND36

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(for velocity non-saturated devices)

oxscaledox sCC ,s

CC

g

scaledg ,

Capacitance:

Current:

DTGSox

ox

scal edDsIVV

sL

sW

stI

2

,2

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2ssI

VsCscaled

Delay:

Power: sPsIVPDDSscal ed

Power density:

APs

sLsWsP

APscaled

scaled /3

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Current:

Power:

DscaledD II ,

PIVP DDSscaled

(for velocity-saturated devices)

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sI

VsCscaled

Delay:

Power density:

APs

sLsW

P

A

P

scaled

scaled /2

(velocity-saturated case)

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Hybrid scaling

Scale voltage, but not as fast as process

Some circuits need a minimum voltage (band-gap,

analog circuits, etc) - Low thresholds have leakage

problems

Result is somewhere between constant field and

constant voltage - delay ~ 1/s, higher power than

constant field but less than constant voltage

41

45

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0

5

10

15

20

25

30

35

40

45

0.65um 0.5um 0.35um 0.25um 0.18um 0.13um 0.1um

gate

Cu interconnect

Al interconnect

Cu + gateAl + gate

Delay in ps

Wire - 43um long & 0.8um high