전자 회로 1 lecture 2 (op-amp i) 2009. 03. 임한조 아주대학교 전자공학부...
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전자 회로 1Lecture 2 (Op-Amp I)
2009. 03.임한조
아주대학교 전자공학부[email protected]
이 강의 노트는 전자공학부 곽노준 교수께서 08.03 에 작성한 것으로 노트제공에 감사드림 .
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Overview
Reading: Sedra & Smith Chapter 2.1~2.4 Chap. 2.4.2 is omitted in this lecture. (Self study needed)
Outline Ideal Op-Amp Inverting/non-inverting configuration Difference Amp.
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OP AMP
OP AMP = Operational Amplifier ( 연산증폭기 ) + / - / 미분 / 적분 등의 연산이 가능
Symbols
최소한 3 개의 터미널이 있음 (2 input / 1 output) DC power 도 필요 (1 개 혹은 2 개 : V+ / V-)
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Ideal Op-Amp
TABLE 2.1 Characteristic of the ideal Op Amp
1. Infinite input impedance
2. Zero output impedance
3. Zero common-mode gain or, equivalently, infinite common-mode rejection
4. Infinite open-loop gain A
5. Infinite bandwidth
6. Ideal voltage controlled voltage source
• OP-AMP 는 input signal 의 차이 (v2-v1)를 증폭해서 output 에 나타낸다 .
• 즉 v0 = A (v2-v1): voltage amplifier
• A: differential gain open-loop gain
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Common & differential mode signals
2 1 (2.1)Id
1 2
1( ) (2.2)
2Icm
1 /2 (2.3)Icm Id
2 /2 (2.4)Icm Id
• Common-mode input signal:
• Differential input signal:
• Infinite Common-mode rejection: v1 과 v2 에 공통으로 있는 성분을 전혀 증폭하지 않는다 .
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Inverting configuration (1)
Closed-loop gain G=Vo/Vi A 가 무한대라고 가정하면 , V1-V2 = Vo/A = 0
Virtual short circuit V2 = 0 V1 = 0 이므로 V1 을 virtual ground 라고도
함 .
Negative feedback
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Inverting configuration (2)
11
1 1 1
0I I IiR R R
0 1 1 2 20 I
I
i R RR
0 2
1I
R
R
R1 과 R2 의 비율을 변화시킴으로써 closed-loop gain G 를 변화시킬 수 있다 . (G 는 A 와 independent; if A is infinite)
G =
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Finite open-loop gain
A 를 무한대로 만드는 것은 물리적으로 불가능
What if A is finite? Virtual ground 대신 terminal
의 전압이 – Vo/A 라고 가정
Ainfinity G-R2/R1
V10 Virtual ground 성립 Open loop gain A 의 영향을
줄이기 위해
0 01
1 1
( / A) / AI IiR R
0 0 00 1 2 2
1
/ A
A AIi R RR
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Input resistance (closed-loop)
Ideal op-amp 를 가정하면 (A= infinity) input resistance:
What if A = finite? solve
11 1/I I
iI
R Ri R
High gain G 를 얻기 위해서는 R1 이 작아져야 한다 . (R2 를 크게 할 수는 없기 때문에 )
small input resistance problem (solution in Example 2.2)
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Output resistance
Output resistance 를 구하기 위해서는 Input voltage 를 0 으로 하고 강제로 output 에
전압을 준 후 Vo/Io 를 구한다 .
그림 2.6(a) 에서는 Roa = 0 작은 output resistance (Good!)
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Model of inverting configuration
Closed-loop inverting configuration 은 다음과 같은 voltage controlled voltage source (voltage amplifier) 로 모델이 가능
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Inverting config. with general impedance
R1, R2 Z1, Z2 로 대체
Z1, Z2 를 바꿔가면서 다음을 만들 수 있다 . Integrator (Chap. 2.8) Differentiator (Chap. 2.8) Summer (Chap. 2.2.4) …
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Examples: The Weighted Summer
1 2 3 41 2 3 4
(2.8)a c a c c c
b b
R R R R R R
R R R R R R
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Non-inverting configuration
No inversion ! Inverting conf: G = - R2/R1
Virtual short circuit (v2 = v1)
0 0 for A = AId
0 21
II R
R
0 2
1
1 (2.9)I
R
R
11 0
1 2
(2.10)R
R R
Gain
Q1. Input Resistance?Q2. Output Resistance?
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Finite open loop gain
If A >> 1+R2/R1 G = 1+R2/R1
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Voltage follower (unity buffer)
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Difference Amplifier (two sources)
0 A A (2.13)d Id cm Icm
ACMRR = 20log (2.14)
Ad
cm
• Common mode rejection ratio:
Analysis either by • Brute force ( 힘으로 ~)• Superposition ( 머리로 ~)
Solution:
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Example (Superposition): Single Diff. Amp.
= +
21 1
1O I
R
R 4 2 2
2 2 23 4 1 1
1O I I
R R R
R R R R
By superposition: 2 22 1
1 1
(2.16)O I I Id
R R
R R
2
1
A (2.17)d
R
RDifferential gain:
3 1 4 2 and R R R R Usual selection:
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41
1 4 3
3
4 3 1
1
1 (2.18)
Icm Icm
Icm
Ri
R R R
R
R R R
42 2
4 3O Icm
Ri R
R R
34 2
4 3 1 4 3
34 2
4 3 1 4
= 1
O Icm Icm
Icm
RR R
R R R R R
RR R
R R R R
A 0cm
34 2
4 3 1 4
A 1 (2.19)Ocm
Icm
RR R
R R R R
12 (2.20)idR RProblem: Low input resistance (see 2.4.2)Good!
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Summary
Characteristic of the ideal Op Amp (Open loop)
1. Infinite input impedance
2. Zero output impedance
3. Zero common-mode gain or, equivalently, infinite common-mode rejection
4. Infinite open-loop gain A
5. Infinite bandwidth
6. Ideal voltage controlled voltage source
Characteristic of the ideal Op Amp
(Closed loop – feedback)
1. Inverting configuration
G = -R2/R1, Rin = R1, Ro = 0
Applications: summer, integrator,
differentiator, …
2. Non-inverting configuration
G = 1+R2/R1, Rin = inf., Ro = 0
Applications: unity buffer …
3. Difference amp. (R2/R1 = R4/R3)
G = R2/R1, CMRR=inf.
Rin = 2*R1 (if R1=R3, R2=R4), Ro = 0
* Finite open loop gain (A) should also be noted. But in most cases, infinite gain model is enough.