中華大學通訊系 1 transmission line effects in high speed digital pcbs 中華大學通訊系...

中華大學通訊系 1

Transmission Line Effects in High Speed Digital PCBs

中華大學通訊系田慶誠[email protected] 5186030

mailto:[email protected]


Introduction of Waves

Vp: Phase velocity


Lumped v.s. Distributed Circuit

Lumped Circuits



Definitions of lumped element

(1) Input current amplitude = Output current amplitude

(2) Input current phase = Output current phase



Distributed Circuit



What “Distributed” means


Rise Time v.s. Travel Time

Tr: Rise Time Td: Delay Time


Digital Interconnection Rules

數位工程師的 Rule of thumb Signal path can be treated as:

A lumped element, if Tr > 6 Td (Short ckt, series resistor, shunt capacitor)

A lumped model, if 2.5 < Tr/Td < 6 (Series inductor with shunt capacitor)

A distributed model, if Tr < 2.5 Td (Transmission Line or multi-section LC model)


Why Tr > 6 Td ?

Example: Rs = 0.25 Zo, RL=


Why Tr > 6 Td ?

Multi-reflections occurred at load Tr = 2 Td Tr = 4 Td


Why Tr > 6 Td ?

Strong ringing Smooth ripple Tr = 2 Td Tr = 4 Td


Example of High-Speed IC Interconnection

CMOS On-chip 1mm interconnection Vp= 0.5c = 150mm/ns Td=1mm/Vp = 0.067ns Rule of Thumb only worked as:

Tr > 6Td= 0.04ns FCLK < (8Tr) -1 = 3GHz

Inductance extraction now is very important !!


Example of High-Speed IC Interconnection

10mm interconnection between IC’s Vp= 0.6c =180mm/ns Td= 10mm/Vp = 0.056ns Rule of Thumb only worked as:

Tr > 6Td= 0.33ns FCLK < (8Tr) -1 = 375 MHz

Distributed analysis now is very important !!


Sinusoidal EM Wave

Oscillations in Time


Sinusoidal EM Wave

Wave Motion in Space


Period v.s. Travel Time

Period T = 1/freq Td= L/(freq*) VBB’(t) is different from VAA’(t)


Period v.s. Travel Time

類比工程師的 Rule of thumb Signal path can be treated as:

A lumped element, if Td < T/100 (Short ckt, series resistor, shunt capacitor)

A lumped model, if T/100 < Td < T/20 (Series inductor with shunt capacitor)

A distributed model, if Td > T/20 (Transmission Line or multi-section LC model)


Trace v.s. Wavelength

類比工程師的 Rule of thumb Signal path can be treated as:

A lumped element, if L < /100 (Short ckt, series resistor, shunt capacitor)

A lumped model, if /100 < L < /20 (Series inductor with shunt capacitor)

A distributed model, if L > /20 (Transmission Line or multi-section LC model)


Example of Radio-Frequency Interconnection

For 1GHz RF signal in PCB circuits Vp= 0.6c =180mm/ns = Vp/freq =180mm Rule of Thumb only worked as:

Td < T/100 = 0.01ns L < /100 = 1.8mm = 71 mil

Distributed analysis is needed for RF PCB design !!


Component size v.s. Wavelength


Component size v.s. Wavelength

Definitions of lumped element (1) Input current amplitude

= Output current amplitude (2) Input current phase

= Output current phase Only at 100MHz, 2cm resistor can be treat

ed as a lumped resistor !


Electromagnetic Component

LumpedElements

CoaxialCable

WaveguideOpticalFiber


Resistor Capacitor Inductor

Definitions of lumped element (1) Input current amplitude

= Output current amplitude (2) Input current phase

= Output current phase

Basic Lumped Elements


Capacitor

Time domain : Ic= C (dVc/dt)

t= 0-, Vc=0

(a) t= 0+, Vc can be finite value?Ic= infinity !! impossible!!@#

(b) t=0+, Vc= 0, Short circuit for instant

(c) Ballastor for impulse voltage

Frequency domain : ic= jC vc


Inductor

Time domain : VL= L (dIL/dt)

t= 0-, IL=0

(a) t= 0+, IL can be finite value?

VL = infinity !! impossible!!@#

(b) t=0+, IL= 0, Open circuit for instant

(c) Ballastor for impulse current

Frequency domain : vL= jL iL


Practical Capacitor

With Parasitic Resistor Rs and Inductor Ls

RS LSC

|ZC|

Freq (log)

Capacitive

Inductive


Practical Inductor

With Parasitic Resistor Rp and Capacitor Cp

RP

L

CP

|YC|

Freq (log)

Capacitive

Inductive


Murata Chip L/C Library


Transmission Line Behavior

電容起始電壓從 0 開始電感起始電流從 0 開始電壓及電流往右移動需要花時間


Distributed circuit of a uniform transmission line


Transmission Line Parameters

R: Resistance per unit length (/m) Due to conductor loss

L: Inductance per unit length (H/m) C: Capacitance per unit length (F/m) G: Conductance per unit length (S/m)

Due to dielectric loss


Lumped circuit models for a short segment of a TL


Transmission Line Equations



Kirchhoff’s voltage law

t

tzILtzIR

z

tzV

z

tzVtzzVt

tzIzLtzIzRtzVtzzV

z

),(),(

),(),(),(

),(),(),(),(

lim0

),()(),(

tzIt

LRz

tzV

?!0zas



Kirchhoff’s current law

t

tzVCtzVG

z

tzI

z

tzItzzIt

tzVzCtzVzGtzItzzI

z

),(),(

),(),(),(

),(),(),(),(

lim0

),()(),(

tzVt

CGz

tzI

?!0zas


Wave Equations for Lossless Line

For a lossless line, R= 0 and G= 0

t

VC

z

I

t

IL

z

V

2

2

22

2

2

2

2

2

22

2

2

2 11

t

I

vt

ILC

z

I

t

V

vt

VLC

z

V

PP

)/(1

smvelocityphaseLC

vp


Traveling-Wave solutions

V+:voltage wave traveling in +z direction V-:voltage wave traveling in -z direction

)()(),(PP v

ztV

v

ztVtzV


Traveling-Wave solutions


Characteristic Impedance

)]()([1

),(

)()(),(

0 PP

PP

v

ztV

v

ztV

ZtzI

v

ztI

v

ztItzI

C

L

I

V

I

VZ

0


Transmission line lumped model如何正確使用？

?!0zas

Using PSPICE to simulate 100MHz sinusoidal wave propagating in 40cm RG-58/U coaxial cable by lumped model.

RG-58/U cableZ0=50v= 2x108m/sL= 250nH/mC= 100pF/m=2m @100MHzl= 40cm=0.2 @100MHzDelay= 2ns

Ideal LineIdeal Line

5

Z

10

Z

Time delay=3.2ns(60% Error, Too bad !)

Time delay=2.55ns(27.5% Error, Not good !)

20

Z

Time delay=2.25ns

(12.5% Error)

It’s well.

40

Z

Time delay=2.11ns

(5.5% Error)

It’s good enough!!It’s good enough!!


Transmission line lumped model使用重點

(1) Z0, 在工程的眼光下，可近似成 Z</20 。

(2) 若要以 Lumped model 建立傳輸線電路的模型，例如 IC Pakage interconnection lines 等，必須先知道傳輸信號所佔頻寬中的最大頻率 Fmax。

(3) 波長 min= 波速 v / Fmax。

(4) Transmission lines 超過 min/20 就必須做適當的切割，分別建立獨立的 Lumped model 。


Cross-sectional View of common uniform TL


Transmission Line Parameters


Skin Effect

For low frequency

For high frequency Skin depth

)/(1

mA

R

A

)/(1

)(1

mfw

R

mf


Microstrip Lines(Agilent APPCAD)


Coplanar Waveguide( 側邊鋪銅 )


Safety Separation Distance

G >2H


Potentially DangerousParasitic Transmission Lines

Parallel plates TL for TEM wave

Slab waveguide for surface wave


Excitation of parasitic TL

Parallel-plate mode excitation

Surface wave excitation


利用鋪銅抑制 parasitic waves


Adding Bypass Capacitors

中華大學 通訊系 1 transmission line effects in high speed digital pcbs 中華大學 通訊系...

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中華大學通訊系 1 transmission line effects in high speed digital pcbs 中華大學通訊系...