(AHALBHBLCHCLDHDL)
BPSPSIDI
GR-->IB,RDGR,WRGR,W/B
IB==>Ri(16)GR
RDGRW/BGR->IB
C => Rj Rj
C->IB,WRGRW/B
CPU
)F,DF,IF 
CPU
OPCODE d W MOD REG R/M Data_low Data_high Disp_low Disp_high

2)
3)
4)
OPCODE d W MOD REG R/M Data_low Data_high Disp_low Disp_high
1100011 1 00 000 110 34 12 10 00

 ADD AX,BX P104
CPU

INC AL

CPU

MOV DSTSRC
R ,Imm ,[RBI] ,di ,di[RBI] , di[RB][RI]
(1) MOV AX,BX
(2) MOV AX,1234H
(6) MOV AX,[BX+SI+1234H]
CPU
DC
SC
EC
w
FT0
FT1
FC
DC
SC
EC
w
w
DC
SC
EC
w
w
FT0
FT1
FC
PC=>MAR
PC=>MAR
DC
SC
EC
w
w
FT0
FT1
FC
PC=>MAR
Z=>MAR
DC
SC
EC
w
w
FT0
FT1
FC
Z => D
DC
SC
EC
w
w
MDR=>M
PC+1=>PC
MDR=>M
Z => MAR
PC=>MAR
MDR=>M
Z => D
MDR=>M
n

4.
CPU
FT0
FT1
FC
PC=>MAR
Z=>MAR
DC
SC
EC
w
w
Z => MAR
PC=>MAR
Z=>MDR
Z => MAR
PC=>MAR
Z=>MDR
PC+1=>PC
Z => D
Z => MDR
n

Z => D
Z => MDR
CPU
PSW
15 12 11 8 7 6 5 4 3 2 1 0
PC


PC



I/O





15 12 11 8 7 6 5 4 3 2 1 0
2

CPU




3

15 12 11 8 7 6 5 4 3 2 1 0
4

(2)

(3)
(4) “”

2045(25-1)*4=124
1
2

2KX3211
FIB FGR FE FGRA FCP FALU FPC FAB FM FW/B FDB JC

4.1
FT0
FT1
FC
Z => D
DC
SC
EC
w
w
DC
EC
w
w