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전자회로전자회로Ch5 Bipolar Amplifiers

김 영 석

충북대학교 전자정보대학

2012.3.1

E il ki @ b kEmail: kimys@cbu.ac.kr

Ch5-1

Ch5 Bipolar Amplifiers

5.1 General Considerations

5.2 Operating Point Analysis and Design p g y g

5.3 Bipolar Amplifier Topologies

5.4 Summary and Additional Examples

Ch5-2

5.1 General Considerations: Voltage Amplifier

To be Vout=Av*Vm Rin= Rout=0 (Ideal Voltage Amplifier)To be Vout=Av*Vm, Rin=∞, Rout=0 (Ideal Voltage Amplifier)

Ch5-3

Input/Output Impedances

V=0(Short)I=0(Open)

V

x

xx i

VR =

The figure above shows the techniques of measuring input d t t i d

Ch5-4

and output impedances.

(소신호) 이득, 저항(Impedance) 개념

중요한 개념이니 꼭 기억할 것.

이득은 소신호 입력 전압에 대한 소신호 출력 전압의 비율임

입출력저항(Impdeances)은 소신호 전류에 대한 소신호 전압의 비율임입출력저항(Impdeances)은 소신호 전류에 대한 소신호 전압의 비율임

대신호 혹은 DC 전류, 전압이 아님

예:예

inININoutOUTOUTinININ

acDCiIivVvvVv

+=

+=+=+=

성분소신호성분신호 )( ,,

in

out

IN

OUTv v

vv

vA

acC

=∂∂

==이득소신호

성분소신호성분신호

)(

)(

in

in

IN

INin

inIN

iv

ivR =∂∂

==입력저항소신호)(

Ch5-5

Impedance at Base

vR πrivR

x

xbase ==

When calculating input/output impedance, small-signalanalysis is assumed.

Ch5-6

Impedance at Collector

rR = ocollector rR =

With Early effect, the impedance seen at the collector is equal to the intrinsic output impedance of the transistor

Ch5-7

(if emitter is grounded).

Impedance at Emitter

)(1 ,11

∞=≈= oemitterx rRv )(,1

+o

memitter

mx g

rgi

π

The impedance seen at the emitter of a transistor is approximately equal to one over its transconductance (if th b i d d)

Ch5-8

the base is grounded).

Three Master Rules of Transistor Impedances

Rule # 1: looking into the base, the impedance is rπ ifemitter is (ac) grounded.Rule # 2: looking into the collector the impedance is r ifRule # 2: looking into the collector, the impedance is ro if emitter is (ac) grounded.Rule # 3: looking into the emitter, the impedance is 1/gmif base is (ac) grounded and Early effect is neglected.

Ch5-9

s s ( ) g y s g

DC Analysis vs. Small-Signal Analysis

First, DC analysis is performed to determine operating point and obtain small-signal parametersand obtain small-signal parameters.

Second, sources are set to zero and small-signal model is used.

Ch5-10

5.2 Operating Point (DC) Analysis and Design: Biasing with Base Resistor

),(, CCB

BECCC

B

BECCB Vf

RVVI

RVVI ββ =

−=

−=

Assuming a constant value for VBE,=0.7V, one can solve for d d d fboth IB and IC and determine the terminal voltages of the

transistor.

However, bias point is sensitive to β variations.

Ch5-11

β

5.2.2 Resistive Divider Biasing (Improved)

21

2CCX

VR

VRR

RV+

=

)()exp(21

2CC

T

CCSC Vf

VV

RRRII =+

=

Using resistor divider to set VBE, it is possible to produce an IC that is relatively independent of β if base current is

Ch5-12

small.

Accounting for Base Current

⎞⎛⎟⎠

⎞⎜⎝

⎛ −=

T

ThevBThevSC V

RIVII exp

With proper ratio of R1 and R2, IC can be insensitive to β; however, its exponential dependence on resistor d i ti k it l f l

Ch5-13

deviations makes it less useful.

5.2.3 Emitter Degeneration Biasing (Good)

The presence of RE helps to absorb the error in VX so VBE stays relatively constantrelatively constant.

This bias technique is less sensitive to β (I1 >> IB) and VBE

variations.

Ch5-14

Emitter Degeneration: Design Procedure

Choose an IC to provide the necessary small signal parameters, g , r , etc.parameters, gm, rπ, etc.

Considering the variations of R1 R2 and VBE chooseConsidering the variations of R1, R2, and VBE, choose a value for VRE.

With VRE chosen, and VBE calculated, Vx can be determined.

Select R1 and R2 to provide Vx.

Ch5-15

5.2.4 Self-Biasing Technique

BECCBECCC

BEBBBCCCC

VVVVI

VIRIIRV−

≈−

=

+++= )(

BC

CBCC

RR

RRRI

>>

≈++

)1(

/)/11(

β

ββ

Thi bi t h i tili th ll t lt t id th

BECCBE VVV −<<Δ )2(β

This bias technique utilizes the collector voltage to provide the necessary Vx and IB.

VC > VB, thus guaranteeing active operation of the transistor.

(1) id i iti it t(1) provides insensitivity to β .

(2) provides insensitivity to variation in VBE

이 절에서 언급된 모든 바이어스 회로는 Discrete 회로 구성시에 사용함

IC에서는 저항은 사용(면적 증가)하지 않고 TR로만 구성된 바이어스 회로(Current Mirror) 사용함

Ch5-16

5.3 Bipolar Amplifier Topologies

C E itt : ( )(d)Common Emitter: (a)(d)

Common Base: (b)(d)

Common Collector: (a)(e)

Ch5-17

Common Collector: (a)(e)

5.3.1 Common-Emitter(CE) Amplifier

))(||( moCout vgrRv −= π

)||( oCmi

outv rRg

vvA −==

)||( , oCoutin

in

rRRrRv

== π

Ch5-18

Emitter Degenerated CE Stage

By inserting a resistor in series with the emitter, we “degenerate” the CE stage.

Degeneration=Negative Feedback: Vin↑=>IC↑=>RE*IC↑=VBE↓=> IC↓Degeneration=Negative Feedback: Vin↑=>IC↑=>RE IC↑=VBE↓=> IC↓

This topology will decrease the gain of the amplifier but improve other aspects, such as linearity, and input impedance.

Ch5-19

Emitter Degenerated CE Stage

),(: minminEininin rgirgiRirvR =++= πππ β

00)(

)1(Ein

inin

vRR

RrivR ++==∴

π

π β

0,0)(:

Cx

out

mEinout

RivR

vvgr

RvvR

==∴

=∴=++= πππ

ππ

)/1 ( 1)( EmE

C

E

CCm

in

out

inv

x

RgifRR

R

RRgRr

vv

vvA

i

<<≈+

−≈−== π

π

π

Emg

Av,CE=-(Collector Resistance)/(Emitter Resistance)=-RC/(1/gm+RE)

Ch5-20

Ex1: Emitter Degenerated CE Stage

Cv

R

rRA −= 2

1|| π

Em

Rg

+1

Ch5-21

Ex2: Degenerated CE Stage with RB

CmEB

out

inin

outv Rg

RrRr

vv

vv

vvA −

+++=== )(

)1(.

βπ

π

π

π

Ein

oA

RrRrV

++=∞=∞=

)1()(

1 βπ

EB

C

RRR

++

−≈ 1

βCout

EBin

Ein

RRRrRR

=+++= )1(22

1

βπ

π

Emgβ

Ch5-22

Output Impedance of Degenerated Stage with VA<∞

)||( xEp iRrvv ππ =−=

)||)(1( ))(1()(

xEOmxo

Omxomxox

iRrrgirvrgirvvgirv

π

πππ

++=−++=−−=

Emitter degeneration boosts the output impedance by a

)||)(1( EOmOout

xEOmxo

RrrgrR π

π

++=∴

Emitter degeneration boosts the output impedance by a factor of 1+gm(RE||rπ).

This improves the gain of the amplifier and makes the circuit a better current source

Ch5-23

circuit a better current source.

Complete CE Stage

π== outxoutv

vvvvA

)]||([)1()]1([||||

)]1([|||| 21

βββ ππ

π

−+++++

++= LCm

E

xininv

RRgRr

rRrRRR

RrRRvvvv

)])1([|| (1||

)1()]1([||||

21

21

β

ββ

π

ππ

++>>−

+++++

ELC

EES

RrRRifRRR

RrRrRRR

++ Em

s Rg

R

Ch5-24

5.3.2 Common Base (CB) Amplifier

oCoutin

oCmv

rRRR

rRgA

||,1)||(

==

+=

oCoutm

in g||

)||(),||( ,, oCmCBvoCmCEv rRgArRgAthatNote +=−=

Ch5-25

CB Stage with Source Resistance

outxoutv

vvvA ==

oCmmS

m

xininv

rRggR

gvvv

)]||([/1

/1 +

=

mS

C

gR

R1

+≈

)||)(1( πrRrgrR Somoout ++=

Ch5-26

CB Stage with RB

)0(1

=+

+= oB

min rR

gR

)(π

π

π

π

++== Cm

BinE

inout

ein

e

in

out

R

RgRr

rRR

Rvv

vv

vv

vv

)1/(/1

β+++≈

BmE

C

RgRR

)](||[)( xBEmxox iRrRvgirv ++−= ππ

)](||[

)](||[)(

BxBE

xBEmxox

RrriRrRv

g

+−

+=π

πππ

ππ

)](||)[/1

1(1 BEB

omo

x

xout RrR

rRrgr

ivR +

+++== π

π

Ch5-27

Input Impedance Seen at Emitter and Base

Ch5-28

5.3.3 Emitter Follower (Common Collector Amplifier)

When the input is increased by ΔV, output is also increased by an amount that is less than ΔV due to the increase in collector current and hence the increase in potential drop across RE.

However the absolute values of input and output differ by a VBE.

Ch5-29

Emitter Follower

∞=AV

)(

||1),1( Em

outEin Rg

RRrR =++=

β

βπ

)/1( 1/1)1(

)1(Em

Em

E

E

E

in

out RgRg

RRr

Rvv

<<≈+

≈++

+=

ββ

π

Ch5-30

Emitter Follower with Source Resistance

∞=AV

Ein RrR ++= )1( βπ

Em

Sout

Ein

Rg

RR ++

= ||)11

(

)(

β

βπ

S

E

in

out

m

RRR

vv

g

++= 1

β

Em

Sin Rg

+++1β

Ch5-31

Emitter Follower with Early Effect

OES

OEv

rRg

RrRA

||11

||

+++

=

β( )( )OEin

m

R

rRrRg

1

||11

⎟⎞

⎜⎛

++=+

ββ

π

OEm

sout rR

gRR ||||1

1 ⎟⎟⎠

⎞⎜⎜⎝

⎛+

+=

β

Ch5-32

Amplifier Example I

)]1([|| β++ rRrRvvvv

)])1([(||

)]||([)1()]1([||

)]1([||

21

21

1

β

βββ

π

π

π

π

π

π −+++++

++==

C

CmEES

Eout

bin

b

in

out

fRRR

RRgRr

rRrRR

RrRvv

vv

vv

vv

)])1([(1|| 1

2

1

1 βπ ++<<+

⋅+

−≈ E

Em

C

S

RrRifR

g

RRRR

R

Ch5-33

Amplifier Example II

)()1()]1([||

)]1([|| 21

βββ πππ −

++== Rg

Rr

RRRRrRvvvv

Cmoutbout

)])1([ (1

)()1()]1([||

211

221

β

ββ

π

πππ

++<<⋅+

−≈

+++++

RrRifRRR

R

gRrRrRRvvvv

C

CmSbinin

12

1 ++ Rg

RRm

S

Ch5-34

Amplifier Example III

1 R

211

1

2 11

i

meq

rRrR

Rg

R

++=+

+=β

1

211

11C

v

in

RRA

rRrR

++

−=

++ ππ

Ch5-3521 1 mm gg

++

Amplifier Example IV

Cv

R

RRA 1|| 1=

mS g

R +

Ch5-36

Amplifier Example V

⎥⎦

⎤⎢⎣

⎡⎟⎟⎠

⎞⎜⎜⎝

⎛+

++

+=+

+=βββ 1

1||1

111

1

211

SE

eqin

Rg

Rg

Rg

R⎦⎣ ⎠⎝ +++ βββ 111 211 mmm ggg

Ch5-37

Amplifier Example VI

OEOEoutbout rRRrRRrRvvv )1)(||||()]1)(||||([|| 2211 +++==

ββπ

OE

OEOESbinin

RR

rRRRR

RrRRrrRRrRRvvv

||||1||||

)1)(||||()]1)(||||([||

21

21211

+≈

+++++ ββ ππ

RR ||1 ⎞⎛

OEm

S rRRg

RR ||||12

1

1 ++

OES

mout rRRRR

gR ||||||

1||1

21⎟⎟⎠

⎞⎜⎜⎝

⎛+

+=β

Ch5-38

Amplifier Example VII

( )( )1 11 +++= βπ eqEin RRrR

( )1

11 1

21 ⎟⎟

⎞⎜⎜⎝

⎛+

++++=β

βπB

mE

Rg

Rr

1 2

2

++=

+=

B

eqCout

RR

RRR

11

2

1

++

+++=β

B

mC

RR

gR

111

11

1

+++

+++

−=

β

βB

E

mC

v RR

gR

A

123 +βmE

m gg

Ch5-39

Summary

ImpedancesImpedances

Ch5-40

Summary

BJT AmplifiersBJT Amplifiers

)||( rRgA )||(RA + ERA =

)||(

)||(

in

oCmv

rRRrR

rRgA

==−=

π 1)||(

in

oCmv

gR

rRgA

=

+≈

)1(/1

Ein

Emv

RrRRg

A

++=+

=

βπ)||( oCout rRR =)||( oCout

m

rRRg

= )||1( Em

out Rg

R =

Ch5-41

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