chapter 2 รูปแบบของข้อมูลในคอมพิวเตอร์ data...

Fundamental ofComputer Architecture

By Panyayot [email protected]

240-208

November 01, 2003

240-208 Fundamental of Computer Architecture Chapter 2 - Data Representation in Computer 2

Chapter 2รูปแบบของขอ้มูลใน

คอมพวิเตอร์Data representation

in computer


เน้ือหา

รูปแบบการจดัเก็บขอ้มูลลงบนคอมพวิเตอร์ตัวเลขฐานสองแบบมเีครื่องหมายOverflow ของการกระทำาทางคณิตศาสตรข์องตัวเลข

เลขทศนิยมแบบ Fixed-Point เลขทศนิยมแบบ Floating-Point

การกระทำาทางคณิตศาสตรกั์บเลขทศนิยมแบบFloating-Point


Number representation

ลองพจิารณาตัวเลข

เมื่อ bi 0= หรอื1 j

ค่าของ B หาได้จาก

B = b -1n .....b1b0

10 ni

Value of B = b-1 1 2x -1 1

+ .... + b1 12 1 + b 0 12 0


Binary, signed-integer

representations ตัวเลขฐานสองB ค่าของB ในระบบเลขต่างๆb3b2b1b0 Sign and magnitude 1’s complement 2’s complement0111 +7 +7 +70110 +6 +6 +60101 +5 +5 +50100 +4 +4 +40011 +3 +3 +30010 +2 +2 +20001 +1 +1 +10000 +0 +0 +01000 -0 -7 -81001 -1 -6 -71010 -2 -5 -61011 -3 -4 -51100 -4 -3 -41101 -5 -2 -31110 -6 -1 -21111 -7 -0 -1


Addition/Subtraction of Signed numbers

2’s complement is themmmm mmmmmmmmm mmmmmm0010

00110101

(+ 2)(+ 3)(+ 5)

101111101001

(-5)( -2)( -7)

11011001????

( -3)( -7)(+ 4)

110101110100

(-3)(+7)(+4)



m mm mmmm m mmmm : 2 ’

mmm mmmm mmm m mmm subtrahend1101

0100????

( -3)(+ 4)( -10)

110111001001

(-3)( -4)( -7)



A

B 2'com plem ent

adder

'1' w hen +'0' w hen -


Overflow in Integer arithmetic

-mmm mmmmmm mmm mmm 4 -ranges from 8 ...+7

t he r esul t f r omaddi t i on 7more than + or less than

- mmmmmmmm mmmmmmmm8 ,

Overflow

11010111????

( -3)(+ 7)( -10)

110110010110

(-3)( -7)(+ 6)


Overflow Overfolow detection rules:

1. Overflow can occur only 2when adding numbers that h

mmm mmm mmmm mmmm mmmmmm m mmm mm 2 . ,

mmmmmmmm mmmmmm mmmm mmm mmmm mm mmmmmm mm mmm mmm mmmm mm mmm mmmm mm m mmm m

Xs

Y s

Rs

+O v = (XS Y S RS) (XS Y S RS)+


Number representation

We always representa number in th e 2 ’s complementsystem

4bit -8 7...+ mmm8 -128127 16 bit

-32768 32767....+32 bit

- 2147483648 21.... +47483647


Sign extension 2To represent ’s

mmmmmmmmmm mmmmmm mmmmmm mmmmm mmmmm mmmmmm mm mmmmm mmmmmm mmm ,mmmm mmmm mm mmmm mmmmm mm

needed t o t he l ef t forexample: conver t 4bi t s t o 8bi t s

- 1001 7( )-11111001 7( )


Characters ASCII : American Standard Code for

Information Interchange

ที่มาของรูป

--

0127

http://www.jimprice.com

/ascii.gif


Memory location and Addresses

Memory consists of many millions of storage cells,each of which can store a bit of information (0/1)

memory is organized into a group of n bits can be stored or retrieved in a single, basic operation

Each group of n bits is referred to as a word of information


Memory location and Addresses

Bit, byte, word A unit of 8 bit is called byte Word length typically ranges from 16 to 64 bits

CPU access data in memory for 1 word at a time

n b its

1st w ord

2nd w ord

3rd w ord

last w ord

::


Word - 32 bit word can store

- 32 2bit ’s complementmmmmmm

mmmm mmmmm mmmmmmmmmmb31 b0b1

asciicharacter

8 b itsascii

character

8 b itsascii

character

8 b itsascii

character

8 b its

32 b its


Memory accessing Toaccess the memory,addresses

foreach memory location is requi red

Addresses range from 0 through2 - 1k 2for m mmmmmmm mmmmm

- 24 bit address generates addr essspace of 2 24 or1 6 ,7 7

7 ,2 1 6 locations.


Byte addressable memory

most modern computer have successive addresses refer to successive byte location in the memory

Byte locations have address 0,1,2,3.....

Successive words are located at addresses 0,4,8,12,.... (for 32-bit machine)


- -Big Endian and Little Endian assignments

2 ways to assign byte address across words

0 1 2 34 5 6 7

2-4k 2-3k 2-2k 2-1k

:::

byte addressw ord address2-4k

big endian

3 2 1 07 6 5 4

2-1k 2-2k 2-3k 2-4k

:::


little endian

400

4


Little endian VS Bigendian

20H1FH53H9AH

big-endian little-endian

9AH53H1FH20H0

123456

0123456

: 201F539AHข อ้ ม ูล ท ี่เ ก ็บ


Little endian VS Bigendian

20H1FH53H9AH

big-endian little-endian9AH53H1FH20H

0123456

0123456

: 201F539AHข อ้ ม ูล ท ี่เ ก ็บ


Word alignment For Example: keeping value 201F539AH in memory20 1F 53 9A

:::


20 1F 539A

:::


400

4

aligned address unaligned address


Fixed-point number

F(B) - = ( b 0 2x 0 )+ (b- 1 12 -1)+(b-

2 12 -2 )+... + (b- - 1(n ) 12 - -1(n ))

B = b0.b-1b-2.....b-

(n-1)

-1 -(1 2- -1(n ))

F

Sign bit


Fixed-point number

F(B) - = ( 1 2x 0 )+ (1 12 -1)+(0 12 -2)+(0

12 -3)+(1 12 -4)+(0 12 -5)+(1 2x -6)+(1 12 -7)

=-1+05 +0+0+00625 +0+001.5625+00078125

= -04140625

F(B) =1.1001011


Fixed-point number - 32 bit, signed, fixed point represen

45t value range approximately .5*10- 10 1to

mmmm mm mmm mmm mmmmmmm mmm mmmmmmmm mm caclulation such as

mmmmmm’6 .0 2 4 7 * 1 0 23 m mmm -1

mmmmmmmm’66254*10. -27 mmm m

.


Floating-point number General form for floating point

number in decimal system +X1.X2X3X4X5X6X7*10+Y1Y2

When the decimal point is placed to the right of the first(nonzero) significant digit, the number is said to be normalized

Significant digitsexponent


IEEE standard floating-point format

E ' MS

32 b its

Sign bit 8-bit signed exponent

in excess-127 representation

23-bit mantissa fraction

Value represented = + 1.M x 2 E’-127


IEEE standard floating-point format

E ' MS

32 b its

E =signed exponent E’ = E + 127

1< E’ < 254, 0 and 255 are used to represent special values-126 < E < 127

Value represented = + 1 2.M x E


Special Values

E ' MS

32 b its

E’ = 0 and M = 0 -----> 0E’ = 255 and M = 0 ----->

E’ = 0 and M ≠ 0 -----> denormal number E’ = 255 and M ≠ 0

-----> NaN (not a number)


00101000 0010110....... 10 .

1.0010110….1 x 2-87

- floating point format : Example


10001000 0010110.......0 .

0 0010110 2. …. x 9

Normalized vs unnormalized value

Unnormalized value


10000101 0110.......0 .

1 0110 2. …. x 6

Normalized vs unnormalized value

Normalized value


Floating-point Add/Subtract rule

1. Choose the number with the smaller exponent and shift its mantissa right a number of steps equal to the difference in exponents

2. Set the exponent of the result equal to the larger exponent

3. Perform addition/subtraction on the mantissas

4. Normalize the resulting value, if necessary


Floating-point Add/Subtract:Exampl

e

2.9400 x 102 + 4.3100 x 104

= 0.0294 x 104 + 4.3100 x 104

= 4.3688 x 104


Floating-point Multiply rule

1. Add the exponents and subtract 127

2. Multiply the mantissas and determine the sign of the result



Floating-point Multiply:Example

2.9400 x 102 x 4.3100 x 104

= (2.9400 x 4.3100) x 10 (2+4) = 12.6714 x 106

= 1.26714 x 107


Floating-point Divide rule

1. Subtract the exponents and add 127

2. Divide the mantissas and determine the sign of the result



Floating-point Divide:Example

4.3100 x 104 ÷ 2.9400 x 102 = (4.3100 ÷ 2.9400) x

10 (4-2) = 1.46598… x 102


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