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© M. Bucher MOSAK, 1112 April 2013, TU Munich 1 MOSAK Mee;ng, Technical University of Munich Munich, April 1112, 2013 Compact Modelling of HVMOSFETs MaKhias Bucher 12 , Nikos Mavredakis 1 Antonios Bazigos 2 , François Krummenacher 2 , JeanMichel Sallese 2 1 Technical University of Crete 2 École Polytechnique Fédérale de Lausanne

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Page 1: CompactModellingofHVMOSFETs - mos-ak.orgmos-ak.org/munich_2013/presentations/12_Matthias_Bucher_MOS-A… · ©"M."Bucher" MOS-AK,"11-12"April"2013,"TU"Munich" 18" (( )) 2 4 222 _

©  M.  Bucher   MOS-­‐AK,  11-­‐12  April  2013,  TU  Munich   1  

MOS-­‐AK  Mee;ng,  Technical  University  of  Munich        Munich,  April  11-­‐12,  2013    

 Compact  Modelling  of  HVMOSFETs  

MaKhias  Bucher12,  Nikos  Mavredakis1  Antonios  Bazigos2,  François  Krummenacher2,  Jean-­‐Michel  Sallese2  

1Technical  University  of  Crete  2École  Polytechnique  Fédérale  de  Lausanne  

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COMON  project  –  HVMOS  modelling  WG  

●  Development  /  Implementa;on  of  a  full  compact  model  for  High-­‐Voltage  MOSFET  

●  Key  partners  ○  EPFL:    EPFL-­‐HV  MOSFET  compact  model  

○  ams:  technology  supplier/model  user  

○  TUC:  1/f  noise  model  development  

○  AdMOS:  1/f  noise  measurement  equipment  

○  Dolphin  Integra;on:  Verilog-­‐A  code  compiler,  simulator  vendor  (SMASH)  

©  M.  Bucher   MOS-­‐AK,  11-­‐12  April  2013,  TU  Munich   2  

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COMON  project  –  HVMOS  publica;ons  ●  Modelling  of  the  dria  region  of  the  HVMOSFET  

○  A.  Bazigos,  F.  Krummenacher,  J.-­‐M.  Sallese,  M.  Bucher,  E.  Seebacher,  W.  Posch,  K.  Molnar,  M.  Tang,  “A  Physics-­‐Based  Analy1cal  Compact  Model  for  the  Dri;  Region  of  the  HV-­‐MOSFET”,  IEEE  Trans.  on  Electron  Devices,  Vol.  58,  N°  6,  pp.  1710-­‐1721,  June  2011.    

●  RF  modelling  of  the  HVMOSFET  

○  A.  Bazigos,  F.  Krummenacher,  J.-­‐M.  Sallese,  M.  Bucher,  E.  Seebacher,  W.  Posch,  K.  Molnar,  M.  Tang,  “RF  Compact  Modeling  of  High-­‐voltage  MOSFETs”,  IETE  Journal  of  Research,  Vol.  58,  N°  3,  p.  214-­‐221,  May-­‐June  2012.  

●  1/f  noise  modelling  of  the  HVMOSFET  

○  N.  Mavredakis,  M.  Bucher,  R.  Friedrich,  A.  Bazigos,  F.  Krummenacher,  J.-­‐M.  Sallese,  T.  Gnei;ng,  W.  Pflanzl,  E.  Seebacher,  “Measurement  and  Compact  Modeling  of  1/f  Noise  in  HV-­‐MOSFETs“,  IEEE  Trans.  Electron  Devices,  Vol.  60,  N°  2,  pp.  670-­‐676,  Feb.  2013.  

©  M.  Bucher   MOS-­‐AK,  11-­‐12  April  2013,  TU  Munich   3  

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Outline  

●  Development  of  an  HV-­‐MOS  compact  model  o  Dria  region  accoun;ng  for  velocity  satura;on  

o  TCAD  verifica;ons  

●  Extensions  for  RF  

●  Extensions  for  1/f  noise  o  Verified  the  model  against  measurements  on  many  HVMOS  technologies  from  ams  

©  M.  Bucher   MOS-­‐AK,  11-­‐12  April  2013,  TU  Munich   4  

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high-­‐voltage  part    dria  region  

n  

low-­‐voltage  part    inner  MOS  p  

©  M.  Bucher   MOS-­‐AK,  11-­‐12  April  2013,  TU  Munich  

●  HV-­‐MOS:  2  parts  ○  Connec;ng  point:  ‘K’  ○  Doping  changes  type  ○  Between  channel  and  dria  

●  Low-­‐voltage  part  [1]  ○  inner  MOSFET    

●  inner  drain  is  ‘K’  

●  High-­‐voltage  part  [2]  ○  Dria  region  

● A  physics-­‐based  model  

Substrate  

Source  

Gate   Drain  K  

HV-­‐MOS    macromodel  

LDMOS    TCAD:  2D  doping  profile    

[1]  Y.  Chauhan,  F.  Krummenacher,  R.  Gillon,  B.  Bakeroot,  M.  Declercq,  and  A.  Ionescu,  “Compact  Modeling  of  Lateral  Nonuniform  Doping  in  High-­‐Voltage  MOSFETs,”  IEEE  Trans.  Electron  Devices,  vol.  54,  No.  6,  pp.  1527–1539,  June  2007.  

[2]  A.  Bazigos,  F.  Krummenacher,  J.-­‐M.  Sallese,  M.  Bucher,  E.  Seebacher,  W.  Posch,  K.  Molnár  and  M.  Tang,  “A  physics-­‐based  analy1cal  compact  model  for  the  Dri;  region   of   the   HV-­‐MOSFET”   IEEE   Trans.   Electron   Devices,   Vol.   58,   No.   6,   pp.  1710-­‐1721,  June  2011.  

Typical  structure  of  HV-­‐MOS  

5  

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©  M.  Bucher   MOS-­‐AK,  11-­‐12  April  2013,  TU  Munich  

●  HV-­‐MOS:  2D  problem  ○  Split  into  2  axes  

○  x-­‐axis:  inner  MOS    ●  Source  to  ‘K’  

○  y-­‐axis:  DRIFT  region  ●  ‘K’  to  Drain  

●  Simplified  HV-­‐MOS:      two  1D  problems  ○  Solu;on  possible  

high-­‐voltage  part    dria  region  

low-­‐voltage  part    inner  MOS  

From  “1×2D”  to  “2×1D”  

6  

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©  M.  Bucher  3  

MOS-­‐AK,  11-­‐12  April  2013,  TU  Munich  

Model  vs.  TCAD  simula;ons:  ID  vs.  VG  

Device: LDMOS L = 500nm W = 1um Tox = 15nm VDS = {0.1, 1.0, 5.0, 70.0}V VSB = 0V

7  

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©  M.  Bucher   MOS-­‐AK,  11-­‐12  April  2013,  TU  Munich  

Model  vs.  TCAD  simula;ons:  ID  vs.  VD  

Device: LDMOS L = 500nm W = 1um Tox = 15nm VGS = {1.0, 2.0, 5.0}V VSB = 0V

8  

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©  M.  Bucher   MOS-­‐AK,  11-­‐12  April  2013,  TU  Munich  

DC  measurements:  ID  vs.  VG,VDS=0.1V  

Device: LDMOS L = 400nm W = 40um Tox = 15nm VDS = 100mV VSB = {0.0, 0.4, 0.8, 1.2, 1.6}V

9  

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©  M.  Bucher   MOS-­‐AK,  11-­‐12  April  2013,  TU  Munich  

DC  measurements:  ID  vs.  VG,VDS=35V  

Device: LDMOS L = 400nm W = 40um Tox = 15nm VDS = 35V VSB = {0.0, 0.4, 0.8, 1.2, 1.6}V

10  

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©  M.  Bucher   MOS-­‐AK,  11-­‐12  April  2013,  TU  Munich  

DC  measurements:  ID  vs.  VD  

Device: LDMOS L = 400nm W = 40um Tox = 15nm VGS = {1.0, 1.5, 2.0, 2.5, 3.0, 3.5, 4.0, 4.5, 5.0, 5.5}V VSB = 0.0V

11  

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Dynamic  MacroModel  Extrinsic  parasi;cs  

©  M.  Bucher   MOS-­‐AK,  11-­‐12  April  2013,  TU  Munich   12  

Scalable  Gate  Resistance  

Scalable,  Bias-­‐Independent  Overlap  Capacitances  

Asymmetrical  Junc;on  Diodes  

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RF  measurements  Y-­‐Parameters,  real  /  imaginary  part  

©  M.  Bucher   MOS-­‐AK,  11-­‐12  April  2013,  TU  Munich   13  

Device: LDMOS L = 500nm W = 40um Tox = 15nm VDS = {0.0, 30.0}V VSB = 0.0V F = 1.2GHz

A.  Bazigos,  F.  Krummenacher,  J.-­‐M.  Sallese,  M.  Bucher,  E.  Seebacher,  W.  Posch,  K.  Molnar,  M.  Tang,  “RF  Compact  Modeling  of  High-­‐Voltage  MOSFETs”,  IETE  Journal  of  Research,  Volume  58,  Nr.  3,  pp.  214-­‐221,  2012.    

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RF  parameter  extrac;on  

©  M.  Bucher   MOS-­‐AK,  11-­‐12  April  2013,  TU  Munich   14  

Device: LDMOS L = 500nm W = 40um Tox = 15nm VDS = {0.0, 30.0}V VSB = 0.0V F = 1.2GHz

11G 2

11

Re(Y )RIm(Y )

=

RG  on/off  

11GG

Im(Y )C2 f

12GD

Im(Y )C2 f

21DG

Im(Y )C2 f

22DD

Im(Y )C2 f

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●  Low  frequency  noise  under  high-­‐voltage  condi;ons:  largely  unexplored.  Does  the  dria  region  contribute  to  LFN?  ○  Usual  approach:  use  LFN  models  of  ‘LV’  part  of  HVMOSFET  models,  adapted  to  LFN  data  under  “LV”  condi;ons.  

●  Difficulty  of  measuring  LFN  under  high  VDS  –  no  adequate  equipment  (typically  <5V)  

●  New  measurement  setup  developed  by  AdMOS:  can  measure  LFN  of  HVMOSFETs  up  to  200V!  

1/f  noise  in  HV-­‐MOSFETs:  what  happens??  

©  M.  Bucher   15  MOS-­‐AK,  11-­‐12  April  2013,  TU  Munich  

○  N. Mavredakis, M. Bucher, R. Friedrich, A. Bazigos, F. Krummenacher, J.-M. Sallese, T. Gneiting, W. Pflanzl, E. Seebacher, “Measurement and Compact Modeling of 1/f Noise in HV-MOSFETs“, IEEE Trans. Electron Devices, Vol. 60, N° 2, pp. 670-676, Feb. 2013.

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1/f  Noise  in  HV-­‐MOSFETs  

•  Noise  spectra  measured  at  high  VDS  =  50V  o   long/short,  HVNMOS,  HVPMOS  –  20V,  50V  HVMOS  devices  

•  Noise  in  LV  part  is  affected  by  Dria  region:  e.g.  due  to  quasi-­‐satura;on  effect  changing  VK  

©  M.  Bucher   MOS-­‐AK,  11-­‐12  April  2013,  TU  Munich   16  

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●  Total  LFN  is  the  sum  of  LV  part  LFN,  plus  Dria  part  LFN  

●  Combina;on  of  Number  (ΔΝ)  and  mobility  (Δμ)  fluctua;on    

Low  frequency  noise  model  in  HV-­‐MOS  

©  M.  Bucher   17  MOS-­‐AK,  11-­‐12  April  2013,  TU  Munich  

2 2 2 2

2 2 2 2

_ _ _

D D D DI I I I

D D D DLV LV DRIFT

S S S S

I I I Iµ

Δ Δ Δ Δ

ΔΝ Δ ΔΝ

= + +

○  N. Mavredakis, M. Bucher, R. Friedrich, A. Bazigos, F. Krummenacher, J.-M. Sallese, T. Gneiting, W. Pflanzl, E. Seebacher, “Measurement and Compact Modeling of 1/f Noise in HV-MOSFETs“, IEEE Trans. Electron Devices, Vol. 60, N° 2, pp. 670-676, Feb. 2013.

Due to LV channel (ΔN and Δµ) Due to Drift region (ΔN)

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Low  frequency  noise  model  for  HV-­‐MOS  

©  M.  Bucher   18  MOS-­‐AK,  11-­‐12  April  2013,  TU  Munich  

( )( )

24

2 2 2

_

2

220

0.51 2ln2 1 21 0.5

2

DI t

D oxLV

Cs d c

d c

Cd s kC s k k d c

S q NI kTWLn C f

q iii q qq q q i

λλ

λ

λ

λαµ αµ

λλ

Δ

ΔΝ

=

⎡ ⎤⎛ ⎞+ −⎢ ⎥⎜ ⎟ ⎛ ⎞+ +⎢ ⎥⎜ ⎟ ⎜ ⎟+ + ⎝ ⎠+ −⎢ ⎥⎜ ⎟+ −⎢ ⎥⎝ ⎠⎣ ⎦

( ) ( )2 2

0 0,

1 ( ) c

s s k kd c d d c

c s k

q q q qi i i

q qλ λ λλ =

+ − += =

+ −

( )2 T

CCN eff clm

UE L L

λ =−Δ

Carrier Number Fluctuations (LV)

( ) ( )( )

2

2

_

ln /1 1

2DI s kH

s kD ox s kLV

S q qk na q qI WLC f q q

µ

Δ

Δ

⎡ ⎤Τ= + + +⎢ ⎥

−⎣ ⎦Mobility

Fluctuations (LV)

(Dependent on qs, qk)

( )2

4_

2 2

_

1 ln 1 22

DI t DRIFTk

D OVD ox driftN DRIFT

S q Nq

I kTWL C f iλΔ

Δ

= ⋅ +

(Dependent only on qk)

Carrier Number Fluctuations (Drift)

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1/f  Noise  in  HV-­‐MOS  vs.  bias  –  long  channel  

1/f  noise  vs.  ID  for  50V  HVNMOS.  

W=40um,  L=10um.  

VDS  =  50mV,  50V.  

©  M.  Bucher   MOS-­‐AK,  11-­‐12  April  2013,  TU  Munich   19  

SΔVG SΔID

G

S B

D

S B

D

G

SΔID = gm2 SΔVG

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1/f  Noise  in  HV-­‐MOS  vs.  bias  –  short  channel  

1/f  noise  vs.  ID  for  50V  HVNMOS.  

W=40um,  L=0.5um.  

VDS  =  50mV,  20V,  50V.  

Single  model  @all  geometries,  bias.  

Comparable  results  for  HVPMOS.  ©  M.  Bucher   MOS-­‐AK,  11-­‐12  April  2013,  TU  Munich   20  

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LFN  model  vs.  bias  and  geometry  

©  M.  Bucher   MOS-­‐AK,  11-­‐12  April  2013,  TU  Munich   21  

40um

/0.5

um

HV

NM

OS

(50V

)

40u

m/1

0um

40um/10um

HV

PM

OS

(50V) 40um

/1um

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Analysis  of  different  LFN  contribu;ons  •  Different  contribu;ons  to  LFN.    

•  Dominant  LV  channel  noise:  

o  ΔN  at  high  VG,  for  short  devices  (small  geometry),  and  @  high  VD  (high  gm)  

o  Δμ  @  low  VG  

•  Dria  region  LFN  becomes  significant:  

o  For  long  channel  (large  geometry  channel)...    

o  ....  and  @  low  VD,  hence  the  dria  region  LFN  becomes  significant  w.r.t.  the  channel  noise.  

©  M.  Bucher   MOS-­‐AK,  11-­‐12  April  2013,  TU  Munich   22  

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●  A  complete  HVMOS  compact  model  has  been  developed.  o  Physics-­‐based  model  for  the  dria  region.  

o  Combined  with  a  charge-­‐model  approach  for  the  LV  part  of  the  device.  

o  Covers  all  essen;al  effects  in  HVMOS.  

●  Extensions  for  RF  have  been  demonstrated.  

●  LFN  measurements  under  high-­‐voltage  condi;ons.  o  Dria  region  contributes  to  LFN:  par;cularly  long-­‐channel,  low  VDS.  

o  First  complete  LFN  compact  model  with  contribu;on  from  dria  region.  

Conclusions  

©  M.  Bucher   23    MOS-­‐AK,  11-­‐12  April  2013,  TU  Munich  

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Thank  you  for  your  aKen;on  

●  Special  thanks  to:    

©  M.  Bucher   MOS-­‐AK,  11-­‐12  April  2013,  TU  Munich   24