gigatracker working group meeting status of the gtk_carrier 2015 24/03/2015
TRANSCRIPT
GigaTracker Working Group meeting
Status of the GTK_carrier 2015
24/03/2015
• GTK_carrier 2015: 2 proposals
1. Thinner countersink2. Stairway to bonding area
• Summary
24/03/2015GigaTracker Working Group meeting M.Morel 2
GigaTracker Working Group meeting M.Morel
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Top Layer 40µmSolder mask Top
Isola 55µmGND1 15µm
Stripline1 15µmIsola 160µm
Isola 55µmGND2 15µmIsola 160µm
Power supply1 30µmIsola 55µm
600µm
GTK_carrier 2015 cross section14 Layers PCB
Power supply2 30µmIsola 55µm
Power supply3 30µmIsola 160µm
Power supply4 30µmIsola 160µmGND3 30µm
Power supply5 30µmIsola 160µmGND4 30µmIsola 160µmStripline2 15µm
Isola 160µm
GND5 15µmIsola 55µmBottom Layer 25µm
Solder mask Bottom
Isola 160µm
CuIsola 408HRCoverlay
1400µm
Countersink area 14.5mm
5 x GND layers5 x PS layers4 x signals layers
GNDVDDAVDDSig2Sig1
PCB
Micro-cooling plate
sensorTDCpix
Frame
GigaTracker Working Group meeting M.Morel
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GTK_carrier SOMACIS production 2014
GND Top layer is cut down to 200µm
GigaTracker Working Group meeting M.Morel
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Top Layer 40µmSolder mask Top
Isola 55µmGND1 15µm
Stripline1 15µmIsola 160µm
Isola 55µmGND2 15µmIsola 160µm
Power supply1 30µmIsola 55µm 85µ
m
GTK_carrier 2015 cross section14 Layers PCB
Power supply2 30µmIsola 55µm
Power supply3 30µmIsola 160µm
Power supply4 30µmIsola 160µmGND3 30µm
Power supply5 30µmIsola 160µmGND4 30µmIsola 160µmStripline2 15µm
Isola 160µm
GND5 15µmIsola 55µmBottom Layer 25µm
Solder mask Bottom
Isola 160µm
CuIsola 408HRCoverlay
1400µm
Countersink area
5 x GND layers5 x PS layers4 x signals layers
GND
VDDAVDD
Sig3Sig2
24/03/2015
Sig1
70µm
445µm
GTK_carrier 2015 equipped with the cooling plate and the detector view
380µmCooling plate version 2015
24/03/2015GigaTracker Working Group meeting M.Morel
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Stiffener
GigaTracker Working Group meeting M.Morel
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Layout modified on TDCpix #0
24/03/2015GigaTracker Working Group meeting M.Morel 8
GigaTracker Working Group meeting M.Morel
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GTK_carrier 2015
GigaTracker Working Group meeting M.Morel
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• The stack up of the GTK_carrier 2015 will be more symmetric so we expect improvement in the flatness.
• In order to solve the problem of the startup of PLL, we added 560µF/2.5V Polymer Aluminium capacitors close to the TDCpix and 5600µF/6V3 Electrolytic Aluminium capacitors in the portion located inside the vessel.
The mode_block_mux of each TDCpix is now selectable by the I²C bus.
• An optical reset is now available.
• The thickness of the countersink could be reduced to 600µm. The connections to Power Supplies and GND planes could be operate on a stairway created along the bonding area. These possibilities need to be confirm:
- By PH/DT’s team- By The manufacturer of printed circuit board SOMACIS in March
31.
Summary