Upload File

lab1_huong dan thiet ke bang verilog tren quartus ii_v2

  • Home
  • Documents
  • Lab1_Huong Dan Thiet Ke Bang Verilog Tren Quartus II_v2
13
Thực hành: Thiết kế Vi mạch với HDL (CE221) ThS. Nguyễn Thanh Sang Page 1 Bài 1. HƯỚNG DẪN THIẾT KẾ BẰNG NGÔN NGỮ VERILOG TRÊN PHẦN MỀM QUARTUS_II I. Mục tiêu Trong bài thực hành này, sinh viên sẽ được hướng dẫn các bước để thiết kế và mô phỏng một mạch đơn giản bằng ngôn ngữ Verilog trên phần mềm Quartus_II của Altera. II. Nội dung thực hành 1. Tạo một project trong Quartus II

Upload: allthelife-kim-chi

Post on 28-Sep-2015

41 views

Category:

Documents


8 download

Report

DESCRIPTION

Huong Dan Thiet Ke Bang Verilog Tren Quartus II

TRANSCRIPT

  • Thc hnh: Thit k Vi mch vi HDL (CE221)

    ThS. Nguyn Thanh Sang Page 1

    Bi 1. HNG DN THIT K BNG NGN NG VERILOG

    TRN PHN MM QUARTUS_II

    I. Mc tiu

    Trong bi thc hnh ny, sinh vin s c hng dn cc bc thit k v m phng

    mt mch n gin bng ngn ng Verilog trn phn mm Quartus_II ca Altera.

    II. Ni dung thc hnh

    1. To mt project trong Quartus II

  • Thc hnh: Thit k Vi mch vi HDL (CE221)

    ThS. Nguyn Thanh Sang Page 2

  • Thc hnh: Thit k Vi mch vi HDL (CE221)

    ThS. Nguyn Thanh Sang Page 3

    2. Thit k mt mch s n gin (cng XOR) bng ngn ng Verilog

    Vo File New

  • Thc hnh: Thit k Vi mch vi HDL (CE221)

    ThS. Nguyn Thanh Sang Page 4

    C th Add mt file c sn vo Project

  • Thc hnh: Thit k Vi mch vi HDL (CE221)

    ThS. Nguyn Thanh Sang Page 5

  • Thc hnh: Thit k Vi mch vi HDL (CE221)

    ThS. Nguyn Thanh Sang Page 6

    3. Bin dch thit k

    Chn bin dch nhanh kim tra kh nng Analysis & Synthesis ca thit k

    Hoc:

  • Thc hnh: Thit k Vi mch vi HDL (CE221)

    ThS. Nguyn Thanh Sang Page 7

    Bin dch khi b li (Error) v sa li:

    Hon tt qu trnh bin dch

  • Thc hnh: Thit k Vi mch vi HDL (CE221)

    ThS. Nguyn Thanh Sang Page 8

    Xem mch thit k c tng hp (Synthesis) bng phn mm Quartus II cho chip Cyclone II

    4. M phng thit k bng Vector Waveform

    Tham kho ti link: http://www.altera.com/education/univ/software/qsim/unv-qsim.html

    Chn version Quartus ph hp v download cc file Introduction to Quartus Simulation

    v University Program Installer

    Kt qu m phng trn Qsim vi Quartus II, version 11.1 Build 173

    Function simulation

  • Thc hnh: Thit k Vi mch vi HDL (CE221)

    ThS. Nguyn Thanh Sang Page 9

    Timing simulation

    5. Gn chn (pin) cho thit k

    Cch 1: gn th cng

  • Thc hnh: Thit k Vi mch vi HDL (CE221)

    ThS. Nguyn Thanh Sang Page 10

    Ch : tham kho file DE2_pin_assignments tm tn pin chnh xc

    Cch 2: gn chn t ng

    Sa li tn port in/out/inout ca thit k sao cho cc tn ny trng vi tn ca cc chn

    trn chip Cyclone II (tham kho file DE2_pin_assignments)

  • Thc hnh: Thit k Vi mch vi HDL (CE221)

    ThS. Nguyn Thanh Sang Page 11

    6. Np thit k xung KIT DE2 v kim chng hot ng

    - Ch JTAG Programing Mode

    + Bt swich RUN/PROG trn kit DE2 v v tr RUN

    + Chn Tool Programmer

  • Thc hnh: Thit k Vi mch vi HDL (CE221)

    ThS. Nguyn Thanh Sang Page 12

    - Ch Active Serial Mode (np EPPROM)

    + Bt swich RUN/PROG trn kit DE2 v v tr PROG

    + Chn Assignment Device Device and Pin options

    + Ti mc Use configuration device chn EPCS16 (h EPPROM trn KIT DE2)

  • Thc hnh: Thit k Vi mch vi HDL (CE221)

    ThS. Nguyn Thanh Sang Page 13

    + Sau khi np KIT xong, chuyn switch RUN/PROG trn kit DE2 v v tr RUN

    + Tt ngun, sau m ngun li v kim tra kt qu.


Verilog Lab5

Dataflow Verilog

Quartus-II 13.0 사용법 - Yonsei Universitycsys.yonsei.ac.kr/lect/emhw/hw-quartus2-13.pdfQuartus-II 13.0 사용법 Verilog Compile, Synthesis & Simulation 1 연세대학교 컴퓨터정보통신

Tutorial Quartus II

Code Verilog

Altera Quartus Tutorial

Hardware Hacken ohne Lötkolben - clifford.at · Einleitung DISCLAIMER Was sind HDLs? Verilog HDL - Hintergrund Verilog HDL - Konzepte (1/4) Verilog HDL - Konzepte (2/4) Verilog HDL

Verilog - Introdução

Lecture Verilog

Quartus VHDL Simulacion

Ambiente Gráfico de Quartus II: Operadores Aritméticoshomepage.cem.itesm.mx/garcia.andres/PDF201411/Quartus II(13.0).pdf · Quartus II Ambiente gráfico: Circuitos Básicos Construcción

Quartus II(9.1)

quartus el kitabı2

Huongdan Quartus

Tutorial Tutorial Verilog - iuma.ulpgc.esnunez/clases-FdC/verilog/Verilog Tutorial v1.pdf · Tutorial Tutorial Verilog Este tutorial pretende ser una guía de aprendizaje para el

[123doc.vn] Huong Dan Thiet Ke So Su Dung Ngon Ngu Verilog Hdl Tren Fpga Bai 1 Docx

Verilog Presentation

Lab 1_Huong Dan Thiet Ke Verilog (Quartus II 7.2)

Intro Verilog

Verilog ppt

Guida Quartus

Verilog Tutorial

Quartus Tutorial001

Verilog Tut

Verilog 뇐뻇뙩군릺 - I-Shou University · 뵳벶ꅇꓽꗟ걶 Outline 1. Introduction 2. Verilog History 3. Design Flow 4. Basics of the Verilog Language 5. Verilog-HDL circuit

Verilog Thai

Verilog Tutorial.pdf

verilog - hw1

Verilog Simulator

PLS Verilog

Verilog Basics

Basic Logic Design with Verilog HDL - 國立臺灣大學media.ee.ntu.edu.tw/...media=verilog:121102...verilog_student_zbt.pdfBasic Logic Design with Verilog HDL ... Write Verilog code

Verilog Class

Stanford Verilog

Verilog HDL.ppt