the electronic design automation (eda) labcc.ee.ntu.edu.tw/~ywchang/eda_lab_slides.pdf ·...

NTUEE 1Y.-W. Chang

The Electronic Design Automation (EDA) Lab

BL-406張耀文

Yao-Wen [email protected]

http://cc.ee.ntu.edu.tw/~ywchangGraduate Institute of Electronics Engineering

Department of Electrical EngineeringNational Taiwan University

NTUEE 2Y.-W. Chang

․Physical design for nanometer IC’s․Design for manufacturability & reliability․Low-power design methodology ․Board-package-chip co-design ․Design automation for biochips

Recent Research Focuses

fabricationphysicaldesign

NTUEE 3Y.-W. Chang

Physical Design Flow

Intel Pentium 4 floorplan

routing

NTUEE 4Y.-W. Chang

Research Topics․Physical Design Engines

– Floorplanning, placement, routing

․Power/Signal Integrity⎯ Low power, IR drop,

Crosstalk․Manufacturability

⎯ RET: OPC, CMP, DPT⎯ Process variation

․Reliability⎯ Antenna effect⎯ Redundant via⎯ Thermal, ESD analysis

Board-package-chip CodesignEDA for biochips

MP-tree based macro placement

Redundant-via insertion OPC

NTUEE 5Y.-W. Chang

People․Current: 9 M.S., 12 Ph.D. students (+1碩士專班)․Alumni/Alumnae: 7 Ph.D., 49 M.S. graduates․畢業工作: EDA, IC 設計, 晶圓製造, 設計服務公司(業界);中央電機, 交大電子 (x2), 南華, 成大電機/資工, 中山資工(學界任教)

NTUEE 6Y.-W. Chang

Sponsors․Currently 10 projects, 7 from industry․Current & Past Sponsors

⎯ Current Projects: Etron (鈺創), NSC (國科會), RealTek (瑞昱), SpringSoft (思源), Synopsys, TSMC (台積電), etc.

⎯ Past Projects: Arcadia, Faraday (智原), Intel, MediaTek (聯發科), MOE, NSC (國科會), Quanta (廣達), RealTek (瑞昱), SpringSoft (思源), TSMC (台積電), UMC (聯電)

⎯ Scholarships: Cadence, Incentia, SpringSoft, Synopsys, TSMC․Budget: 9+ Million NTD per year dedicated for the lab

NTUEE 7Y.-W. Chang

Highlights on Some Honors․#1 in the world in 2007 & 2008 IEEE TCAD /

DAC / ICCAD (& 2006 ICCAD) paper counts– Top journal: TCAD (7 papers in 2007, 10+

in 2008)– Top conferences: DAC (4 in 2007; 5 in

2008), ICCAD (6; 4) (2006 ICCAD: 4)․#1 in 2007 & 2008 best paper

nominations/award in top conferences⎯ 7 papers: DAC (2), ICCAD (2), ISPD (3)

․Sole winner of both of the ACM ISPD Placement (2006) & Global Routing (2008) Contests

․Best paper awards at the 2007 & 2008 VLSI Design/CAD Symp.⎯ Received all EDA best paper awards from

the symp. after 1996 (one more in 2000)․MOE IC/CAD contests: 40% 1st Prizes, 33% all awards since 2002

NTUEE 8Y.-W. Chang

Top-Conference Publications․Published the most DAC/ICCAD papers in the recent 3

years

92352008 (DAC + ICCAD)

61862006 (DAC + ICCAD)102742007 (DAC + ICCAD)

4752005 (DAC + ICCAD)2672004 (DAC+ICCAD)

41

446

Japan

242003 (DAC+ICCAD)

3690Total

222002 (DAC+ICCAD)132001 (DAC+ICCAD)

EDA LabTaiwan*Year

* Considerfirst authors only

NTUEE 9Y.-W. Chang

International Honors․1st Place at the 2007 ACM CADathlon Contest (a.k.a.

EDA Olympia)

NTUEE 10Y.-W. Chang

Domestic Honors․台大電機所CS組碩士甄試入學第一名 (2003, 2004, 2007)․台大電子所EDA組碩士甄試入學第一、二、三名 (2005)、碩士甄試入學第一、

二名(2007) 、博士入學第一(2005, 2007)․台大電子所EDA組博士班第一名 (2007, 2008)․台大電子所EDA組碩士成績第一、二名 (2006, 2008)․台大電子所ICS組博士班直升第一、二名 (2004)․台大電機學群各研究所 350+ 碩一學生成績第一、二名 (2004, 2005)․最佳論文獎 , VLSI Design/CAD Symposium (2000, 2007, 2008; 全部EDA最佳

論文獎 )․台灣大學教學優良獎 (2004, 2006, 2007, 2008)․首屆研究成就獎 (2004)․旺宏電子青年教授講座 (2005)․國科會傑出研究獎 (2007)․國科會吳大猷紀念獎 (2004)․思源科技教育基金會 DAC論文獎 (2003, 2004, 2005, 2006, 2007, 2008)․科林論文獎(Lam Thesis Award) (2002, 2003, 2005, 2007)․資訊學會博士論文獎 (2002, 2005)․沈文仁教授年度論文獎 (2002首屆)․電機工程學會青年論文獎 (1998, 2002, 2005, 2007:第一名 )․國科會碩士論文獎 (2002首屆)

NTUEE 11Y.-W. Chang

International Service: Journals․Editorial boards of international journals

⎯ IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (1/2008--)

⎯ Journal of Information Science and Engineering (1/2007--)

NTUEE 12Y.-W. Chang

International Service: Conferences․Currently serve on ICCAD-2008 Executive Committee and

ACM/SIGDA Physical Design Technical Committee․Have served on 12 ACM/IEEE TPC’s, including 5 TPC’s of the

most important conferences in EDA/physical design⎯ IEEE/ACM Int. Conf. Computer-Aided Design (ICCAD)⎯ ACM/IEEE Design Automation Conference (DAC)⎯ ACM Int. Symp. Physical Design (ISPD; organizing committee)⎯ ACM/IEEE ASP-DAC (Topic Chair)⎯ ACM/IEEE Design Automation and Test Conf. in Europe (DATE)

NTUEE 13Y.-W. Chang

B*-tree Based Floorplanner (Project with思源)

By Tung-Chieh Chen

NTUEE 14Y.-W. Chang

Chip Floorplanning (Project with Intel)

Intel Pentium 4

An Intel floorplanand its

interconnections

NTUEE 15Y.-W. Chang

842K movable cells 646 fixed macros

868K nets

Chip Placement (Project with 聯發科 & 思源 & 瑞昱)

12,752 cells, 247 macrosAmax/Amin = 8416

ISPD98 ibm01

Wires are not shown here!!

NTUEE 16Y.-W. Chang

․GP: 5 levels․#Movable obj.

= 842k․#Fixed obj.

= 646․#Nets = 868k

NTUplace Demo (#1 Academic Placer)

NTUEE 17Y.-W. Chang

Mixed-Sized Placement (with 聯發科 & 瑞昱)

standard cellarea

macro areasplaced by 4 B*-trees

Mchip41.32 million cells + 380 macros

NTUEE 18Y.-W. Chang

Routing for Manufacturability (Project with台積電 & 聯電)

Si substrates g d s g d

․Routing considering nanometer electrical effects⎯ Signal integrity, antenna

effect, redundant via, OPC, PSM

(b) (c)(a)

Routing for OPC

Routing for antenna avoidance

NTUEE 19Y.-W. Chang

Double-Via Insertion (Project with 聯電)

NTUEE 20Y.-W. Chang

CMP (Project with 聯電)

MROR (TCAD’07)

TTR (Ours, ICCAD-07)

• ICCAD-2007 best paper nominee

NTUEE 21Y.-W. Chang

OPC (Projects with 台積電)

Original full-chip layout

Original partial layout

Partial OPCed layout

OPC

• Total EPE (edge placement error): ↓24%; wirelength: ↑1%• DAC-2008 best paper nominee

NTUEE 22Y.-W. Chang

․Voltage partitioning & floorplanning for power and performance optimization

Low-Power Design (Projects with 台積電)

Logic Block 1

(@ 1.0V)Logic

Block 2(@ 1.0V)

Logic Block 3

(@ 1.0V)

Logic Block 5

(@ 1.2V)

Logic Block 4

(@ 1.2V)

LevelShifters

NTUEE 23Y.-W. Chang

Chip-Package-Board Codesign (Project with 智原 & 鈺創)

․Routing for flip-chip design

Flip-chip routing

NTUEE 24Y.-W. Chang

我適合加入EDA實驗室嗎??

EDA LabEDA Lab

動機

高 EQ/Integrity

程式語言

資料結構演算法

邏輯設計英文

NTUEE 25Y.-W. Chang

Thank You for Your Attention!Contact 張耀文 at

辦公室: 博理館 428 (Tel: 3366-3556)實驗室: 博理館 406 (Tel: 3366-3700 # 6406)

CS Quota: 1; EDA Quota: 4

[email protected]://cc.ee.ntu.edu.tw/~ywchang

the electronic design automation (eda) labcc.ee.ntu.edu.tw/~ywchang/eda_lab_slides.pdf ·...

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