微波電路期中報告

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微微微微微微微微 微微微微 : A High Efficiency and Low Rx-Noise Three Power ModePower Amplifier for W-CDMA Handsets 微微 Katsuya Kato Naoko Matsunaga Kenichi Horiguchi Morishige Hieda and Kazutomi Mori Mitsubishi Electric Corporation 5-1-1 Ofuna, Kamakura, Kanagawa, 247-8501 Japan 微微微 : 微微微微 MA130117 微微微 Southern Taiwan University Southern Taiwan University Department of Electronic Engineerin

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微波電路期中報告. 論文 研討 : A High Efficiency and Low Rx-Noise Three Power ModePower Amplifier for W-CDMA Handsets 作者: Katsuya Kato Naoko Matsunaga Kenichi Horiguchi Morishige Hieda and Kazutomi Mori Mitsubishi Electric Corporation 5-1-1 Ofuna, Kamakura, Kanagawa, 247-8501 Japan 報告人 : - PowerPoint PPT Presentation

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Page 1: 微波電路期中報告

微波電路期中報告 論文研討 : A High Efficiency and Low Rx-Noise Three Power ModePower

Amplifier for W-CDMA Handsets

作者: Katsuya Kato Naoko Matsunaga Kenichi Horiguchi Morishige

Hieda and Kazutomi Mori

Mitsubishi Electric Corporation 5-1-1 Ofuna, Kamakura, Kanagawa, 247-8501 Japan

報告人 : 碩研電子一甲 MA130117 陳偉中

Southern Taiwan UniversitySouthern Taiwan University Department of Electronic Engineering

Page 2: 微波電路期中報告

Abstract

2Proceedings of APMC 2012, Kaohsiung, Taiwan, Dec. 4-7, 2012

This paper presents a high efficiency and low Receive-band noise power ( Rx-Noise ) three power mode power amplifier for W-CDMA handsets.

The number of Switches in output matching circuit and bypass circuit are reduced to realize high efficiency in high-power mode operation.

Our developed amplifier achieves 28.25 dBm of high output power with power added efficiency (PAE) as high as 40% in the high power mode, 17.0 dBm with 23% of PAE in the middle power mode, and 7.0 dBm with 13% in the low power mode.

Page 3: 微波電路期中報告

PROPOSED SWITCHING BYPASS STAGE POWER AMPLIFIER

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Fig. 1. Block diagram of the conventional stage bypass power amplifier

Fig. 2. Block diagram of the proposed stage bypass power amplifier

The amplifier consists of high-frequency power transistors (M1, M2 and M3) which are switched by switches (SWs) corresponding to the HPM, MPM and LPM.

In the conventional circuit, the transistor M2 and M3, switches SW4 and SW5 are on in the HPM. The transistor M2 and, switches SW2 and SW3 are on in the MPM. The transistor M1 and, switches SW1, SW2 and SW3 are on in the LPM.

In the proposed circuit, transistor M2 and M3, switches SW4 are on in the HPM. In HPM, SW6 is also on, and thus M2 operates as a feedback amplifier. The transistor M2 and, switches SW2 are on in the MPM. The transistor M1 and, switches SW1, SW2 are on in the LPM. In MPM and LPM, SW6 is off, and thus the feedback circuit of M2 is disabled.

First, connected point between bypass circuit and output circuit is changed from output of the amplifier to corrector of M3 in the proposed circuit. Second, the feedback circuit with a switch is employed to the firststage transistor (M2) in the proposed circuit.

Proceedings of APMC 2012, Kaohsiung, Taiwan, Dec. 4-7, 2012

Page 4: 微波電路期中報告

PERFORMANCE IMPROVEMENT

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A. HPM Efficiency Improvement

Fig. 3. Simulated impedances Za and Zb in the MPM

Shows simulated impedances Za and Zb in MPM.The impedance Za is nearly short in the conventional circuit configuration.

The signal from bypass circuit leaks to matching network 6 in the LPM and MPM without SW5. Therefore, the output switch SW5 must to be employed in the conventional circuit configuration.

On the other hand, the impedance Zb is enough high without the output switch in the proposed circuit configuration. Therefore, the output switch is not necessary in the proposed circuit configuration.

Proceedings of APMC 2012, Kaohsiung, Taiwan, Dec. 4-7, 2012

Page 5: 微波電路期中報告

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Fig. 4. Simulated results circuit loss versus gate width of output switch SW5 in the conventional circuit configuration and the simulated output circuit loss of proposed circuit configuration.

Shows output circuit loss versus gate width of the output switch SW5 in Fig. 1. The output circuit loss of proposed circuit configuration is also shown in Fig.4.

The simulated output circuit loss of 0.80 dB was obtained with gate width of 3.8mm in the conventional circuit configuration.

Therefore, the proposed circuit configuration can be reduced output loss by 0.15 dB in the HPM. Therefore, we can improve HPM efficiency in the proposed circuit configuration.

Proceedings of APMC 2012, Kaohsiung, Taiwan, Dec. 4-7, 2012

Page 6: 微波電路期中報告

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B. Rx-Noise Improvement

Fig. 5. Simulated results of Rx noise and Tx Gain versus feedback resistance

Rx-noise and Tx gain decreases with the decrease of feedback resistance. The feedback resistance is determined to 900 ohms to meet the target Tx gain of 28.5dBm, where Rx-noise is improved to - 137.4 dBm/Hz by 1dB.

On the other hand, the feedback circuit cannot be employed to realize Tx gain in MPM and LPM. Therefore, the SW6 in the Fig2 is employed in the feedback circuit and is controlled to activate the feedback circuit only in the HPM to suppress the Rx-noise in HPM.

Proceedings of APMC 2012, Kaohsiung, Taiwan, Dec. 4-7, 2012

Page 7: 微波電路期中報告

MEASUREMENT RESULT

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Fig. 6.Measurement result of proposed circuit at 1950 MHz, WCDMA signal and Vcc=3.4 V. (a) PAE versus output power, (b)Gain versus output power.

(a) and (b) shows the measured PAE and Gain versus output power, respectively. The supply voltage is 3.4 V, and the input signal is W-CDMA signal at 1.95 GHz.

Gain of 27.8 dB, PAE of 40.0% and ACLR of -41.3 dBc with an output of 28.25 dBm in the HPM.

Gain of 16.3 dB, PAE of 23.1% and ACLR of -48.0 dBc with an output of 17.0 dBm 4733B1-04 are achieved in the MPM.

Gain of 10.4 dB, PAE of 13.7% and ACLR of -41.0 dBc with an output of 7.0 dBm are achieved in the LPM.

Proceedings of APMC 2012, Kaohsiung, Taiwan, Dec. 4-7, 2012

Page 8: 微波電路期中報告

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Table 1. Measured PAE and Rx-noise of the proposed circuit compared with and the conventional circuit

PAE in HPM and LPM was improved with keeping the PAE in MPM in the proposed circuit. In addition, the Rx-noise of -136 dBm/Hz (190 MHz offset) is achieved at output power of 28.25 dBm.

Proceedings of APMC 2012, Kaohsiung, Taiwan, Dec. 4-7, 2012

Page 9: 微波電路期中報告

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CONCLUSION

In this paper, we proposed the three power mode power amplifier for W-CDMA handsets. The number of switches in output matching circuit and bypass circuit were reduced to realize high efficiency in the HPM operation by changing the connected point between bypass circuit and output circuit of the final-stage amplifier.

The switching feedback circuit wasapplied to the first-stage amplifier to achieve low noiseperformance in Rx-band.

The PA achieved 40% of PAE at 28.25 dBm in the HPM, 23% of PAE at 17.0 dBm in theMPM and 13% of PAE at 7.0 dBm in the LPM, while satisfying ACLR of less than -40 dBc under the measurement condition of 1.95 GHz W-CDMA (R99) modulated signal and 3.4 V supply voltage.

Good Rx-noise characteristics of - 136 dBm/Hz (190 MHz offset) at 28.25 dBm is achieved by using the switching feedback circuit.

Proceedings of APMC 2012, Kaohsiung, Taiwan, Dec. 4-7, 2012

Page 10: 微波電路期中報告

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參考文獻

[1] Teeter, D. A., et al.: Average Current Reduction in (W)CDMA Power Amplifiers, IEEE Radio Frequency Integrated Circuits Symposium Digest, 429–432 (2006)

[2] Hau, G., et al.: Multi-Mode W-CDMA Power Amplifier Module with Improved Low-Power Efficiency using Stage- Bypass, IEEE Radio Frequency Integrated Circuits Symposium Digest, 163–166 (2010)

Proceedings of APMC 2012, Kaohsiung, Taiwan, Dec. 4-7, 2012

Page 11: 微波電路期中報告

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心得

這篇報告中,他們有提出三種功率模式下功率輸出匹配電路和旁通電路放大器 W-CDMA ,從輸出匹配電路和旁通電路的開關數量減少,在 HPM 操作中來實現高效率的通過而改變旁通電路和輸出電路的最後階段的放大器之間的連接點。