중간 고사 review (part 1: high-level...

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중간 고사 review (Part 1: high-level overview)

Bryan S. Kim

Before we get started…

• Office hour change for this week

– 4/11 (Thurs.) instead of 4/12 (Fri.)

– 301-517, 16:30-17:30

• Midterm review (part 2, with exercises)

– 4/15 (Mon.), in class

– Both English and Korean will be used

Before we get started…

• Office hour change for this week

• Midterm review (part 2, with exercises)

• Midterm on 4/17 (Wed.)

– Closed-book, closed-notes

– Bring your ID

– Only your writing utensils will be allowed on your desk

– All exam questions will be variations of the textbook exercises

The entire course in a nutshell

• The underlying structure of a computer

– Chap 1~Chap 10

• Programming in a high-level language

– Chap 11~Chap 19

My interpretation of the textbook

A computing system &

data representation

Chap 1~2



data representation

Digital logic

Von Neumann machine

LC-3 ISA

Assembly language

Service routines & subroutines

Doing cool stuff with assembly

… want to do cooler stuff

Chap 1~2

Chap 3~10



data representation

Digital logic

Von Neumann machine

LC-3 ISA

Assembly language

Service routines & subroutines

Doing cool stuff with assembly

C language

Functions

Doing cooler stuff with C

… want to do cooler stuff

Chap 1~2

Chap 3~10

Chap 11~19

What this course touches upon

from cse.snu.ac.kr

Important ideas from Chap. 1

• Abstraction

– What does it hide?

– What does it expose?

– Interface and implementation


• Abstraction

• Hardware vs. software

– How machines are built and programmed

– How programs are built on top of machines


• Abstraction

• Hardware vs. software

• Universal computing device

– Big or small, capabilities are the same

• Efficiency, that’s another story

– The reason why we are studying LC-3

Important ideas from Chap 2.

• Integer representation

– Sign-magnitude

– 1’s complement

– 2’s complement



• Operations

– Arithmetic

• Add, subtract, sign-extension, overflow

– Logical

• AND, OR, NOT, NAND, NOR



• Operations

• Other data types

– Floating point

– ASCII


• Transistors and logic gates

– NMOS, PMOS, CMOS

– NOT, NAND, NOR

– Truth table circuit (logical completeness)

– DeMorgan’s Law and other properties



• Combinational logic

– Decoder

• n-bit to 2n-bit

– Mux

• Selects one to output among 2n inputs

– Adder

• 1-bit adder ripple-carry adder




• Storage elements

– Latch gated latch register

– Memory

• A simplified (?) representation of what it could look like




• Storage elements

• Sequential logic

– Flip-flop

• Like latch, but “holds” data

– Finite state machine

• Circuit State transition diagram

Latches, FFs, and registers are sometimes intermixed in literature, but we’ll go with the definition in the text.


• Von Neumann model

– Memory: MAR, MDR

– Processing unit: ALU, TEMP

– Control unit: PC, IR

– Input

– Output


• Von Neumann model

• Instruction processing

– Instruction fetch

– Instruction decode

– Evaluate address

– Fetch operands

– Execute

– Store result


• LC-3 ISA

– What does an ISA expose?

• Memory, registers, instructions

– LC-3 instruction format


• LC-3 ISA

• LC-3 instruction types – Operate

• Register-to-register

• Register vs. immediate mode

– Data movement • Register-to/from-memory

• PC-relative vs. Base-offset vs. Indirect

– Control: PC change • Condition code


• LC-3 ISA

• LC-3 instruction types

• Details in LC-3 ISA

– What goes on for each instruction for each instruction processing phase


• Problem solving

– Step-wise refinement

– Constructs

• Sequential

• Conditional

• Iterative


• Problem solving

• Debugging

– What a debugger should provide

– How to debug

• Step, breakpoint, watchpoint

– Types of mistakes

• Syntax, logic, data


• Assembly language syntax

– Instruction

– Label

– Comment

– Pseudo-op


• Assembly language syntax

• Assembly process

– Two-pass process

• Symbol table

• Location count


• I/O (device) CPU

– Device register

– Memory-mapped vs. special instructions

– Sync vs. async

– Polling vs. interrupt


• I/O (device) CPU

• LC-3 computer’s keyboard & monitor I/O

– Memory-mapped, asynchronous, polling

– Hardware-software synchronization

• What the device hardware does

• What the software should do

Only polling is covered in this chapter.


• System call mechanism

– System control block

– What happens on TRAP?

– What happens on RET (JMP R7)?


• System call mechanism

• Subroutine

– What happens on JSR/R?

– How do we pass arguments and get return values from subroutines?


• Stack

– What it is, how it works, how to implement.


• Stack

• Interrupt handling

– Processor state

• Particularly, Processor Status Register (PSR), Saved.SSP and Saved.USP

– What happens on jumping into interrupt service routine (ISR)

– What happens on return from interrupt (RTI)

What the ISR exactly does isn’t extensively covered in text. How to decide between polling and interrupt isn’t covered in detail, either.

Why are we learning hardware?

Why are we learning hardware?

J. H. Hennessy and D. A. Patterson, “A New Golden Age for Computer Architecture” in CACM 2019

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