apz 212 50

Slide titleIn CAPITALS

50 pt

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APZ 212 50

Next High Capacity CP in AXE

Lars WallinderAPZ CP Product Support

[email protected]

Top right corner for field-mark, customer or partner logotypes. See Best practice for example.

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Commercial in confidence APZ 212 50 Presentation EUGAP 2006-11-07 © Ericsson AB 20062Commercial in confidence APZ 212 50 Presentation EUGAP 2006-11-07 © Ericsson AB 20062

Agenda

Classic -> APZ 212 40 APZ 212 40 learning's APZ 212 50 Summary


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HW

MIP

Application SW

APZ-CP OS

Classic APZ

Application SW

APZ-CP OS

HW (Alpha -proc)

OS (Tru64™)

APZ-VMASA

compiler

HAL & OS API

APZ 212 40 generation

Application SW

APZ-CP OS

HW (Itanium -proc)

OS (Linux)

APZ-VM

HAL & OS API

APZ 212 50

ASA compiler

Same Same Same Same

APZ transformation


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APZ 212 40 some changed behavior

The normal behaviour is that the CP becomes separated after changes to PS or RS, for instance, after PCORL and SAAII. All these changes shall however be followed by a SYBUP which automatically brings back the CP to normal state.

B side could be EX just as well as the A-side.

APZ’s built around standard commercial servers makes it harder to perform HW fault simulation in the old traditional way. Major re-design of the MAintenance Subsystem was required to achieve the same look and feel as in the recent APZ’s.In the first releases the diagnostics was not fully implemented to match earlier standards.


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Architecture concepts in commonfor APZ 212 40 and APZ 212 50

APZ 212 40 was a large architectural step APZ 212 50 is a further but smaller next step

Several concept are inherited Run-time compilation Warm Standby & “Hot on demand” Handling of HW faults APZ 212 40/50 Software structure


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Run-time compilation

Run-time compilation to ensure that market adaptations & other ASA corrections can be reused in APZ 212 40/50.

The ASA compiler use a ‘just in time’ principle, compiling ASA code when necessary and saving the result for later reuse. The compiler produce code according to two modes:

– BASIC mode: used for most blocks or when the test system is used. This code has full register coherency compared to earlier APZ’s, full JAM

– OPTIMIZED mode: used for function blocks that are heavily used in the system (~10% of the function blocks). These function blocks stand for around 90% of the code execution. This code is highly optimized and has less register coherency, limited JAM.


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Warm Standby & “Hot on demand”

The standby side is fully loaded and running diagnostics In case of a controlled side switch, data is copied from the

executing side and traffic is moved without disturbance In case of a sudden, debilitating, hardware fault, there is a

system reload (with reload time 0, because software is already loaded) followed by a large system restart.

Restart and reload times will be favoured by the higher processor capacity.

Less hardware fewer hardware faults One repair in CP EX about every 5 years


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Handling of HW faults HW fault detection implemented both in HW and SW Fault detection and replacement or board level Many fault types are fully recoverable, e.g. with no traffic

disturbance– Examples: RP errors, Match error on RPHB, One bit faults in

ECC supervised memories….– Recovery action depends on fault case, e.g. log event and

Soft Side Switch

Fatal HW fault in EX Restart, rank Reload– Transient data continuously from EX to SB– Error data is preserved in EX – Standby side fully loaded Reload time 0– Fast Large Restart– Load the command log, manually


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APZ 212 50 Software structure

There are more levels of SW compared to APZ 212 3x– PLEX (as before)– PLEX engine (PES) – APZ-VM, ASA compiler– CPHW – OS, FW and drivers

Changes to PLEX engine and CPHW – Simple and transparent

Remote Upgrade of Firmware (RUF)– Possible to change FW on HW boards


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APZ architecture

HARDWARE

OS

APT SOFTWARE

APZ SOFTWARE

APZ-VM ASA compiler Key benefits:

Supports modern design processes

Follow the industry evolution

APZ-VM = APZ Virtual Machine

ASA compiler = ‘just in time’ compiler


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APZ 212 50 – Features

Real time performance: 2 times APZ 212 40

Based on a Intel Itanium CPU Using Linux Memory up to 24 GW (PS, RS, DS, OS):

>3 times APZ 212 40 user memory 1Gb Ethernet connections for connecting Ethernet

RPs and I/O system Source code (PLEX and ASA) compatibility Retained APZ functionality


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APZ 212 50 load behaviour

Non-linear load– The non-linear load behaviour means that the CP at low load

seems to be less efficient than expected. – There are two main reasons why there is a non-linear relation

between offered traffic and CP load: The cache memory The automatic mode shift of the embedded compiler

The Gradual Change of Execution Efficiency– Immediately after a switch over from APZ 212 3x or APZ 212

40 to APZ 212 50 the call related code has not yet been generated by the ASAC.

– After normal traffic execution has resumed there are two processes ongoing that have some impact on the load per call

Compilation of code for new execution patterns Optimization of already compiled code


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Compatibility

New CP hardware

Other APZ subsystems are reused

APG40 is supported as I/O system

Ethernet RP bus (RPB-E) & Serial RP bus

(RPB-S) is supported in APZ 212 50

Code compatible for APT


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Cabinet layout

Equipment practice BYB 501 2 CPSB (Central Processor Server

Block) on two shelves 2 CPAM (CP Auxiliary Magazine)

– Communication between the CP sides– RP bus and IO interface

APG40 and additional GEM magazine available on the back side

Footprint: 600 x 800 mm Height: 1800 mm Power: Max 1510 W (excl. APG)


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APZ 212 50 – Cabinet layout

600

Front view Side view

800

18

00

CPAM-A

FAN

CPAM-B

CPSB-A

CPSB-B

CPAM-B

CPAM-A APG40

GEM

CPSB-B

CPSB-A

FANFAN

FAN FANFAN FAN FAN

FAN FAN

A B

CD

U


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The CP Server Block (CPSB)

Based on HP (Hewlett-Packard) Integrity cx2620 Carrier Grade Server

Rear ViewFront view


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CP Auxiliary Magazine (CPAM)

CPHU – CP Handler Unit– CPSB interface board

(PCIH)– RPH Magazine interface

board (RPHMI)– Update Bus board (UPBB3)– Power board (POU-C)

RPHU – RP Handler Unit– RPH interface board

(RPIO2)– Serial RP Bus Interface boards (RPBI‑S)– RPH power board (POU-R).

PO

U-C

PC

IH

UPBB3

PRH

MI

RPIO

2

RPBI-S 1

RPBI-S 3

RPBI-S 4

RPBI-S 5

RPBI-S 6

RPBI-S 7

PO

U-R

RPBI-S 0

RPBI-S 2

PO

U-C

PC

IH

UPBB3

PRH

MI

RPIO

2

RPBI-S 1

RPBI-S 3

RPBI-S 4

RPBI-S 5

RPBI-S 6

RPBI-S 7

PO

U-R

RPBI-S 0

RPBI-S 2


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Backup, Reload & APG inter working

APG40C/2 retained, but APG40C/4 for best characteristics

APZ 212 50 and APG40C/4

– 1 Gbit Ethernet– Faster CPUs– Larger disks– New raid

Increased throughput– All IO operations like Backup, Reload, Charging, STS.

The CP and AP are inter connected– Booting of APZ 212 40/50 from APG40– A number of Log files from APZ 212 40/50 is stored on APG40

1 Gb Ethernet

1 Gb Ethernet

RPB-S

10G

b E

ther

net

CPSBA

CPSBB

APG40B

APG40A

EthernetSwitch

EthernetSwitch

EthernetSwitch

EthernetSwitch

CPAMA

CPAMB1

Gb

Eth

ern

et

1 G

bE

ther

net

10G

b E

ther

net

CPSBA

CPSBB

APG40B

APG40A

EthernetSwitch

EthernetSwitch

EthernetSwitch

EthernetSwitch

CPAMA

CPAMB1

Gb

Eth

ern

et

1 G

bE

ther

net

RPB-E

RPB-E


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Memory configurations

~ 1.5GW is always needed for OS and internal CP software

8GW + 4GW 16GW + 8GW 24GW

3 basic configurationsand 2 extensions

1 GW DIMM 2 GW DIMM


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APZ 212 50 Operational changes

APZ 212 50 is very similar to APZ 212 40 from an operational view

Documentation differences between APZ 212 40 and APZ 212 50 available (2/1551-APZ 212 50 Uen)

For changes vs APZ 212 3x, the “APZ 212 40 CP Operation impact” 2/1551-APZ 212 40 Uen is still valid


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Courses and education

Courses for APZ 212 50: Basic overview

Delta course, including APG40, showing differences to APZ 212 40 and earlier APZ’s

Basic Operation, delta, concerning handling, e.g. booting, start up


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Floor spaceFloor space Memory sizeMemory size

AP

Z 2

12 3

3

AP

Z 2

12 3

3C

AP

Z 2

12 5

0

AP

Z 2

12 3

3

AP

Z 2

12 3

3C

AP

Z 2

12 5

0

Real time capacityReal time capacity

AP

Z 2

12 3

3

AP

Z 2

12 3

3C

AP

Z 2

12 5

0

APZ-CP characteristics comparison

AP

Z 2

12 4

0

AP

Z 2

12 4

0

AP

Z 2

12 4

0

Note: APZ 212 50 is housed in a double dept cabinet but it also removes the need for an additional cabinet for APG 40.


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HARDWARE (Intel Itanium)

APZ 212 50Adding non Plex SW

HARDWARE (Intel Itanium)

OS (Linux)

APT SOFTWARE

APZ SOFTWARE

APZ-VM ASA compiler

IP Protocol


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APZ 212 50 Product Highlight

APZ 212 50 combines the Intel Itanium and HP Carrier Grade Server running on Linux, integrated with the Ericsson Telecom Grade functionality giving a future proof platform for further system evolution.

– Real time performance: ~2 times APZ 212 40 – Memory up to 24 GW (PS, RS, DS, OS):

~3 times APZ 212 40– Safeguarding existing investments in AXE by backwards

compatibility– A switch to open sourced based APZ’s still provides same

good ISP figures in AXE, 5 nines


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CPU load pr day

0

10

20

30

40

50

60

70

80

90

100

Mon T ue Wed T hur Fr i Mon T ue Wed T hur Fr i Mon T ue Wed T hur Fr i Mon T ue Wed T hur Fr i

APZ 212 33 Average

APZ Max load

APZ 212 50 Average


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Questions and Answers

1) Does 1Gb Ethernet connection support "FastEthernet" ?? Yes. For example the system can handle both C/2 and C/4 APGs -

100 Mbit and 1 Gbit. Auto negotiation mechanism to set the speed 2)As the 212 50 supports either/both Serial AND ethernet OR both..how

does the customer ensure that they receive the correct number of each. O2 currently have (nor will have in near future) nodes with serial and

ethernet, however command DPRBP will probably give you what is needed.

3)Can the Base Packages be configured with a choice of 2GW DIMMs/ 1GW Dimms in order to ensure that all future expansions are catered for.

The three configurations from the presentation ( 8 GW(1 GW DIMM), 16 GW(2), and 24 GW(2) ) are the only ones provided, tested and supported.

If you like a 8 GW(2 GW DIMM), then it should be brought forward as a requirement. (It might not be technically possible though, due to maybe a minimum of occupied slots in configuration.)


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4)Has Ericsson carried out a CANDI report on HLR fitted with 212 50?

Yes 5)Where is the document which describes the Delta between 212

40 V 212 50 capacity Capacity for APZ 212 50 is 2 times APZ 212 40. Is it an

estimate or is it measured? It has been measured in MSS and it is almost exactly 2 times. In HLR the capacity increase is bigger, but there are no figure for it.

6)Is the Blade solution available in R13 or R14? development work ongoing and so is not industrialised as yet

hence no target R-release defined for commercial sales.


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7) Does the 212 50 require more Cooling or Power than the 212 40?

APZ 212 50 power consumption is 1500 W. How much for the APZ 212 40? The APZ 212 40 figure is 935 W. More capacity per W!

8) Can O2 have a statement saying 212 50 is compliant with EU Environmental regulations.

Statement of compliance is available

apz 212 50

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