短期不要與政府做對長期不要與市場做對

• http://nanosioe.ee.ntu.edu.tw

• chee@cc.ee.ntu.edu.tw• What do you not learn in NTU undergraduate?

3D transistor (FinFET, Tri Gate, Gate All

Around), mobility( band structure under

strain, scattering), competition law (anti trust)

Patent law ( ?)

Free training course at 2-4 pm on Sat EE

II102

Technologies and Economy

• IC industry : WW 300B USD, TW 20%

Foundry No.1, Design No.2 vs Korea’s

memory, US’s CPU, Not much room to increase.

• Display: WW100B USD, TW ~40% No. 1 or No. 2 Highly compete with Korea

• Solar cell: WW 20B USD, 17% Now No.2

High growth rate: good area for participation

2D Electron-Gas MobilityCollaborated with Prof. Tsui, Princeton U, APL 94, 182102(2009)

The graded SiGe buffer and Si quantum well structure is grown at 550oC.

The 2D electron-gas mobility in Si quantum well can reach 1.6 × 10+6

cm2/Vs at carrier densities n ≧ 1.5 × 1011 /cm2 at extremely low temperature

(< 1K).

Device Structures Si cap to passivate Ge

Fractional QHE on Si

•The integral and

fractional quantum hall

effect can be observed

in Si

•What is new?

What does intervalley

interaction play in the

FQHE?

UHV-CVD (ITRI) Batch Process

For record mobility growthUHV-CVD (NDL):

Single Wafer Process

LP/AP-CVD

Rapid Thermal Process

p-Ge (001) sub

Gate

n+-Ge1-xSixDrain

[110]

tensile

n+-Ge1-xSixSource

p-Ge (001) sub

Gate

n+-Ge1-xSixDrain

[110]

tensile

n+-Ge1-xSixSource

First GeSi S/D Ge nMOSFET First Strain response Ge NFET Ge GAA Triangular pFETs

(IEDM 2009, p689) (IEDM 2010, p432.) (IEDM 2011)

threading dislocation

misfit dislocation

threading dislocation

misfit dislocation

Patent for Ge GAA FETsClaims: triangular, goblet,

NW, trapezoid.

Solar Energy Market

Present: • 740MW in ’03, ≈ 1/2 nuclear

plant;

• Solar-Cell’s still <0.1% of global

electrical energy

• 30-50% annual growth

• Revenue for installation (e.g.,

hardware) US$4.7B in 2003

Prediction: • By 2030, expected 140GW, ≈100

nuclear plant (IEEE)

• Major market : Singapore

(Southeast Asia) , US, China,

Japan…, and remote rural

areas.

Polymer Solar-Cell is emerging to be the cost-effective solution

Now 10-20 cents/ KWH off grid, 5 cent for fossil fuel @ ~ $40/barrel

The Worldwide Semiconductor

Industry Food Chain

1.3X

1.8X

1.4X

1.45X

ChangesOver 2001

20062001

Semiconductor Revenue$260 Billion

22.0% of Electronics

Capital Spending$56 Billion25.6% of

Semiconductor

Electronics Revenue$1, 326 Billion

3.5% of Worldwide GDP

Semiconductor Revenue$144 Billion

13.8% of Electronics

Capital Spending$39 Billion27.6% of

Semiconductor

WFE$23

Billion

Electronics Revenue$1,040 Billion

3.2% of Worldwide GDP

WFE$32

Billion

Sources: Dataquest, SEMI, WSTS, Company Announcements, Applied Materials

Communications and Consumer Products

Drive Semiconductor Pervasiveness

Sources: Dataquest, Applied Materials

35%

30%

25%

20%

15%

10%

5%

0%0% 5% 10% 15% 20% 25% 30% 35%

CAGR % (1997-2002)

SemiconductorIndustry

Ap

plicati

on

Market

Gro

wth

SC Content (As % of Equipment Cost)

3rd Generation

2nd Generation

1st Generation

ColorTV

CarRadio

VideoCamera

PortableComputingSwitching

& LAN

HDTV

MultimediaPC

Advanced DesktopPC and Workstation

AutomotiveApplications/GPS

DVDPlayer

Set-TopBox

Internet Game ConsolesSmart

Cards/KiosksSmart

Appliance-Phone

Digital Camera

40% 45% 50% 55%

40%

45%Cellular Phones

This is the legacy for TW’s young generation

Pure play foundry in 2008

(projection)

• Tsmc $11.68 billion

• UMC $3.75 billion

• Charter $1.85 billion

• SMIC $1.45 billion

• Hua Hong NEC, HeJian Technology and

Grace Semiconductor :0.35-0.36B rank

13-15

Power is the ISSUE

How about 45 nm

First Transistor, Bell Lab,

1947

Photo courtesy:

AT&T Archive

Npn bipolar Ge

John Bardeen, William Shockley and Walter Brattain

Photo courtesy: Lucent Technologies Inc.

First Transistor and Its

Inventors

First IC Device Made by Jack

Kilby of Texas Instrument in

1958

Photo courtesy: Texas Instruments

First Silicon IC Chip Made by

Robert Noyce of Fairchild Camera

in 1961

Photo courtesy: Fairchild Semiconductor International

Figure 6.1 Basic structure of an n-channel MOSFET.

n+n+

Metal or

polysilicon

gate

p type substrate

Oxide

W

L

Source

Gate

Drain

Substrate

(body)

Due to the power concerns,

Bipolar is replaced by

MOSFET

Moore’s Law

• Intel co-founder Gorden Moore notice in

1964

• No of transistors on a chip doubles every

18 months

• Amazingly still correct, likely to keep until

2010.

• No. of transistors for DRAM in next

genenration= 4x

How to do this

• One generation = 4 x more transistor on

the chip

• Device L (next generation)=L ( current

generation)x 0.7

• Chip area = 2x

Road Map Semiconductor

Industry1995 1997 1999 2001 2004 2007

Minimum feature size (mm) 0.35 0.25 0.18 0.13 0.09 0.065

DRAM

Bits/chip 64 M 256 M 1 G 4 G 16 G 64 G

Cost/bits @ volume

(millicents) 0.017 0.007 0.003 0.001 0.0005 0.0002

Microprocessor

Transistors/cm2 4 M 7 M 13 M 25 M 50 M 90 M

Cost/Transistor @ volume

(millicents) 1 0.5 0.2 0.1 0.05 0.02

ASIC

Transistors/cm2 2 M 4 M 7 M 13 M 25 M 40 M

Cost/Transistor @ volume

(millicents) 0.3 0.1 0.05 0.03 0.02 0.01

Wafer size (mm) 200 200 200 -

300

300 300 300 –400 (?)

Feature Size and Wafer Size

1822

Chip made with 0.35 mm

technology

with 0.25 mm

technology

with 0.18 mm

technology

300 mm

200 mm

150 mm

Chip

or die

Limit of the IC Geometry

Finite Size of the

atom and power

Limit of the IC device

• Power

• Leakage current due to the thin insulators

Vdd x Ileak

• CV2f : dynamic power

• High K / metal gate

• strain

專業分工創造我國IC產業特有優勢

資料來源：工研院IEK(2004/03)

晶粒測試及切割

設計

導線架

測試封裝製造光罩

晶圓

光罩設計邏輯設計 封 裝

化學品

•250 • 4 • 13 • 41 •34

• 8

• 4

•20

成品測試

• 13

長 晶 晶圓切割

基板

服務支援

貨運

海關

科學園區

CAD

CAE

材料

設備儀器 資金人力資源

-我國半導體產業結構-

1.上下游產業鏈完整2.專業分工配合度高3.產業群聚效果顯著4.週邊支援產業完善

Group

PeriodII III IV V VI

2B

Boron

C

Carbon

N

Nitrogen

O

Oxygen

3Al

Aluminum

Si

Silicon

P

Phosphorus

S

Sulfur

4Zn

Zinc

Ga

Gallium

Ge

Germanium

As

Arsenic

Se

Selenium

5Cd

Cadmium

In

Indium

Sn

Tin

Sb

Antimony

Te

Tellurium

6Hg

Mercury

Table 1.1 How many element in earth (118)

A portion of the periodic table showing elements used in semiconductor materials

Table 1.2

A partial list of semiconductor materials

Elemental Semiconductors IV Compound Semiconductors

Si Silicon SiC Silicon carbide

Ge Germanium SiGe Silicon germanium

Binary III-V Compounds Binary II-VI Compounds

AlAs Aluminum arsenide CdS Cadmium sulfide

AlP Aluminum phosphide CdTe Cadmium telluride

AlSb Aluminum antimonide HgS Mercury sulfide

GaAs Gallium arsenide ZnS Zinc sulfide

GaP Gallium phosphide ZnTe Zinc telluride

GaSb Gallium antimonide

InAs Indium arsenide

InP Indium phosphide

Ternary Compounds Quaternary Compounds

AlxGa1-xAs Aluminum gallium arsenide AlxGa1-xAsySb1-y Aluminum gallium arsenic atimonide

GaAs1-xPx Gallium arsenic phosphide GaxIn1-xAs1-yPy Gallium indium arsenic phosphide

5.4 5.6 5.8 6.0 6.2 6.4

0.2

0.4

0.6

0.8

1.0

1.2

1.4

1.6

1.8

2.0

2.2

strained

Ge

3.9K

1.9K

Si

1.5K

0.45K .. .

..

.

...

InSb

e77K

h0.85K

GaSb

3K

1.2K

InAs

26.7K

0.2K

GaAs

8.5K

0.4K

GaP

0.15K

0.14K

AlAs

AlSb

B

an

dg

ap

en

erg

y E

g (

eV

)

Lattice constant a0 (Angstroms)

Wa

ve

len

gth

(u

m)

- 10- 6.0- 4.0- 3.0

- 1.5

- 1.2

- 2.0

- 0.8

- 1.0

- 0.9

- 0.7

- 0.6

InP

5.4K

0.2K

Direct gap

indirect gap

_____

_ _ _

.What is the mobility

4.2 4.4 4.6 4.8 5.0 5.2 5.4 5.6 5.8 6.0 6.2 6.4

0.2

0.4

0.6

0.8

1.0

1.2

1.4

1.6

1.8

2.0

2.2

2.4

strained

SiC

.

.-7.5mev/%Ge Ge

Si

..

..

.

...

InSb

GaSb

InAs

GaAs

GaP AlAs

AlSb

B

an

dg

ap

en

erg

y E

g (

eV

)

Lattice constant a0 (Angstroms)

Wavele

ng

th (

um

)

- 10- 6.0- 4.0- 3.0

- 1.5

- 1.2

- 2.0

- 0.8

- 1.0

- 0.9

- 0.7

- 0.6

InP

Direct gap

indirect gap

_____

_ _ _.

l > 10 mm, quantum cascade emitter

Why Silicon?

• Abundant, cheap

• Silicon dioxide is very stable, strong

dielectric, and it is easy to grow in thermal

process.

• Large band gap, wide operation

temperature range.

• Ge will be exhausted in 2 decades if used

in VLSI.

Low Field Mobility

as Compared with Si

Electron 2.7 X

Hole 4 X

Si Ge

Abundance

(ppm)272000 1.5

• Poor Interface PropertiesGermanium oxide will be dissolved in water.

• Natural AbundanceGe will be run out in 16 years.

• Mobility Issue

The advantages and disadvantages of Ge

Introduction

Amorphous Structure

Polycrystalline Structure

Grain

Grain

Boundary

Single Crystal Structure

Raw STEM image Si <110> Reflections down to 0.8 Å

{400} ~ 1.36 Å

{511} ~ 1.05 Å{422} ~ 1.11 Å

{440} ~ 0.96 Å{333} ~ 1.05 Å

{533} ~ 0.83 Å

No drift, no distortions, minimal noise, no forbidden reflections {200}, {600}

FEI Titan with Cs-probe corrector

Name Silicon

Symbal Si

Atomic number 14

Atomic weight 28.0855

Discoverer Jöns Jacob Berzelius

Discovered at Sweden

Discovery date 1824

Origin of name From the Latin word "silicis" meaning "flint"

Bond length in single crystal Si 2.352 Å

Density of solid 2.33 g/cm3

Molar volume 12.06 cm3

Velocity of sound 2200 m/sec

Electrical resistivity 100,000 mcm

Reflectivity 28%

Melting point 1414 C

Boiling point 2900 C

Source: http://www.shef.ac.uk/chemistry/web-elements/nofr-key/Si.html

Unit Cell of Single Crystal Silicon

Crystal Orientations: <100>

x

y

z

<100> plane

Crystal Orientations: <111>

x

y

z

<100> plane<111> plane

Miller indices=plane normal

direction

• (1/2,1/3,1/2) (1/p,1/q,1/r)

(3,2,3) (h,k,l) plane (smallest integer)

Crystal Orientations: <110>

x

y

z

<110> plane

<100> Orientation Plane

AtomBasic lattice cell

<111> Orientation Plane

Silicon atomBasic lattice cell

<100> Wafer Etch Pits

<111> Wafer Etch Pits

Illustration of the Defects

Silicon AtomImpurity on substitutional site

Frenkel DefectVacancy or Schottky Defect

Impurity in

Interstitial SiteSilicon

Interstitial

Dislocation Defects

Ingot Polishing, Flat, or Notch

Flat, 150 mm and smaller Notch, 200 mm and larger

Parameters of Silicon Wafer

Wafer Size (mm) Thickness (mm) Area (cm2) Weight (grams)

279 20.26 1.32

381 45.61 4.05

100 525 78.65 9.67

125 625 112.72 17.87

150 675 176.72 27.82

200 725 314.16 52,98

300 775 706.21 127.62

50.8 (2 in)

76.2 (3in)

Semiconductor Substrate and

DopantsSubstrate

P-type

Dopant

N-type Dopants

Band Gap and Resistivity

Eg = 1.1 eV Eg = 9 eV

Aluminum

2.7 mcm

Sodium

4.7 mcm

Silicon

~ 1010 mcm

Silicon dioxide

> 1020 mcm

Conductors Semiconductor Insulator

Crystal Structure of Single

Crystal Silicon

-

Si Si Si

Si

SiSi

Si

Si

Si

Shared electrons

Intrinsic Silicon

N(E) : Density of States (Appendix C)

( (

( (

v

c

E

E

dEEfENp

dEEfENn

1

Conduction

band

Valence

band

Ec

Ev

E

Eg

Free electron (-)

Free hole (+)

N-type (Arsenic) Doped Silicon

and Its Donor Energy Band

Electron

-

Si Si Si

Si

SiSi

Si

Si

As

Extra

Valence band, Ev

Eg = 1.1 eV

Conducting band, Ec

Ed ~ 0.05 eV

P-type (Boron) Doped Silicon

and Its Donor Energy Band

Valence band, Ev

Eg = 1.1 eV

Conducting band,

Ec

Ea ~ 0.05 eV

Electron

-

Si Si Si

Si

SiSi

Si

Si

B

Hole

Illustration of Hole Movement

Valence band, Ev

Eg = 1.1 eV

Conducting band, Ec

Ea ~ 0.05 eV

Electron

Hole

Electron

HoleValence band, Ev

Eg = 1.1 eV

Conducting band, Ec

Valence band, Ev

Eg = 1.1 eV

Conducting band, Ec

Electron

Hole

NMOS Device (history)

+

“Metal” Gate

SiO2

Source Drainp-Si

n+

VD > 0VG > VT > 0

+ + + + + + +

Electron flow

Positive charges

Negative chargesNo current

n+SiO2

Source Drainp-Si

n+

VDVG = 0

n

Body

contact

From 1960s to 1970s

• 1960s

– PMOS

– Diffusion

– Metal gate

• 1970s

– NMOS

– Ion implantation

– Polysilicon gate

1980’s Technology

• CMOS IC replacing NMOS IC for lower

power consumption

• Minimum feature size: from 3 mm to 0.8

mm

• Wafer size: 100 mm (4 in) to 150 mm (6 in)

IC Design:

CMOS

Inverter

Metal 1, AlCu

P-Epi

P-Wafer

N-WellP-Well

PMD

p + p +n +n +

W

Metal 1Contact

P-wellN-wellPolycide gate and local

interconnection

N-channel active region

N-channel Vt

N-channel LDD

N-channel S/D

P-channel active region

P-channel Vt

P-channel LDD

P-channel S/D

Shallow trench isolation (STI)

Vss

Vdd

NMOS PMOS

Vin

Vout

STI

(a)

(b)

(c)

Poly gate/LI

Wafer Process Flow

Materials

Design

Masks

IC Fab

Test

Packaging

Final Test

Thermal

Processes

(RTA, RTO)

Photo-

lithography

Etch

PR stripImplant

PR strip

Metallization CMPDielectric

deposition

Wafers

CMOS inverter layout Mask 1, N-well Mask 2, P-well

Mask 3, shallow trench isolation Mask 4, 7, 9, N-Vt, LDD, S/D Mask 5, 8, 10, P-Vt, LDD, S/D

Mask 6, gate/local interconnection Mask 11, contact Mask 12, metal 1

IC Design: Layout and Masks of CMOS Inverter

Mask/Reticle

Quartz substrate

Chrome patternPellicle Phase shift coating

Definition of Airborne Particulate

Cleanliness Class per Fed. Std.

209EClass

Particles/ft3

0.1 mm 0.2 mm 0.3 mm 0.5 mm 5 mm

M-1 9.8 2.12 0.865 0.28

1 35 7.5 3 1

10 350 75 30 10

100 750 300 100

1000 1000 7

10000 10000 70

Homework hint• Coordinate of fcc lattice

(000), (100), (010) (110),

(001), (101), (011) (111), (1/2,1/2,1)

(1/2,1/2,0),(1/2,1/2,1) (0,1/2,1/2), (1 ,1/2,1/2),

(1/2,1,1/2), (1, 1/2, 1/2)

• Diamond = fcc+ fcc(1/4,1/4,1/4)

unit=(lattice constant) ao

• For example = bond length =4 (3)1/2

ao

• Miller index

Bonus-project

3-D picture of Si lattice