giới thiệu về psoc

8/14/2019 Gii Thiu v PsoC

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Gii thiu v PsoCGii thiu1. Tng quan h thng2. CPU3. Khi to dao ng4. Cng sut tiu th ca vi iu khin

5. Reset.6. Cc chn vo/ra s7. Cc chn vo/ra tng t8. Truy nhp vo cc khi chc nng s lp trnh c9. Cc khi c chc nng s lp trnh c10.Cc khi c chc nng tng t lp trnh c11.Khi to in p tham chiu12.Ch kch13.B nhn cng MAC14.B suy gim tn s ly mu - Decimator15.Khi iu khin I2C (Intel IC Bus)16.Khi iu khin ngt

17.Khng gian a ch

Gii thiu

Khi pht trin cc ng dng phc tp, chng ta thng cn thm cc khi ngoi vinh b khuch i thut ton, cc b lc, cc b nh thoi, mch logic s, cc khichuyn i AD-DA v.v Vic thit lp thm cc khi ngoi vi l mt vic kh khn,cc thnh phn mi s chim thm din tch, yu cu phi c xem xt cn thntrong qu trnh thit k bn mch in (PCB), tng cng sut tiu th Tt c cc yut ny nh hng ng k n gi thnh v thi gian pht trin mt d n.S xut hin ca PsoC gip cho gic m ca cc nh thit k tr thnh hin thc,thit lp cc d n ch trn 1 chip.

PSoC: Programmable System on Chip

PSoC (Programmable System on Chip) gii thiu mt khi nim hon ton mi chocc ng dng vi iu khin. So vi cc vi iu khin 8-bt tiu chun, cc chip PsoCc thm cc khi tng t v s lp trnh c kh nng lp trnh c, chng chophp vic thit lp mt s lng ln cc ngoi vi.Cc khi s cha mt s cc khi s nh hn c kh nng lp trnh c c th ccu hnh cho cc ng dng khc nhau. Cc khi analog c s dng cho vic phttrin cc thnh phn analog nh cc b lc tng t, cc b so snh. Cc b chuyni AD-DA.

C mt s cc h PsoC khc nhau cho php bn la chn ph thuc vo yu cu cad n. S khc nhau gia cc h PsoC l s lng cc khi A/D c th lp trnh cv s lng cc chn vo ra. Ph thuc vo cc h vi iu khin, PsoC c th c t 4n 16 khi s v t 3 n 12 khi tng t c kh nng lp trnh c.

Cc c im ca PSoC microcontrollers

Mt s c tnh ni bt ca vi iu khin - PsoC


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- Khi nhn cng, b nhn cng 8x8 cho kt qu lu trong thanh ghi cng 32 bt- C kh nng thay i in p hot ng 3.3V n 5V- Kh nng cung cp in p thp 1V- Kh nng la chn tn s nh lp trnh.Cc khi lp trnh cho php bn thit lp :- B nh 16K bytes lp trnh c

- 256 bytes RAM- Chuyn i ADC phn gi ti a 14 bt- Chuyn i DAC phn gii ti a 9 bt- Khuch i in p lp trnh c- Cc b lc v so snh lp trnh c- Cc b nh thi v b m 8-16-32 bt- Khi to m CRC v m gi ngu nhin- Hai khi UART song cng- Cc thit b SPI- La chn cc kt ni cho tt c cc chn u ra- La chn vic kt hp cc khi chc nng- La chn cho vic lp trnh trn vng b nh xc nh v ghi c bo v- Cc chn I/O u c cc ch Pull up, Pull down, High Z, Strong, hoc Open pinstate- I2C Slaver hoc Master v Multi-Master c tc ln ti 400KHz- Mch gim st tch hp- Khi to in p tham chiu chnh xc1. Tng quan h thng :

Cc vi iu khin PsoC da trn kin trc CISC 8-bit. Cu trc chung ca chng baogm cc khi sau y :


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Khi CPU : l trung tm ca vi iu khin c chc nng thc hin lnh v iu khinchu trnh hot ng (workflow) ca cc khi chc nng khc

Khi to tn s dao ng : to ra cc tn s thch hp cung cp cho CPU hot

ng cng nh cung cp mt tp hp cc tn s khc nhau cho cc khi c chcnng lp trnh c. Cc tn s c to ra da trn tn s tham chiu bn trongPsoC hoc c cung cp t bn ngoi PsoC.

Khi iu khin Reset : kch hot cho vi iu khin hot ng cng nh gip hiphc trng thi hot ng bnh thng ca VDK khi xy ra li.

B nh thi Watch-Dog : c s dng pht hin ra cc vng lp v hn trongchng trnh.

B nh thi Sleep : c th kch hot vi iu khin theo chu k thot ra khi ch tit kim cng sut. N cng c th c s dng nh mt b nh thi thngthng.

Cc chn vo/ra : gip cho vic giao tip gia CPU v cc khi chc nng s/tngt lp trnh c cng nh giao tip vi ngoi vi.

Khi chc nng s : c kh nng lp trnh c cho php ngi s dng t cuhnh nn cc thnh phn s ty bin.

Khi chc nng tng t : c kh nng lp trnh c cho php ngi s dng tcu hnh nn cc thnh phn tng t nh cc b chuyn i d liu AD/DA, cc blc, b thu nhn m a tn ri rc DTMF, b o, cc b khuch i thut ton OA.

Khi iu khin ngt : c chc nng x l cc yu cu ngt trong trng hp cn

thit.Khi iu khin I2C : gip cho PsoC giao tip vi cc phn cng khc theo chuynI2C

Khi to in p tham chiu : cn thit cho cc thnh phn analog v nm bntrong cc khi tng t c kh nng lp trnh c.

B nhn tng MAC : thc hin cc php nhn c du 8 bt

H thng SMP : c th c s dng nh 1 phn ca b chuyn di in p. V d,n c th cung cp cng sut cho 1 VDK hot ng ch bng 1 pin 1.5V duy nht.2. CPU

Trong sut qu trnh thc hin CT, cc lnh c nap trong b nh chng trnh (bnh nhanh dng flash) ging nh cc VDK thng thng. CPU tm np 1 lnh ti 1thi im t b nh CT, gii m lnh v thc hin cc chc nng tng ng. CPU c5 thanh ghi trong l PC (Program Counter- Thanh ghi m CT) , SP(Stack Pointer-Thanh ghi con tr stack), A(Accumulator-Thanh ghi tch ly), X(Index-Thanh ghi chs), v F(Flag-Thanh ghi c trng thi) c s dng bi ALU v khi gii m lnh,chng cng c s dng kt hp trong qu trnh thc hin lnh.


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Cc thanh ghi trong ca CPU

Thanh ghi m CT - Program counter (PC) : uc dng nh 1 con tr lu tr ach ca lnh s c thc hin tip theo. Vi mi mt cu lnh mi, gi tr ca PC str vo a ch ca lnh tip theo trong b nh CT, lnh ny s c gii m v thcthi.

Thanh ghi con tr stack - Stack pointer (SP) : lu tr a ch ca b nh RAM, lni m d liu c ghi vo hoc c ra nh cc lnh PUSH v POP tng ng. Khinhng lnh ny c thc hin, gi tr ca SP s t ng tng hoc gim tng ng.

Thanh ghi tch ly - Accumulator register (A) : l thanh ghi chnh c dngtrong cc thut ton, cc php ton logic hoc trao i d liu.

Thanh ghi ch s - Index register (X) : c th c s dng nh thanh ghi tchly trong mt s ln cc lnh. Thanh ghi ch s X cng c s dng lu tr ch sa ch (ch s trong cc vng lp)

Thanh ghi c trng thi - Flag register (F) : Cc bt ca thanh ghi ny m t cc

kt qu sau khi mt lnh c thc hin. N c 1 vai tr trong vic la chn 1trang(page) b nh RAM khi vi iu khin PsoC c nhiu hn 256 byte RAM. Bt trngthi Zero(Z) ch ra thanh ghi tch ly lu gi gi tr 0, trong khi bt nh Carry(C) chra rng cc php ton logic hoc cc thut ton c thc hin c nh d liu.

n v ton hc v logic - Arithmetic logic unit (ALU) : L thnh phn chunha ca CPU, c s dng thc hin cc php ton +, -, dch tri/phi cng nhcc php ton logic. D liu x l bi cc lnh ny c th c lu trong cc thanhghi trong A , X hock b nh RAM trong.

Lu : PSoC ch c 5 thanh ghi nhng rt linh hot khi lp trnh do PSoC cRAM ni thi gian truy xut nhanh cho nn khi thc hin trao i d liu cth thc hin lu tr/hoc truy xut trc tip vo RAM ni theo cc modetruy xut a ch m vn t c hiu sut mong mun.3. Khi to tn s dao ng

Khi to tn s dao ng l cn thit cho s hat ng ca CPU cng nh cc khi cchc nng lp trnh c. Mi mt thnh phn lp trnh c yu cu mt tn shot ng ring bit . Vi iu khin PSoC c mt h thng dng to ra cc tn sdao ng khc nhau, bng cch la chn cc tham s tng ng. S di y thhin hai h thng c lp dng to ra hai tn hiu SYSCLK v CLK32 (32Khz)


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+ SYSCLK l dao ng ni ch cht vi tc 24MHz, c s dng lm tn stham chiu cho phn ln cc tn hiu khc.

+ SYSCLKx2 = 2x SYSCLK = 48Mhz

+ 24V1 = SYSCLK/N1 vi N1 l tham s la chn trong khong t 1 n 16.Do vy 24V1 nm trong khong t 1.5MHz (N1=16) ti 24MHz (N1=1).

+ 24V2 = SYSCLK/(N1xN2) vi (N1xN2) l tham s la chn trong khong t 1 Dovy 24V1 nm trong khong t 93.75kHz (N1xN2=16) ti 24MHz (N1xN2=1).+ 24V3 = (24V2, 24V1, SYSCLK hoc SYSCLKx2)/N vi N t 1 n 256.

+ CPU_CLK cung cp tn s dao ng cho CPU nh hng trc tip n tc thchin lnh. CPU_CLK c la chn l mt trong 8 tn s trong khong t 93.75MHzcho ti 24MHz.

Cc tn s 24V1, 24V2, 24V3 v CPUCLK c th c thit lp mt cch d dngthng qua vic thit lp cc tham s tng ng trong Device Editor hoc trong sutqu trnh thc hin chng trnh bng cch thay i 3 b thp nht trong thanh ghiOSCCR0.

CLK32 l tn hiu tn s thp c s dng cho cc khi c chc nng lp trnh c

s dng cho hot ng "wake-up" ca b nh thi Sleep trong trng hp cc tnhiu SYSCLK khc l khng tch cc

Tn hiu SYSCLK c th c to ra nh mt b dao ng ch bn trong IMO-internalmain oscillator trong khi CLK32 c th c to ra nh dao ng cc b bn trongILO- internal local

Sai s gii hn i vi b to dao ng trong l 2.5%. Do vy i vi cc ng dngyu cu chnh xc v thi gian ,tn hiu SYSCLK nn c cung cp t mt dao ng


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tham chiu bn ngoi, doa ng ngoi ny nm trong khong t 1 ti 24 Mhz vc cung cp qua chn P1[4] ca PSoC. Tng t i vi tn hiu CLK32 cng cth c ta ra bng 1 dao ng tham chiu ngoi c chnh xc ph hp vi yucu thit k.

4. Microcontroller power consumption

PSoC thc hin lnh vi tc xp x gp hai ln tn s c cung cp trc tip biCPUCLK.Mc d vy vic cung cp tn s hot ng cao hn khng phi l lun luncn thit v c ngha s t hiu sut tng th tt hn.

Nhc im chnh ca vic tng tn s hot ng chnh l hin tng tng cng suttiu th, y l vn chnh nh hng ti vic cung cp ngun hot ng.

Mt nhc im khc ca vic tng tn s hot ng chnh l s gia tng ca nhiuin t, gy nh hng ti cc thit b xung quanh. Do vy chng ta cn s dng 1tn s thp nht nhng vn p ng yu cu v tc cho ng dng ca chngta.

Tn s mc nh cho VDK ca PSoC l 3MHz y l mt gi tr thch hp i vi yucu tc cng nh cng sut tiu th. duy tr lu nht thi gian hot ngnhm tit kim cng sut tiu th do phn ln cc VDK ch hot ng theo chu k,vic tit kim cng sut tiu th l cn thit v c th t c nh vic bt "VDK"ri vo ch "ng ng" (Sleep mode) mi khi VDK khng gi vai tr quan trng(v d : khi VDK khng x l d liu, trao i vi b nh dng DMA ...)

Vic tit kim cng sut tiu th c th c p dng cho mi tn s khi CPU ngngthc hin lnh, ng thi CPU32 v SLEEP l khng tch cc. Vi iu khin c"nh thc" (wake-up) khi ch Sleep bng cch Resset hoc bng 1 ngt c tora bi b nh thi Sleep hoc 1 khi s c s dng tn s CPU32K

Cc chn GPIO (General Purpose In/Out) cng c th c s dng nh thc

CPU. B nh thi Sleep hiu hin 1 b nh c bit c vai tr ch o trong vic tora mt ngt c chu k c kh nng "nh thc" CPu ra khi ch tit kimk cngsut. Tn s ca ngt to bi b nh thi Sleep nm trong khong t 1 ti 512 KHz

Sau khi "nh thc" VDK c th thc hin cc lnh bnh thng cho ti khi chu k"ng ng" tip theo v ch mt ngt "nh thc" khc. Ch c 1 kiu ngt ph hpcho vic nh thc VDK khi ch "ng ng" Sleep

5. Reset

PORTrong qu trnh VDK hot ng, s thay i in p cung cp lun din ra iu nyrt nguy him nu nh in p cung cp thp hn 1 gii hn xc nh, lc ny VDKc nhng hot ng khng th d on c. Trong nhng trng hp pht hinin p cung cp nh hn gii hn cho php, VDK c


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chuyn ti Power trong ch Reset v gi nguyn ch ny cho ti khi in pn nh nm trn mc gii hn, mc gii hn ny c th c nh ngha nh thams Trip Voltage

XRESTn hiu reset ngoi cho php ngi s dng thit lp cho VDK vo trng thi khi

ng thng qua mt phm nhn. Hot ng Reset t c khi tn hiu XRES manggi tr "1". Mch reset n gin c th c thit k bng cc in tr pull-down v 1chuyn mc.

WDRTn hiu khi to li Watch dog reset (WDR) c dng trnh cc vng lp v hntrong phn mm hoc cc chng trnh sai st nghim trng, gip cho h thngquay tr li t ch bt u (start state).

Tn hiu WDR c to ra t b nh thi Watch dog timer (WDT) c khi ng litheo chu k bn trong mt chng trnh chnh, sau cc chng trnh con tngng c thc hin

Trong ch bnh thng (normal mode) sau mt thi gian nht nh, WDT ckhi ng li mt ln v chng trnh con vn tip tc thc hin, nhng nu mtkhi lnh trong 1 chng trnh con c sai st WDT khng th reset, v WDR xy ra.

6. Vo/ra s

PsoC giao tip vi cc ngoi vi thng qua cc chn vo ra In/Out. C 8 chn hpthnh 1 group c th c truy nhp tc thi nh cc thnh phn ca 1 cng. Mcd vy, cc cng c s hiu khc nhau ty thuc vo loi PsoC m chng ta s dng.

Thao tc c v ghi d liu c thc hin ging nhau trong mi trng hp. Ccthanh ghi truy nhp ca cc cng c lu tr bn trong khng gian a ch thanh

ghi vi nh danh l PRT0DR, PRT1DR, PRT2DR, PRT3DR, PRT4DR or PRT5DR.


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* Ghi d liu qua cng- Gi tr cn ghi c ghi vo thanh ghi PRTxDR thng qua vic thit lp gi tr tngng cho thanh ghi nh s dng mt mch khi to iu khin cc trang thi cho ccchn ca cng. Mch khi to ny c th gi d liu trc tip (strong), thng qua ccin tr pull-up hoc pull-down hoc knh mng h u ra- Bn cnh , c kh nng cch ly gi tr thanh ghi khi trng thi ca cc chn (Hi-

Z)


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* c d liu t cng- Gi tr c c t a ch thanh ghi PRTxDR c lu tr vo thanh ghi A.

* Drive ModeC 8 mode cng kt ni cc thanh ghi vi cc chn thuc cng c la chon

thng qua 3 bt PRTxDM2, PRTxDM1 and PRTxDM0 ng vi cc thanh ghi PRTxDRtng ng

+ Strong mode : c dng khi cn kt ni trng thi trong cc thanh ghi PRTxDRtrc tip ti cc chn ca cng. Cch ny c s dng khi chn ca cng l uvo.

+ Analog Hi-Z mode :c s dng khi kt ni vi cc tn hiu analog nh cc uvo ca ADC. Trong trng hp ny, tt c cc lin kt trong gia cc thanh ghiPRTxDR v chn b tch ri do vy trnh c nhiu

+ in tr Pull-up hoc pull-down : c s dng khi kt ni vi phm bm hoc ccthit b khc. Nhng in tr ny xc nh gi tr trn cc u vo khi phm bmcha c nhn.

7. Vo/ra tng t

Mt s chn vo/ra bn cnh cc chc nng tiu chun cn c cc chc nng trao id liu vo ra dng analog. Cc chn ca cng P0 v 4 chn nh nht ca cng P2 coth c s dng nhn tn hiu analog. Cc u vo ca cng P0 c kt ni ticc khi analog thng qua cc b ghp knh analog trong khi 4 chn nh nht caP2 c kt ni trc tip ti cc khi chuyn mch t in(SC-Switched Capacitor)lp trnh c.

Cc chn P2[4] v P2[6] c th nhn gi tr in p tham chiu t bn ngoi. Ccchn u ra t cc khi analog c th c kt ni ti 4 b m u ra, chng c


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kt ni ti cc chn to P0[2],P0[3],P0[4], v P0[5] ( 4 chn ny c chc nng In/Outtrong khi P0[0],P0[1],P0[6], v P0[7] ch c th l input)

8. Truy nhp cc khi s lp trnh cCc thnh phn tn hiu s c lu trc bn trong cc khi lp trnh c, chngkhng c kt ni trc tip ti cc chn vo ra. Hot ng ca cc khi s c khnng lp trnh c th hin trong hnh di y, m t 1 nhm 4 khi s lp trnhc.

Chng ta c th thy rng cc chn c lin kt thng qua cc ng dn (line)chung, cc ng dn bn trong cc khi s, v cc b ghp knh. PsoC c th c1,2, hoc 4 nhm cc khi s lp trnh c ph thuc vo tng h PsoC c th

1.9 Cc ng tn hiu vo dng chung (GIL)

Global input lines (GIL) : C chc nng kt ni cc chn input vi u vo ca ccMux. GIL c chia thnh hai nhm chn (Global input odd GIO) v (Global inputeven GIE) ph thuc vo ch s ca cng kt ni vi Mux, theo nguyn tc cng chs chn. Ngha l ng dn GIO_0 c th kt ni vi chn s 0 ca tt c cc cngc ch s cng l l nh : P1[0], P3[0], P5[0]..


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Ghp ni vi Mux

Cc b Mux c ghp ni vi GIO v GIE theo hnh v di y

1.10 Cc khi s lp trnh c

Cc khi s lp trnh c c th c cu hnh thnh cc b nh thi-Timer, bm-counter, iu ch rng xung PWM, b ta m PRS (Pseudo Reed-Solomon)-CRC v cc giao tip ngoi vi nh SPI, IrDA, UART ty theo yu cu vmc ch ca ngi thit k.


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Chc nng ca tng khi s lp trnh c lit k theo bng sau :

Tn s gi nhp (CLK) :Tn s gi nhp l cn thit cho mi thnh phn tn hiu s, ph thuc vo tc yu cu, chng ta c mt tp hp cc tn s la chn

- Cc tn s dao ng ni : VC1, VC2, VC3, SYSCLKx2, CPU_32- Cc dao ng t cc khi lin quan : nh Timer, Counter, PWM - Tn hiu Broadcast (BC)- Cc chn tn hiu vo RI v ra RO

u vo ca cc thnh phn :

Phn ln cc thnh phn tn hiu s bn cnh tn s gi nhp cn c 1 hoc hai uvo s. V d trong trng hp ca count v PWM, tn hiu u vo c s dng khi to b m. C mt vi kh nng khc nhau cho vic la chn u vo chocc thnh phn


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- Cc chn RI (tn hiu ngoi)- Cc chn RO (khi cc khi c kt ni lin tip)- u ra t cc b so snh analog.- Cc tn hiu logic 0 (GND),1(VDD)

u ra ca cc thnh phn :

Cc u ra s ca cc thnh phn tn hiu s c s dng kt ni cc khi lptrnh c vi cc chn tn hiu ra RO.

B ghp knh - MultiplexerPh thuc vo trng thi ca Mux (a ch) cc chn tn hiu ra RO hoc cc chn tnhiu vo RI ca cc khi lp trnh c c th c kt ni vi nhau.

Mch LogicCc mch logic c th l :- La chn 1 trong hai tn hiu lm u ra- Cng NOT- Thc hin cc php ton logic AND, OR, XOR

Mch iu khin tn hiu rau ra ca cc mch logic c th c kt vi 4 mch iu khin u ra, chng ckt ni ti 1 hoc nhiu cc ng tn hiu GOL(global output lines )u ra ca cc khi lp trnh c cng c nh ch s, do n ch kt ni vicc chn GOO hoc GOI cng ch s hoc c ch s ln hn 4 n v so vi chng.


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