sequential logic
DESCRIPTION
Discovery!TRANSCRIPT
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SEMICON Solutions
Thit k mch tun t
Trnh by: ng Tng Dng
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Mch t hp
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Th no l my bin trng thi
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M hnh Mealy
C1
x(t)
s(t+1)
s(t)
z(t)
clk
init
trng thi hin ti
input
hin ti
trng thi k tip
C2
Output da vo trng thi v input hin ti
Sta
te R
egis
ter
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M hnh Moore
Sta
te R
egis
ter
C1
x(t)
s(t+1)
s(t)
z(t)
clk
init
Input
hin ti
C2
Output ch da vo
trng thi
trng thi k tip trng thi
hin ti
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V d v mch tun t
Output
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A(t+1)
=DA = AX + BX
B(t+1)
=DB = AX
Y = (A + B)X
V d v mch tun t
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Bng trng thi 2 chiu
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S trng thi
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S dng s trng thi
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Using J-K Flip Flops
JA = B KA = BX
JB = X KB = AX + AX
Thit k my trng thi dng J-K Flip Flop
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Thit k mch tun t
Thc hin s trng thi ca bng trng thi t yu cu ca mch trng thi.
Nu ch c 1 biu trng thi sn sng, th thc hin bng trng thi.
Dng m nh phn cho cc trng thi.
Phng trnh input Flip-Flop bt ngun trong mc trng thi k tip trong bng m ha trng thi.
Phng trnh output Flip-Flop bt ngun t mc output trong bng m ha trng thi.
n gin ha phng input v output .
V s logic vi DFF v cc cng , c th ha cc input v output trong DFF.
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Chng ta cn nhng bit ng vo ln lt 1101.
VD: sp xp tun t
Nu u vo l A = 1 trng thi A chuyn sang trng thi B v output ca A l 0 (khng pht hin c bit 1101)
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Nu chng ta ang trng thi B (iu ny c ngha l rng chng ta c a = '1 ngay lp tc trc v input k tip l a = 1 Sau chng ta tm cch lm cho c thnh cng bit 1101 sau chuyn sang trng thi C
bit u tin
L A l 1
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Bit tip theo, chng ta c chui 1101 tip theo l chui 0 nu chng ta c l 0 th chuyn sang trng thi D --nu bo rng vn bng 0 , chng ta cha c c chui
Sau trng thi D, chng ta thnh cng nu A = 1 c c v tin hnh. u ra s l mc cao hoc 1.
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Chng ta khng cn tin hnh sang trng thi E, cho d, nu chng ta nhn ra 1101, chng ta khng nhng pht hin 1 chui bit m cn bit cch pht hin chui 1101 khc. dng nh 1101101.
2 chui
Chng ta t output mc cao sau chuyn sang trng thi B
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S trng thi
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Coding my trng thi Hng dn
Tch ri din t my trng
thi thnh 2 quy trnh
Mch t hp
Mch tun t
Dng din t `define
nh ngha vector trng thi.
Gi logic FSM v logic
non-FSM trong nhng
module tch ri.
Gn gi tr mc nh
cho my trng thi.
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Chng ta cn phi t trng thi tht bi, khi khng c c bit 1101
bt u 0 bit th 2 l 0
bit th 3 l 1 ngha l Chng ta c chui 111 . iu ny ch i chng ta t 1 bit 0
A 0 l bit cui cng ( A 0 is the last bit (1100) v tr li ban u
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Bi Tp
Thit k s mch s dng DFF
Vit Verilog cho mch va thit k
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Cu Hi & Tr Li