孙灯亮 aerospace and defense seminar 通信和雷达系统：数字基带和数字中频...

孙灯亮

Aerospace and Defense SeminarAerospace and Defense Seminar

通信和雷达系统：数字基带和数字中频信号发生和分析技术


2 Digital Baseband and Digital IF--Signal Analysis and Signal Generation Techniques

背景：• 通信和雷达系统中越来越多的使用混合信号

– 模拟信号以数字方式来表示– 大量的使用 ADC, DAC, digital filters, converters, pre-distortion, crest factor

reduction 和其它 DSP– 处理单元大量使用 FPGA, ASICs, 通用微处理器 , 内存– 由于使用了数字处理功能，从而增强了系统的性能，灵活性，功能和耐用性

• 模拟部分在系统中占有不可替代的地位• 由于系统的复杂性，高效的设计和测试能力是目前的一个挑战：

– 如何产生和分析复杂的数字信号– 数字和模拟信号的相关测量– 在当前的技能，工具和技术的基础上提高生产力



AgilentAgilent仪器能仪器能提供什提供什么功能么功能？？

数字形式激励信号（数字 IQ或数字中频）模拟 IQ或基带信号微波射频信号

宽带 IQ信号

微波射频信号模拟 IQ或基带信号

射频或多通道信号

16800/900逻辑分析仪80000B宽带示波器PSA矢量分析仪

E4438C/E8267D 矢量信号源

N5102A数字信号接口N6030A宽带任意波发生器

数字信号

微波射频电路

中频电路基带处理电路

• 测试仪表提供与各种被测电路匹配的接口，可独立完成微波射频，中频，数字电路的测试。• 仪表具备矢量功能，提供矢量信号合成和信号矢量分析功能。先进仪表具备大带宽和深存储能力。• 仪表具备开放的数据接口。



内容安排• 混合信号测试案例• 测试分析工具

– 数字 I/Q 和中频信号发生– 数字 I/Q 和中频信号分析

• 数字无线电测试分析：探测分析 FPGA内部信号



雷达中的数字化信号和 DSP ( 以脉冲压缩为例 )

COHO STALO

TIMING SYNC

CHIRP

CHIRP(SPREAD SPECTRUM)

Waveform Exciter

( Digital Synthesizer)

PulseModulator

To SignalProcessor

IFA LNA

PA

SYNCHRONOUSI/Q

DETECTOR

RECEIVERPROTECTOR

I

Q

Pulse CompressionFilter (Correlation Filter)



各种测试工具及其联用Baseband Studio for waveform

capture and playback

Baseband Studio PCI card w/ DRAM

ESG/MXG/PSG Signal Generators

ADS

16800, 1690, or 16900 logic analyzers and pattern generators

89601A VSA Software

Baseband Studio Digital Signal

Interface Module



基带信号发生套件 Baseband Studio

多径衰落信号捕获和回放

N5101A Baseband Studio PCI CardN5102A Digital Signal

Interface Module

数字信号的输入 /输出

PSG E8267D Vector Signal Generator

ESG/MXG Vector Signal Generator



N5110B 基带信号分析套件进行信号的捕获和回放N5110B SW

N5101A PCI card

Opt 022 DRAM

N5102A Digital Signal Interface

Module

DUT Playback

or ESG/PSG

DUT


Module

Capture



ESG/MXG/PSG Signal Generators

ADS

16800A/16900A pattern generator


数字 I/Q 或 IF 信号发生Baseband Studio for waveform


Baseband Studio Digital Signal

Interface Module



数字 I/Q 和 IF 信号发生的可选方案 (1) FPGAs

• 非常灵活• 要求设计人员对 FPGA 和 DSP 的设计有较高的了解• 需要自行开发软件

DUT

用户自行设计的开发板

or

已有的 FPGA解决方案



数字 I/Q 和 IF 信号发生的可选方案 (2)Pattern Generators-码型发生器

• 逻辑分析仪的一部分• 逻辑分析仪是最强的数字分析方案• 码型发生器并不是专为 I/Q 和 IF 信号发生而设计的• 适用于低速及内存需求不高的信号发生需求

DUT

Pattern Generator (within logic analysis system)



DUT

数字 I/Q 和 IF 信号发生的可选方案 (3)在传统模拟信号源的基础上加入数字输出通道

• 可使用任意波型发生器进行预先定义的信号进行发• Agilent 的方案针对数字 I/Q 和 IF 进行优化设计

Signal Generator with Digital Outputs



数字 I/Q 和 IF 信号发生的可选方案 (4) 基带信号发生套件进行波形的捕获和回放

• 专门进行数字 I/Q 和数字 I/F 的设计• 可进行高速和长时间波形的验证• 只需最少的硬件 !! – 低价位 !!• 如果需要射频的激励信号 , 假如射频或微波源

N5110B SW

N5101A PCI card


ModuleDUT



数字 I/Q 或 IF 信号分析Baseband Studio for waveform


ADS

16800, 1690, or 16900 logic analyzers

89601A VSA software




数字 I/Q 或 IF 信号分析可选方案 (1)逻辑分析仪配以矢量信号分析软件进行数字矢量分析

• 可进行各种标准及用户自定义的时域 , 频域 , 和调制域分析• 逻辑分析仪提供数字总线分析和故障调试

DUT

Logic analyzer with 89601A VSA software



数字 I/Q 或 IF 信号分析可选方案 (2)利用矢量信号分析仪对基带分析套件进行信号的捕获和矢量分析

DUT

N5110B SW

N5101A PCI card


Module

• 可进行各种标准及用户自定义的时域 , 频域 , 和调制域分析• 不需要逻辑分析仪• 需要的硬件少 !! – 低价位 !！

89600 VSA SW



数字 I/Q 或 IF 信号分析可选方案 (3)带有数字输入的信号源及射频信号分析仪

DUT

• 信号源作为一个标准的上变频器将 IF 和 I/Q 信号变到 RF• 在射频段进行信号分析• 信号源可以用来模拟产生不完善射频单元产生的损伤效果

RF Signal Analyzers/ScopesSignal Generator with Digital Inputs



时域分析• 基带时域

– 波形分析– I/Q 通道分析

• “ 中频时域”– 示波器式的分析方法– 射频包络分析—脉冲形状和时序分析– 时域分析参数 --CCDF, peak/average power ratio

• 时域参数 , 时序验证



频域分析• 频谱

– 杂波– 交调– 临道功率– 占用带宽

• 网络测量– Gain/loss

– Flatness/ripple, group delay

– Channel match

• 时间门测量功能



模拟调制• AM/FM/PM• 调制质量• 相位噪声• 互调或 AM-PM 的转换等



把各种分析工具联合起来进行混合系统的设计和测试

• 以 PC 为核心的逻辑分析仪

• 以矢量信号分析软件（ VSA Software ）为核心进行信号的测量，显示和对数据的捕获进行控制



传统的逻辑分析功能• 对数字总线进行验证和调试

– 微处理器– 内存– I/O 总线 (USB, Ethernet, PCI 等 .)

– 数字信号处理• 定时和状态分析• 不同总线的相关测试



数字信号 vs. 信号的数字化

tsetu

p

thold

ADC

CLK

DAT

CLK

1V = 0xff0V = 0x00

• 信号的数字化– N bits, 并行或串行– 无符号格式或 2 的补码格式– I/Q, IF, polar格式 – 时钟– 建立时间 /保持时间



数字信号分析和矢量信号分析数字分析• 分析多总线信号• 理解多总线的时序分析• 以码型方式为触发矢量信号分析• 频谱分析，测量信号的质量• 解调，调制质量• 以功率电平进行触发



相关的逻辑分析的基础知识采样技术• 比较器 + 采样器• 可编程的门限电平定时分析方式• 异步过采样方式• 用于边缘测试状态分析方式• 以目标时钟进行同步采样• 可以调整采样位置

VthreshS/H

Clk

0/1cmp

Mode used for Digital Signal

Analysis

Mode used for Digital Signal

Analysis



逻辑分析仪总线 / 信号配置显示界面The “Pods” – probe cables

The channels of each podClick & Drag to assign

The buses



逻辑分析仪采样方式配置界面Set buffer depth and trigger position

Sample on rising, fallingor both edges

Sampling mode



异步采样方式 vs. 同步采样方式

Waveform from Asynchronous (Timing)

Capture

Waveform from Asynchronous (Timing)

CaptureWaveform from

Synchronous (State) Capture

Waveform from Synchronous (State)

Capture



首先要验证数据相对时钟的合适的采样点

Eye Finder Pro centers sampling on the center of the

data valid window and provides eye diagrams on all

channels

Eye Finder Pro centers sampling on the center of the

data valid window and provides eye diagrams on all

channels



数字无线电测试分析：探测分析 FPGA内部信号



Digital Radio Architecture: Functional Description

RF ASIC(Analog)Digital/Baseband ASIC/FPGA/DSP

IF Filter

DAC PA

RF LO

TRANSMITTER +

Symbol Encoder converts the bits to polar domain-into IQ symbols

SymbolEncoder

BB Filter

BB Filter

I

Q

Bits of Data-modulation

format already known-

Baseband-all encoding as

already taken place

Upsampling and BB Filtering-US moves the sample frequency up to allow us to filter and to prevent aliasing.

IF LO

0 deg

90 deg

Offset by 90‘ and it’s now considered to be at IF

Modulate the Carrier and

upconvert to RF

DAC

DAC

The DAC can go either in the Baseband chip or the RF chip

Passband filter to eliminate out added noise, spurs, etc. Implemented in

hardware.

These filters are “BB Transmit” filters and are generally Root Nyquist (or root raised cosine), Rectangular (none), or Gaussian.

Sum IQ and Output at IF



RF ASICDigital/Baseband ASIC/FPGA

Digital Radio Architecture: Wire Conventions

DAC

IF Filter

PA

RF LO

Baseband IQ, differential/single

Baseband IQ, differential/single

IF, differential/single

RF, differential/single

+SymbolEncoder

DAC

DAC

BB Filter

BB Filter

0 deg

90 deg

IF LO

I

Q

TRANSMITTER



Digital Radio Architecture: FPGA Digital Radio

Let’s see how this works in a real world example!



FPGA QAM 16 Digital Radio

• The FPGA Radio was built to demonstrate how a Software Defined Radio can work.

• The FPGA has been loaded with the digital portion of a QAM 16 Radio.

• We can see bank by bank how the digital radio works and what the output of each of these areas looks like.

• Agilent’s Digital Vector Signal Analyzer (DVSA), using the 16800 or 16900 series Logic Analyzers and the B4655A FPGA dynamic probe in conjunction with the 89601A Vector Signal Analyzer (VSA) software enables us to make measurements on the digital portion of the radio.



FPGA QAM 16 Measurement Setup

JTAG

Bank 1

+SymbolEncoder

BB Filter

BB Filter

0 deg

90 deg

IF LO

I

Q

Bank 0 Bank 1

Bank 2 Bank 3PreFilterI/Q

IF OutPreCombineIF

PostFilterI/Q

MUX

To Logic Analyzer Connection(12 Pins for Debug of 24 signals at a time)

Agilent’s Logic Analyzers with B4655A FPGA Dynamic Probe and

89601A software for debug of digital radios.

Agilent’s Logic Analyzers with B4655A FPGA Dynamic Probe and

89601A software for debug of digital radios.

FPGA QAM 16 BoardFPGA QAM 16 Board

The combination of Agilent’s Logic Analyzers, FPGA Dynamic Probe and the 89601A VSA software is a powerful tool that allows us to completely analyze and debug our digital radio design.

The combination of Agilent’s Logic Analyzers, FPGA Dynamic Probe and the 89601A VSA software is a powerful tool that allows us to completely analyze and debug our digital radio design.



FPGA Dynamic Probe Adds Visibility

ATC

2Insert ATC2 core with ChipScope ProInsert ATC2 core

with ChipScope Pro

FPGAPC Board

B4655A FPGA Dynamic Probe SW application supported by

16800/16900

B4655A FPGA Dynamic Probe SW application supported by

16800/16900

JTAG

Control access to new signals via JTAG

Control access to new signals via JTAG

ParallelProbe core outputProbe core output



+SymbolEncoder

BB Filter

BB Filter

0 deg

90 deg

IF Filter

DAC PAIF LO

RF LO

I

Q

TRANSMITTER

Bank 0 Bank 1 Bank 2 Bank 3PreFilterI/Q

IF OutPreCombineIF

PostFilterI/Q

MUX


JTAG

Base stations – FPGA’s infinal product

Handsets – FPGA’s used toemulate ASIC



Bits of Data-modulation format already chosen-Baseband-all encoding has already taken place

Symbol Encoder converts the bits to polar domain

Upsampling (US) and BB Filtering-US moves the sample frequency up to allow us to filter and to prevent aliasing.

Offset by 90‘ and it’s now considered to be at IF

Modulate the Carrier and

upconvert to RF

FPGA QAM 16 Radio Functional Diagram


Passband filter to filter out added noise, spurs, etc. Implemented in hardware.

Sample rate 25 MS/s

Sample rate 100 MS/s 4X oversampling



+SymbolEncoder

BB Filter

BB Filter

0 deg

90 deg

IF Filter

DAC PAIF LO

RF LO

I

Q

TRANSMITTER


IF OutPreCombineIF

PostFilterI/Q

MUX


JTAG

Demodulation here is of no value-these are just raw symbols and there’s nothing to demodulate.

The spectrum will be full of aliasing a well. The IQ diagram

can be viewed, however.

Here we can check things like the filtering and spectrum (aliasing)

In Bank 2, we check to see that the I and Q are

properly separated and 90 degrees out of phase,.

At full IF the IQ have been

summed. We can check EVM,

Constellation, DC offset etc. If

analog, a spectrum analyzer can be used. If digital, a logic analyzer is

needed, with VSA software.

FPGA QAM 16 Radio: Measurement Points



FPGA QAM 16 Radio Bank 0

SymbolEncoder

Bank 0PreFilterI/Q

MUX

To Logic Analyzer Connection(12 Pins for Debug of 24 signals at a

time)

JTAG

Bits of Data-modulation format already chosen-Baseband-all encoding as already taken place

TRANSMITTER

Sample rate 25 MS/s

Q

I




•Using Agilent’s 89601A VSA software we can see how our design is shaping up.

•At Bank 0, there’s not much to look at because these are raw symbols.

•The Frequency domain signal doesn’t show much because it’s full of aliasing products.

•The IQ diagram shows that the symbol mapping is effective.



SymbolEncoder

BB Filter

BB Filter

I

Q

TRANSMITTER

Bank 0 Bank 1PreFilterI/Q

PostFilterI/Q

MUX


JTAG





Upsampling and BB Filtering-US moves the sample frequency up to allow us to filter and to prevent aliasing.

100 MS/s; 4X oversampling

FPGA QAM 16 Radio Bank One



FPGA Demo Bank 0 to Bank 1: 89601A

•Notice the enormous difference in the spectrums!

•Applied filtering has removed the aliasing.

•The spans are different because we have applied 4X upsampling at Bank 1.

Pre-filter Post-filter



SymbolEncoder

BB Filter

BB Filter

0 deg

90 deg

IF LO

I

Q

TRANSMITTER

Bank 0 Bank 1 Bank 2PreFilterI/Q

PreCombineIF

PostFilterI/Q

MUX


JTAG






In Bank 2, we check to see that the I and Q are

properly separated and 90 degrees out of phase.



FPGA QAM 16 Radio: Bank 2, Spectrum

We can look at the IF spectrum-prior to summing and see that the Iif and Qif are approximately equivalent in the spectrum. Although these signals appear to be at -25 MHz and + 25 MHz, this doesn’t mean anything-because we are dealing with digital data.

We can look at the IF spectrum-prior to summing and see that the Iif and Qif are approximately equivalent in the spectrum. Although these signals appear to be at -25 MHz and + 25 MHz, this doesn’t mean anything-because we are dealing with digital data.



FPGPA QAM 16 Radio: Bank 2, Phase

Iif and Qif are 90 degrees out of phase.

Iif and Qif are 90 degrees out of phase.

0 to 1800 to 180

-90 to 90-90 to 90



A typical 16 QAM signal has 16 different states

Since we can look only at Iif or Qif, there are only 4 possible states that can be shown prior to summing.

Since we can look only at Iif or Qif, there are only 4 possible states that can be shown prior to summing.

FPGA QAM 16 Radio: Bank 2, Constellation States



+SymbolEncoder

BB Filter

BB Filter

0 deg

90 deg

IF LO

I

Q

TRANSMITTER


IF OutPreCombineIF

PostFilterI/Q

MUX


JTAG

At full IF the IQ have been summed. We can check EVM, Constellation, DC offset etc. If analog, a spectrum analyzer can

be used. If digital, a logic analyzer is needed, with VSA software.





Digital Radios: Bank 3 Final IF

I-Eye

Q-Eye

Error Vector Spectrum

In

Constellation

Spectrum

EVM, Phase error, Frequency error, etc.



• Quadrature Amplitude Modulation, or QAM. is a combination of phase and amplitude modulation.

and is used extensively in A/D applications, 3G systems, modems (cable TV), and Digital Video broadcasting because it is very robust and can carry high data rates.

• Filtering is typically Root Nyquist (Or Root-Raised Cosine).

• QAM has inherent linear errors (amplitude/magnitude) so quite often an Equalizer is used. An Equalizer smoothes out the linear errors to give a flatter frequency response. Most QAM receivers utilize some type of equalizer. This is also true with Orthogonal Frequency Division Multiplexing (OFDM) receivers (and with others).

The Advantages of Equalization

Agilent’s 89601A VSA software provides a feed forward Equalizer to view your signal as your receiver would. This allows for more efficient design tradeoffs in the transmitter.

Agilent’s 89601A VSA software provides a feed forward Equalizer to view your signal as your receiver would. This allows for more efficient design tradeoffs in the transmitter.



Effect of Equalization on the IF Signal

2% drop in EVM corresponds to about 17 dB drop. This is very significant. There is also almost 2.5% drop in Phase, Magnitude and Frequency Error.

2% drop in EVM corresponds to about 17 dB drop. This is very significant. There is also almost 2.5% drop in Phase, Magnitude and Frequency Error.



+SymbolEncoder

BB Filter

BB Filter

0 deg

90 deg

IF LO

I

Q

TRANSMITTER


IF OutPreCombineIF

PostFilterI/Q

MUX


JTAG

RF/IF Hardware is generally fixed and cannot be changed on the fly.

IF Filter

DAC PA

RF LO

FPGA QAM 16 Radio Completed



总结：• 通信和雷达系统的数字化信号和 DSP现在可以简单的和模拟系统一样来进行测试了 .

• 现在的安捷伦的矢量信号分析仪，源和逻辑分析仪可以连接起来直接用来分析数字基带，中频信号 .

• 安捷伦的新的基带信号发生套件，可以以最小的硬件配置来进行数字I/Q 和数字中频信号的产生和分析，波形捕获和回放。

孙灯亮 aerospace and defense seminar 通信和雷达系统： 数字基带和数字中频...

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孙灯亮 aerospace and defense seminar 通信和雷达系统：数字基带和数字中频...