2sk2479
TRANSCRIPT
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MOS FIELD EFFECT TRANSISTO
DESCRIPTION
The 2SK2479 is N-Channel MOS Field Effect Transistor de-
signed for high voltage switching applications.
FEATURES
Low On-Resistance
RDS(on) = 7.5 (VGS = 10 V, ID = 2.0 A)
Low Ciss Ciss = 485 pF TYP.
High Avalanche Capability Ratings
ABSOLUTE MAXIMUM RATINGS (TA = 25 C)
Drain to Source Voltage VDSS 900 V
Gate to Source Voltage VGSS 30 V
Drain Current (DC) ID(DC) 3.0 A
Drain Current (pulse)* ID(pulse) 8.0 A
Total Power Dissipation (Tc = 25 C) PT1 70 W
Total Power Dissipation (TA = 25 C) PT2 1.5 W
Channel Temperature Tch 150 C
Storage Temperature Tstg 55 to +150 C
Single Avalanche Current** IAS 3.0 A
Single Avalanche Energy** EAS 5.4 mJ
* PW 10 s, Duty Cycle 1 %
** Starting Tch = 25 C, RG = 25 , VGS = 20 V 0
2SK2479
SWITCHINGN-CHANNEL POWER MOS FET
INDUSTRIAL USE
PACKAGE DIMENSIONS
(in millimeters)
Document No. D10271EJ1V0DS00 (1st edition)
Date Published August 1995 PPrinted in Japan
199
DATA SHEET
10.6 MAX.
10.03.00.3
3.6 0.2
5.9
MIN.
15
.5MAX.
6.0
MAX.
12.7
MIN.
1.3 0.2
0.75 0.1
2.542.54
4.8 MAX.
1.3 0.2
0.5 0.2
2.8 0.2
1. Gate2. Drain3. Source4. Fin (Drain)JEDEC: TO-220AB
MP-25 (TO-220)
4
1 2 3
Body
Diode
Source
Drain
Gate
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ELECTRICAL CHARACTERISTICS (TA = 25 C)
CHARACTERISTIC SYMBOL MIN. TYP. MAX. TEST CONDITIONS
Drain to Source On-State Resistance RDS(on) 5.6 7.5 VGS = 10 V, ID = 2.0 A
Gate to Source Cutoff Voltage VGS(off) 2.5 3.5 VDS = 10 V, ID = 1 mA
Forward Transfer Admittance | yfs | 0.8 VDS = 20 V, ID = 2.0 A
Drain Leakage Current IDSS 100 VDS = VDSS, VGS = 0
Gate to Source Leakage Current IGSS 100 VGS = 30 V, VDS = 0
Input Capacitance Ciss 485 VDS = 10 V
Output Capacitance Coss 75 VGS = 0
Reverse Transfer Capacitance Crss 10 f = 1 MHz
Turn-On Delay Time td(on) 12 ID = 2.0 A
Rise Time tr 5 VGS = 10 V
Turn-Off Delay Time td(off) 35 VDD = 150 V
Fall Time tf 8 RG = 10
Total Gate Charge QG 17 ID = 3.0 A
Gate to Source Charge QGS 3 VDD = 450 V
Gate to Drain Charge QGD 8 VGS = 10 V
Body Diode Forward Voltage VF(S-D) 1.0 IF = 3.0 A, VGS = 0
Reverse Recovery Time trr 670 IF = 3.0 A, VGS = 0
Reverse Recovery Charge Qrr 3.0 di/dt = 50 A/ s
UNIT
V
S
A
nA
pF
pF
pF
ns
ns
ns
ns
nC
nC
nC
V
ns
C
The application circuits and their parameters are for references only and are not intended for use in actual design-in's.
Test Circuit 3 Gate Charge
VGS = 20 - 0 V
PG
RG = 25
50
D.U.T.L
VDD
Test Circuit 1 Avalanche Capability
PG. RG = 10
D.U.T.
RL
VDD
Test Circuit 2 Switching Time
RG
PG.
IG = 2 mA
50
D.U.T.
RL
VDD
IDVDD
IASVDS
BVDSS
Starting Tch
VGS
0
t = 1us
Duty Cycle 1 %
VGSWave Form
IDWave Form
VGS
ID
10 %
10 %
0
0
90 %
90 %
90 %
10 %
VGS (on)
ID
ton toff
td (on) tr td (off) tft
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TYPICAL CHARACTERISTICS (TA = 25 C)
FORWARD BIAS SAFE OPERATING AREA
VDS - Drain to Source Voltage - V
ID-DrainCurrent-A
DRAIN CURRENT vs.DRAIN TO SOURCE VOLTAGE
VDS - Drain to Source Voltage - V
ID-DrainCurrent-A
FORWARD TRANSFER CHARACTERISTICS
VGS - Gate to Source Voltage - V
ID-DrainCurrent-A
0.1
DERATING FACTOR OF FORWARD BIASSAFE OPERATING AREA
TC - Case Temperature - C
dT-PercentageofRatedPower-%
TOTAL POWER DISSIPATION vs.CASE TEMPERATURE
TC - Case Temperature - C
PT-TotalPowerDissipa
tion-W
0 200 20 40 60 80 100 120 140 160
20
40
60
80
100
40 60 80 100 120 140 160
70
60
50
40
30
20
10
0.1
1
1
10
100
10 100 1000
TC = 25 CSingle Pulse
0 20 30 40
5
1.0
10
100Pulsed
VDS = 10 V
10
10
0
Pulsed
5 10 15
ID(pulse)PW
=100s1m
s10ms
RDS(
on)Lim
ited(
atVG
S=10
V)
VGS = 20 V
10 V
8 V
6 V
TA = 25 C
25 C
75 C
125 C
PowerDissipationLim
ited
ID(DC)
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TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH
PW - Pulse Width - s
rth(t)-TransientThermalResistance-C/W
FORWARD TRANSFER ADMITTANCE vs.DRAIN CURRENT
ID - Drain Current - A
|yfs|-ForwardTransferAdmittance-S
DRAIN TO SOURCE ON-STATE RESISTANCE vs.GATE TO SOURCE VOLTAGE
VGS - Gate to Source Voltage - VRDS(on)-DraintoSourceOn-StateResistance-
0 10
DRAIN TO SOURCE ON-STATERESISTANCE vs. DRAIN CURRENT
GATE TO SOURCE CUTOFF VOLTAGE vs.CHANNEL TEMPERATURE
Tch - Channel Temperature - C
VGS(off)-GatetoSourceCutoffVoltage-V
ID - Drain Current - ARDS(on)-DraintoSourceOn-StateResistance-
0.1
100
0.01
0.1
1.0
10
1 000
10 000
1 m 10 m 100 m 1 10 100 1 00010 100
VDS= 20 VPulsed
1 0.1
0.1
1.0
10
1.0 10
5
20 30
Pulsed
1.0 100
5
VDS = 10 VID = 1 mA
50 0 50 100 1500
1
Single Pulse
Tc = 25 C
10
Rth(ch-a) = 83.3(C/W)
Rth(ch-c)= 1.79(C/W)
ID = 3 A
1.5 A
0.6 A
TA = 25 C25 C75 C
125 C
5
10
Pulsed
VGS = 10 V
15
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DRAIN TO SOURCE ON-STATE RESISTANCE vs.CHANNEL TEMPERATURE
Tch - Channel Temperature - CRDS(on)-DraintoSourceO
n-StateResistance-
CAPACITANCE vs. DRAIN TOSOURCE VOLTAGE
VDS - Drain to Source Voltage - V
Ciss,Coss,Crss-Capacitance-p
F
050
10
0 50 100 150
VGS = 10 VID = 2 A
1.01.0
10
100
1 000
10 100 1 000
VGS = 0f = 1 MHz
DYNAMIC INPUT/OUTPUT CHARACTERISTICS
Qg - Gate Charge - nC
VDS-Drainto
SourceVoltage-V
0 6 12 18 27
200
400
600
800
2
4
6
8
10
12
14
16
0
Ciss
Crss
Coss
SWITCHING CHARACTERISTICS
ID - Drain Current - A
td(on),tr,td(off),tf-SwitchingTime
-ns
1.00.1
10
100
1 000
1.0 10 100
VDD = 150 VVGS = 10 VRG = 10
tr
td(off)tftd(on)
SOURCE TO DRAIN DIODEFORWARD VOLTAGE
VSD - Source to Drain Voltage - V
ISD-DiodeForw
ardCurrent-A
0
1
10
100
0.5
Pulsed
1.0 1.5
VGS = 10 V
VGS = 0 V
REVERSE RECOVERY TIME vs.DRAIN CURRENT
ID - Drain Current - A
trr-ReverseRecoverytime-ns
di/dt = 50 A/ sVGS = 0
100.1
100
1 000
1.0 10 100
ID = 3 A
VDD = 450 V300 V150 V
VGS
VDS
10 000
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SINGLE AVALANCHE CURRENT vs.INDUCTIVE LOAD
L - Inductive Load - H
IAS-SingleAvalancheCurrent-A
SINGLE AVALANCHE ENERGYDERATING FACTOR
Starting Tch - Starting Channel Temperature - C
EnergyDeratingFactor-%
1.0
025
10
100
100 1 m 10 m 100 m
VDD = 150 VVGS = 20 V 0RG = 25
20
80
120
160
50 75 100 125 150
VDD = 150 VRG = 25 VGS = 20 V 0IAS 3.0 A
100
60
40
140
IAS = 3 A
EAS=5.4mJ
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REFERENCE
Document Name Document No.
NEC semiconductor device reliability/quality control system. TEI-1202
Quality grade on NEC semiconductor devices. IEI-1209
Semiconductor device mounting technology manual. IEI-1207
Semiconductor device package manual. IEI-1213
Guide to quality assurance for semiconductor devices. MEI-1202
Semiconductor selection guide. MF-1134
Power MOS FET features and application switching power supply. TEA-1034
Application circuits using Power MOS FET. TEA-1035
Safe operating area of Power MOS FET. TEA-1037
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[MEMO]
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Anti-radioactive design is not implemented in this product.
M4 94.11