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2366 IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 47, NO. 12, DECEMBER 2000

Polysilicon Quantization Effects on the ElectricalProperties of MOS Transistors

Alessandro S. Spinelli, Member, IEEE, Andrea Pacelli, Member, IEEE, and Andrea L. Lacaita, Senior Member, IEEE

AbstractThe quantum-mechanical behavior of chargecarriers at the polysilicon/oxide interface is investigated. It isshown that a dark space depleted of free carriers is created at theinterface as a consequence of the abrupt potential energy barrier,which dominates the polysilicon capacitance and voltage drop inall regions of operation of modern MOS devices. Quantum-me-chanical effects in polysilicon lead to a reduction in the gatecapacitance in the same way as substrate quantization, and to anegative voltage shift, which is opposed to the positive shift causedby carrier quantization in the channel. Effects on the extraction ofdevice physical parameters such as oxide thickness and polysilicondoping are also addressed.

Index TermsMOS devices, MOSFETs, quantization, semicon-ductor device modeling.

I. INTRODUCTION

THE increased manufacturing capabilities of the semicon-

ductor industry have led to the fabrication of MOS tran-

sistors with gate lengths well below 0.1 m. The gate oxide

thickness which is needed in order to avoid short-channel ef-

fects and reduce the threshold voltage is in the range 1.5 to 3

nm. In dealing with such characteristic lengths, it is now widely

accepted that quantum-mechanical (QM) effects must be taken

into account. Also, the finite series capacitance of the polysil-

icon gate can no longer be neglected, since it has a significant

impact on the device performance [1].

Since the pioneering works in the 1970s [2], considerable ef-

fort has been devoted to the theoretical analysis and modeling

of QM effects in MOS inversion layers [3][7]. Later on, also

majority-carrier quantization in strongly accumulated MOS sur-

faces has been given attention [8][10], due to its impact on the

gate tunneling current and capacitance. On the other hand, it

was usually assumed that for small band bending, no QM ef-

fects occurred. In particular, polysilicon depletion and accumu-

lationwas always treated in a classicalframework[1], [11], [12].

Recently, we have demonstrated that a significant QM effect

occurs also when the device is biased near flat bands, and no

splitting of the energy levels occurs [13]. This effect is partic-ularly interesting for the case of depletion and accumulation in

Manuscript received October 18, 1999; revised July 3, 2000. The review ofthis paper was arranged by Editor J. M. Vasi.

A.S. Spinelli is with theDipartimento diScienze Chimiche,Fisichee Matem-atiche,Universit degli StudidellInsubria,and Istituto Nazionale di FisicadellaMateria, Milano-Universit, 22100 Como, Italy (e-mail: [email protected]).

A. Pacelli is with the Department of Electrical and Computer Engineering,State University of New York, Stony Brook, NY 11794-2350 USA.

A. L. Lacaita is with the Dipartimento di Elettronica e Informazione, Politec-nico di Milano, 20133 Milano, Italy.

Publisher Item Identifier S 0018-9383(00)10402-2.

heavily-doped polysilicon, where the band bending is usually of

the order of a few tens of millivolts.

In this work, we investigate the effects of QM behavior in

polysilicon on the electrical properties of MOS transistors. For

the first time, a full quantum simulation of the entire polysil-

icon/oxide/silicon system is carried out. In the next section, the

dark-space effect at the polysilicon/oxide interface is briefly de-

scribed. Then, in Section III, we discuss the application of a

one-dimensional (1-D) quantum model to heavily-doped poly-

crystalline silicon. In Section IV the impact of QM effects in

polysilicon on the physical gate oxide thickness and polysilicon

doping extraction are evaluated on the basis of extensive devicesimulations. In Section V, the impact on the device threshold

voltage is addressed, showing that QM effects at the polysil-

icon/oxide interface result in a negative threshold voltage shift,

as opposed to thepositive shift induced by channel quantization.

II. THE DARK-SPACE EFFECT

In normal MOSFET operation, the heavily doped polysil-

icon is switched between accumulation and depletion. When

in accumulation, the band bending in the polysilicon is of the

order of a few tens of millivolts at most, while in depletion,

carriers are repelled from the poly-oxide interface. In neithercase a deep quantum well is formed. For this reason, a classical

(CL) treatment of the charge distribution in the poly has been al-

ways assumed, whether the channel was treated in a classical or

quantum-mechanical framework. However, both accumulation

and depletion of carriers occur within a distance from the oxide

comparable with the de Broglie wavelength of charge carriers,

so that QM effects must be accounted for. In Fig. 1 the electron

concentration in the n -polysilicon of an n-MOS capacitor with

oxide thickness of 5 nm is plotted as a function of the distance

from the polysilicon/oxide interface, as obtained from a clas-

sical simulation and from a self-consistent Schrdinger-Poisson

solver [14]. Results are shown in conditions of accumulation

( 2 V), at threshold ( 1 V), and in strong inversion( 5 V). For simplicity, this system (n -polysilicon, p-sub-

strate) will be assumed in the rest of the paper. We note that

for positive gate voltages, both gate and substrate are depleted,

while for negative voltages, both are accumulated. Significant

differences can be seen between the CL and QM charge distribu-

tions in accumulation conditions, where the CL solution peaks

right at the interface. As a consequence of the presence of the

abrupt energy barrier, interference among the majority-carrier

wavefunctions takes place, and the QM charge is pushed away

from the interface. Hence, a so-called dark space is created,

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SPINELLI et al.: ELECTRICAL PROPERTIES OF MOS TRANSISTORS 2367

Fig. 1. Electron concentration in the n-type polysilicon of a 5 nm gate oxidethickness nMOS device. The polysilicon doping is 1 0 cm . Results areshown according to a classical (CL) and a QM model, for different gate biasconditions in accumulation, at threshold voltage V and at 5 V.

where the carrier concentration is reduced with respect to the

dopant concentration. The extent of the dark space can be ap-

proximately computed at flat bands as [13]

(1)

where is a typical energy of the carriers above the conduc-

tion-band edge, . In a nondegenerate approximation,

, while in a degenerate semiconductor ,

where is the Fermi level. In silicon, is of the order of 2

to 3 nm for both electrons and holes. The dark space is a direct

consequence of the abrupt potential energy barrier, and there-

fore exists also for unconfined conditions in the polysilicon,

as at flat bands [13]. When the device is biased in the strong

accumulation condition, a potential well forms, increasing theaverage energy of the carriers above the band edge, hence re-

ducing the value of below what predicted by (1) (see results

for 2 V).

A significant difference between the CL and QM charge dis-

tributions can be seen even when the polysilicon is biased in de-

pletion. In fact, as long as the (classical) polysilicon depletion

layer width is comparable with or smaller than the dark space,

the depleted layer will be determined by quantum effects, and

will be larger than the classical value. This QM widening of

the depletion layer can be seen in the electron concentration at

threshold, also shown in Fig. 1. Note that for this high polysil-

icon doping, the electron concentration at the interface is only

slightly reduced in the CL treatment at threshold, while is sig-nificantly modified by the QM treatment. The full impact of this

effect will be made clear in the following sections.

For larger positive gate biases, the depletion layer widens and

the classical value is recovered. However, a small difference can

still be seenin the chargedistributions(see Fig. 1 for 5 V).

Near the interface, the QM charge distribution is larger than the

classical distribution, due to the wavefunction penetration into

the classically forbidden electrostatic potential barrier. At the

boundaries of the depleted layer, instead, the QM charge rises

more smoothly. In fact, rapid spatial variations of the charge are

limited by the thermal wavelength of the electrons [13]. Since

this wavelengthis comparable with thedepletion depth, a slower

Fig. 2. Comparison among the electron dark space, the semiconductorscreening length and the polysilicon depletion layer at an oxide electric fieldof 1 mV cm . The electron mean free path for ionized impurity scattering isalso shown.

rise of the charge distribution with respect to the classical model

is obtained.

To assess the importance of QM effects in the polysilicon,

Fig. 2 shows the electron dark space obtained from (1) and the

electron screening length obtained from an accurate cal-

culation accounting for FermiDirac statistics. Both quantities

are plotted as functions of the polysilicon doping concentration

. The screening length tends to the classical Debye value

(proportional to ) for low values of , while it follows

the ThomasFermi dependence (proportional to ) as

increasesabove degeneracy. It canbe seen that thedark space re-

mains markedly larger than the semiconductor screening length

for dopings higher than about cm . A reduction in

the gate capacitance, similar to what is obtained with substrate

quantization, is hence expected in strong accumulation. Fig. 2shows also the value of the classical polysilicon depletion layer

at an oxide electric field of 1 MV cm , which is a typical value

at threshold. For polysilicon dopings higher than about

cm , the polysilicon depletion layer becomes smaller than the

dark space, and QM effects are expected to become important

also in strong inversion.

III. CARRIER QUANTIZATION IN HEAVILY DOPED POLYSILICON

Quantization of electrons and holes at boundaries of single-

crystal, low-doped silicon is a known and extensively studied

effect. Quantization in polysilicon, instead, has received only

cursory or no attention in the literature. Before going into de-tailed QM simulations, one must first discuss the conditions

under which the standard QM model for bulk silicon can be

adopted for heavily doped polysilicon. Two main features have

to be taken into account in dealing with such an issue: the exis-

tence of the grain boundaries, and the very high doping level.

Each polysilicon grain can be assumed to be a perfect crystal,

surrounded by an insulator-like grain boundary. Even though

traps will surely be present at the grain boundaries, these repre-

sent a negligible fraction of the total volume of the MOS system.

Assuming that no tunneling between grains occurs, each grain

can be treated as a quantum box, connected to the gate electrode

by an ohmic contact. The lateral size of grains is typically of the
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Fig. 3. Gate capacitance for a 5 nm nMOS capacitor as obtained from a CLsimulation, a QM simulation with substrate quantization and a full quantumsimulation. Polysilicon doping is N = 5 2 1 0 cm . The vertical dottedline marks the flat-band condition.

order of 100 nm [15], and should cause no significant lateral

confinement effect [16]. Dopant atoms segregated at the grain

boundaries can be neglected, and the net doping of the polysil-

icon is determined by the dopant concentration inside the grains.

In summary, to all practical purposes, gate polysilicon can be

treated as single-crystal, heavily doped silicon.

In the presence of strong scattering processes, phase co-

herence is destroyed, and carriers tend to behave classically.

Therefore, a strong QM effect is expected only if the mean

free path is larger than the electron dark space . In the case of

heavily doped polysilicon, the relevant scattering processes are

by phonons and by ionized impurities. The phonon scattering

mean free path can be accurately computed from a microscopic

description of the various electron-phonon processes in silicon

[17], [18]. At energies of the order of , which are of interesthere, this mean free path is of the order of 10 nm or more,

therefore much larger than . On the other hand, due to the

strong screening and multiple-scatterer interactions, ionized

impurity scattering at high dopant concentrations is not easy to

estimate. However, an empirical value can be obtained from the

average thermal velocity and the momentum relaxation time of

the system. The former is easily computed taking into account

degeneration effects; the latter can be extracted from mobility

data for electrons in heavily doped silicon [19]. The mean free

path is also shown in Fig. 2, where it can be seen that it remains

larger than for all doping values of interest. Note the increase

of the mean free path at high dopings, consequence of the

increase of the average energy of carriers due to degeneracy.We therefore conclude that a QM treatment can be applied

to the polysilicon gate. However, more detailed calculations or

measurements are needed to exactly assess the magnitude of

scattering at high doping concentrations and its possible influ-

ence on the QM effects in polysilicon.

IV. GATE CAPACITANCE

A. Oxide Thickness

Fig. 3 shows the simulated low-frequency gate capacitance

for an nMOS capacitor with an oxide thickness of 5 nm, a con-

stant substrate doping of cm , and a polysilicon doping

Fig. 4. Equivalent oxide thickness of the polysilicon capacitance as a functionof the oxide electric field. Lines are results of classical (CL) simulations,symbols represent full quantum (FQ) simulations.

of cm . Results are shown as obtained from a clas-

sical treatment, a quantum solution where quantization is ap-

plied only in the silicon substrate, as in current state-of-the-art

simulators [11], and a full quantum solution, with QM effects in

both substrate and polysilicon. Physical parameters adopted for

the polysilicon are the same as for single-crystal silicon. Note

that QM effects in polysilicon strongly influence the gate capac-

itance in all regions of operation, reducing the computed value.

Let us first focus on the accumulation bias condition. Substrate

quantization leads to a reduction in the gate capacitance that is

dueto eithera shift in thecentroidof theaccumulation charge (in

strong accumulation, where bound levels exist) or a dark-space

effect (in weak accumulation and at flat bands). Note that the

maximum reduction in the gate capacitance is not located at flat

bands but, rather, where the surface concentration is increasedenough to lower its screening length below the hole dark space.

In this regime, polysilicon capacitance is dominated by the dark

space, which is larger than the screening length (see Fig. 2), and

is negligibly dependent on the applied bias. Therefore, polysil-

icon quantization is almost equivalent to an increase of the ef-

fective oxide thickness. At flat bands, only a small reduction in

the gate capacitance results from substrate quantization, while a

more significant contribution is due to quantization of the highly

doped polysilicon.

An important consequence of polysilicon quantization

is that the physical oxide thickness extracted from capaci-

tancevoltage (CV) measurements [10], [20][23] turns out to

be overestimated: Fig. 4 shows the equivalent oxide thicknessof the polysilicon capacitance as a function of the oxide

electric field, according to a classical and a quantum model.

For positive oxide fields (i.e., polysilicon depletion), both

treatments converge to the same depletion-limited behavior. On

the other hand, for low-positive or negative fields (accumulated

polysilicon) a constant value of about 0.3 nm is approached in

the quantum treatment, largely independent of the polysilicon

doping, due to the dark-space effect. The classical polysilicon

capacitance [24] is instead expected to

continuously decrease as the device is brought further in

accumulation; however, an almost constant value is reached,

due to the weak dependence of the screening length on carrier
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Fig. 5. Error on the physical oxide thickness extraction from CVmeasurements in strong accumulation due to polysilicon quantization. Theerror is shown as a function of the maximum oxide electric field reached duringthe measurement and for different polysilicon doping concentrations.

concentration in the high-density limit. The difference in the

equivalent oxide thicknesses is hence dropped on the gate oxidewhenever a classical treatment of the polysilicon is carried out,

leading to an incorrect estimate of the physical oxide thickness.

Note also that for high polysilicon dopings the range where QM

effects are important encompasses the whole normal operating

conditions of MOS devices, going up to an oxide field of 6 MV

cm for cm .

Fig. 5 highlights the error on the extraction of the physical

oxide thickness that is only due to the dark-space effect, as a

function of the oxide electric field in accumulation where CV

data are collected. It is worth recalling that the error is a direct

consequence of quantization at the polysilicon/oxide interface

and therefore exists in all of todays state-of-the-art extraction

procedures, even when quantum effects at the oxide/substrateinterface and (classical) polysilicon accumulation are taken into

account. As Fig. 5 shows, the error due to polysilicon quantiza-

tion alone decreases as the device enters strong accumulation

and can be reduced to about 0.1 to 0.15 nm, depending on the

measurement field and polysilicon doping. Such an effect can

severely affect ultrathin oxide measurements: Even if an oxide

field as high as 8 MV cm could be reached, the relative

error would be about 4% on a 3-nm oxide. However, in ultra-thin

oxides, direct tunneling current will limit the achievable oxide

electric field [23], significantly increasing the error. Near flat

bands, the error can be about 5 to 10% in a 3-nm oxide thick-

ness, depending on the polysilicon doping. Full quantum simu-

lation of ultrathin oxides becomes therefore a compelling issue

for achieving reliable estimates in future-generation devices.

B. Polysilicon Doping

We focus now our attention on the inversion bias conditions

of Fig. 3, which shows a different behavior from the accumu-

lation region. In inversion, quantization at the oxide/polysilicon

interface acts differently on the gate capacitance than quantiza-

tion in the substrate, which is due to a shift of the centroid of

the inversion charge from the oxide/substrate interface. As the

gate bias is increased, the surface electric field rises, deepening

the confining potential well. However, the lowest bound energy

Fig. 6. Values of the polysilicon doping extracted from simulated capacitanceaccording to a classical model, a quantum model applied to substrate alone anda full quantum model. The considered device has an oxide thickness of 3 nmand a polysilicon doping of 1 0 cm .

level is also raised, weakening the net dependence of the cen-

troid on the applied bias. Hence, an almost constant decrease

in the gate capacitance is expected, equivalent to about 0.3 nmof silicon dioxide for most doping levels and bias voltages. On

the contrary, the dark space effect results in a reduction of the

gate capacitance at threshold, which slowly tends to the clas-

sical solution as the polysilicon depletion layer width becomes

larger than the dark space itself (see Figs. 1, 3 and 4). As a con-

sequence, the extraction of the active polysilicon doping from

the slope of the CV curve in strong inversion will be affected

by quantization at both interfaces. The polysilicon doping

can be extracted from the gate capacitance as [25]

(2)

where is the gate-channel capacitance (i.e., gate-

source gate-drain). In Fig. 6, the polysilicon doping is shown

as obtained from the application of (2) to simulated CVcurves.

The extracted doping is plotted as a function of the applied bias

for a MOS device having a 3 nm gate oxide and a polysilicon

doping of cm . Three types of simulations are compared:

A purely classical model, a simulation where only QM effects

in the substrate are accounted for, and a model with QM effects

both in the substrate and poly. In the CL and QM-substrate

estimates, a relatively small error in the extraction is due to ne-

glecting the inversion layer capacitance, which is not accounted

for in (2). On the other hand, polysilicon quantization leads to a

loss of validity of the depletion approximation in the gate: Thepolysilicon capacitance is in fact dominated by the dark space.

It can be expected that, as the gate bias is sufficiently increased,

polysilicon will enter the classical depletion regime, and

the only remaining error will be due to substrate quantization.

However, this is true only for low-doped polysilicon gates. In

heavily doped gates, in fact, the necessary electric field can be

too high, as shown in Fig. 4.

V. THRESHOLD VOLTAGE

As shown in Fig. 1, at all bias conditions except strong accu-

mulation a minimum depletion region exists, of the order of 1
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Fig. 7. Electric field in the oxide and polysilicon regions at thresholdaccording to a quantum model applied in the substrate only (dashed line) and afull quantum model (solid line). Device parameters are the same as in Fig. 1.

Fig. 8. Same as Fig. 7, but referred to the electrostatic potential.

nm, where the majority carrier concentration is smaller than the

active doping concentration. For a polysilicon doping of

cm , this implies that a fixed positive charge sheet of about

cm exists. At threshold, the channel charge is still neg-

ligible, while the total negative depletion charge in the substrate

is typically of the order of a few cm . In order to achieve

charge neutrality for the entire system, an extra electron distribu-

tion in the polysilicon must supply the necessary compensating

negative charge. This distribution is visible in the curve labeled

QM in Fig. 1, as a low bump of electrons peaked at a

depth of around 2 nm. The presence of two substantial charge

sheets, one positive and one negative, offset by about 1 nm,

causes an electric dipole. In the space comprised between thetwo charge sheets a finite voltage is dropped, which is visible as

a threshold voltage shift of the order of several tens of millivolts.

The effect of the charge dipole on the electric field and elec-

trostatic potential is illustrated in Figs. 7 and 8, respectively.

While in the classical solution the electric field smoothly in-

creases toward the oxide interface, the quantum solution pre-

dicts first a negative peak due to the extra electrons, then a rapid

rise to a positive value at the interface, corresponding to the de-

pleted space charge within the dark-space region. The negative

electric-field peak causes a kink in the electrostatic potential,

leading to an increased oxide field, since the total voltage drop

between the polysilicon neutral region and the silicon bulk is

Fig. 9. Threshold voltage shift due to QM effects as a function of oxidethickness. Results are shown for quantization at the substrate side only (QMS)and for a full quantum (FQ) treatment.

the same for the two cases. Hence, more inversion charge is

collected at the substrate side for a given gate bias. Polysilicon

quantization then determines a negative threshold voltage shift,

as opposed to channel-carrier quantization which induces a pos-

itive shift.

From the above qualitative discussion, one expects the

strength of the dipole and the amount of threshold shift to

strongly depend on the polysilicon doping level. Fig. 9 shows

the simulated threshold voltage shift with respect to a purely

classical model, plotted as a function of the oxide thickness.

The substrate doping is cm , and results are shown for

polysilicon doping ranging from cm to cm .

When quantization at the substrate side only is taken into ac-count, a positive voltage shift ranging from about 75 mV to 125

mV is obtained, which is slightly dependent on the polysilicon

doping, due to the small voltage drop it sustains (see dashed

and dot-dashed lines in Fig. 9). Conversely, quantization at the

polysilicon/oxide interface leads to a negative threshold voltage

shift which is strongly dependent on the polysilicon doping:

For cm , the negative voltage shift is about 80

mV, significantly offsetting traditional results obtained with a

classical simulation of the polysilicon. Moreover, it is worth

pointing out that the threshold voltage shift due to poly quan-

tization is independent of the treatment (CL or QM) adopted

for the substrate. This explains why traditional investigations

of QM effects in MOSFETs have not revealed such a negativeshift. An accurate determination of this effect would require

a detailed experimental analysis over devices with different

polysilicon doping and the same substrate doping. Note also

that polysilicon quantization leads to a threshold voltage shift

which is not dependent on the oxide thickness, the charge

dipole being located within the gate.

VI. CONCLUSION

We have investigated the effects of quantization at the polysil-

icon/oxide interface, showing that the existence of the abrupt

discontinuity in potential energy leads to a dark space depleted

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of free carriers of the order of 2 to 3 nm. For polysilicon dop-

ings in the mid-high cm the dark space overrides the

classical polysilicon depletion layer, affecting the device char-

acteristics in all regions of operation. In accumulation, polysil-

icon quantization leads to a reduction in the gate capacitance

and can be described at first order as an increase in the effective

oxide thickness. In inversion, physical parameters like polysil-

icon doping can be incorrectly estimated. Quantization createsa charge dipole within the polysilicon which generates a nega-

tive threshold voltage shift. The shift is independent of the oxide

thickness and substrate doping and depends on the polysilicon

doping. A negative shift of about 80 mV is computed with a

doping of cm , comparable with values obtained from

conventional substrate quantization.

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Alessandro S. Spinelli (M99) was born in in Bergamo, Italy, in 1966. He re-ceived the Laurea (cumlaude) and Ph.D. degrees in electronics engineering fromthe Politecnico di Milano, Milan, Italy.

In 1995, he was a Visiting Scholar at the University of Tennessee Space Insti-tute, Tullahoma, where he worked on single molecule detection in solution, andin 1996 he was a consultant for STMicroelectronics, Central R&D Department,Agrate Brianza, Italy. In 1997, he was Assistant Professor at the Politecnico diMilano. In 1998, he joined the Universit degli Studi dellInsubria, Como, Italy,

as Associate Professor of Electronics. His current research interests includemodeling and simulation of advanced MOS devices and experimental charac-terization and modeling of gate oxide leakage phenomena and flash memorycell reliability.

Andrea Pacelli (S88M98) was born in Pescara,Italy, in 1966. He received the Laurea degree (cumlaude) in 1993, and the Ph.D. degree in electricalengineering in 1998, both from the Politecnicodi Milano, Milan, Italy. His doctoral researchfocused on the modeling of quantization effectsand near-interface oxide states in MOS devices, andhigh-field transport in silicon.

From 1994 to1995,he wasa VisitingScholarat the

Beckman Institute, University of Illinois at Urbana-Champaign, working on Monte Carlo simulation of

hot-carrier effects in silicon devices. In 1998 and 1999, he was a Senior DeviceEngineer with Tower Semiconductor Ltd, Migdal Haemek, Israel, where he wasinvolved in the development of flash-EEPROM nonvolatile memories. In 1999and 2000, he held a joint post-doctoral position at Bell Laboratories, LucentTechnologies, Murray Hill, NJ, and the State University of New York (SUNY)at StonyBrook. He is now an Assistant Professorin theDepartment of Electricaland Computer Engineering at SUNY. His current research focuses on the rapidgeneration of device models for circuit simulation, and SiGe HBT physics andmodeling.

Andrea L. Lacaita (M89SM94) was born in1962. He received the Laurea degree in nuclearengineering in 1985 from the Politecnico of Milano,Milan, Italy.

In 1987, he joined the Italian National ResearchCouncil as a Researcher. In 1990 he was a VisitingScientist at the AT&T Bell Laboratories, Murray Hill,NJ, where he worked on photo-refractive effects insuperlattices. In 1992, he becameAssociateProfessorof Electronics at the Politecnico of Milano, and wasappointed Full Professor in 1999. He has worked on

physics of carrier transport in semiconductor devices, development of new ex-perimental methods for characterization of semiconductor materials, and ULSIdevices and low-noise design of integrated circuits for cellular receivers. Heleads a research laboratory, working on the characterization and modeling ofdevices and interconnects in ULSI CMOS circuits and design of RF front-endfor wireless communication systems. He has co-authored about 100 papers pub-lished in journals or international conference proceedings.

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