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Analysis, Optimized Design and Adaptive Control of a ZCS Full-bridge Converter

without Voltage Over-Stress on the Switches

Xin ZhangStudent Member, IEEE

Nanjing University of

Aeronautics and AstronauticNo. 29, Str. YuDao, Nanjing,

210016, Jiangsu, China

Henry Shu-hung ChungSenior Member, IEEE

City Univ. of Hong Kong

Tat Chee Avenue, KowloonTong, Kowloon, Hong Kong

[email protected]

Xinbo RuanSenior Member,IEEE

Huazhong University of

Science and TechnologyWuchang, Wuhan, 430074,

Hubei, China

Adrian IoinoviciFellow, IEEE

Holon Institute of

TechnologyHolon, 58102, Israel

[email protected]

AbstractThis paper presents the analysis and design of a

new current-driven soft-switched full-bridge converter, in

which all main switches are zero-current-switched (ZCS),

and the switches in a switched-capacitor snubber are

zero-voltage-switched (ZVS). For each value of the supply

and load, the snubber capacitor is adaptively charged at

the minimum necessary value for assuring soft-switching;

thus, less resonant energy is circulated. There is no extra

voltage stress on the switches. The current through the

switches is limited to the input current. A dc analysis ledto the derivation of the voltage conversion ratio. The

resonant elements of the snubber circuit are optimally

designed by trading-off the soft-switching range the

duty-cycle loss over a wide supply and load variation. The

calculation of the ac small-signal transfer functions

allowed for the design of the controller, which was

implemented by DSP. A 530V/15kV, 5kW prototype has

been built and evaluated.

Index Terms- Adaptable soft-switching, dc-dc conversion, full-bridge converter, high voltage converter, zero-current switching

I. INTRODUCTION

Pulse-width modulated (PWM) full-bridge (FB) converters

have been popularly used for high-power dc/dc conversion.There is a large literature on ZVS PWM-FB converters.

However, the ZVS technique is more suitable for converters

using majority-carrier type switching devices, such as

MOSFET. For high-voltage and power applications, the

suitable switch is the insulated gate bipolar transistor (IGBT) .

For such switches, ZCS is preferable, for dealing with the

tail current at turn-off. Although a few ZCS switching

schemes have been proposed [1-9], they present different

drawbacks, such as large current and/or voltage over-stresses

due to resonant peaks, or use of much resonant energy even

when it is not necessary .

Recently, a new current-driven full bridge converter was

proposed [10]. It contains a switched-capacitor snubber

connected in parallel to the primary winding. All main

switches are ZCS and the snubber switches are ZVS. The

parasitic elements of the coupling transformer are used in the

resonant operation. The resonant energy used to assure soft-

switching is self-adaptable for each actual value of the

input/load current. The purpose of this paper is to present a

detailed dc analysis of this converter. The voltage conversion

ratio formula is found, allowing for an analysis of the duty-

cycle loss. The conditions necessary for achieving ZCS of the

primary-side switches are derived analytically, and a

knowledge design of the resonant elements is proposed. A

trade-off between the duty-cycle loss and the soft-switching

range gave the design equations. The small-signal ac transfer

functions of the converter are found , serving to the design ofthe controller. The controller is implemented by DSP. A

530V/15kV, 5kW prototype has been built and evaluated, the

good measured efficiency proving the advantages of the

solution.

II.ZCS FB CONVERTER

Fig. 1 shows the circuit schematic of the proposed

current-driven FB converter. It consists of a front-stage dc/ac

converter formed by the switches S1~S4and an output-stage

rectifier formed byDA~DD. The two stages are interconnected

by a coupling transformer Tr with the turns ratio n : 1,

leakage inductance Llk, and parasitic capacitance CP. The

input side of the converter is supplied through an inductor L1.

A snubber formed by a resonant inductorLrand a switched-

capacitor circuit consisting of two MOSFETs, Sa1 and Sa2,

and a resonant capacitor Cr is connected across the primary

side of the coupling transformer. It can make S1~ S4switch at

zero current. Fig. 2 shows the theoretical voltage and current

waveforms and timing diagram of the converter. The output

voltage of the converter is controlled by adjusting the angle between the switch pairs (S1, S2) and (S3,S4). S1 (S3) and S2(S4)

are operated in anti-phase.

There are twelve operating modes from t0 to t12 in one

switching period Ts. However, as the operation is

symmetrical in every one half of the switching cycle, only the

operation from t0to t6is described

__________________________________________

The work described in this paper was fully supported by a grant from the

Research Grants Council of the Hong Kong Special AdministrativeRegion, China (Project No.: CityU 112406).

978-1-4244-4783-1/10/$25.00 2010 IEEE 1214

Authorized licensed use limited to: INDIAN INSTITUTE OF TECHNOLOGY MADRAS. Downloaded on August 16,2010 at 09:41:23 UTC from IEEE Xplore. Restrictions ap

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Fig. 1 Proposed ZCS current-fed FB converter.

/ 2sT / 2sT

S1

S2

S3

S4

Sa1

Sa2

vCr

iLr Iin

-IinnIinis

vs1 nVo

is1 Iin

nVo

Iin

0t 1t 2t 4t3t 5t 6t 11t 12t

vs4

is4

vsa2

2Sai

7t 8t 9t 10t

nVo-V

x

-VxVx

t

t

t

t

t

t

t

t

t

t

t

t

t

t

t

nVo

Iin-Iin

vs2 nVo

is2 Iint

t

Iin

vs3

is3t

tnVo

vsa1

1Sai

t

t

Iin-Iin

nVo-Vx

2

sT

Vp

Vp-Vx

Vp

Vp-Vx

Fig. 2 Timing diagram and key waveforms of the converter.

1. Mode 0[Before 0t ]

Before t0, the energy is transferred from the input to the

output via 1L , 1S , 4S , rT , BD and CD . rC is charged at

the minimum necessary voltage xV for assuring the main

switches switch at zero current, It will be shown later that the

value of xV is chosen to satisfy the following criterion

22

21

21 inrxr ILVC (1)

2. Mode 1[ 0t - 1t ]

At 0t , 3S is turned on with ZCS. A resonance path is

formed by rL , lkL , 1SaC . The current through 4S , 4Si ,

decreases while the current through 3S , 3Si , increases. This

mode ends at 1t when 0)()( 141 == titi SLr , inS Iti =)( 13 ,

and 4S is turned-off with ZCS.

)](sin[)( 0ttL

Lt

LL

VnIti T

rT

lk

lkr

outinLr

+

+= (2)

where

1

1

SaT

TCL

= andlkr

lkrT

LL

LLL

+= .

As the resonant component of the current in (2) is small,

out

lkrin

Vn

LLIttt

+= 0101 (3)

3. Mode 2[ 1t - 2t ]

1L undergoes charging. At 2t , the controller dictates the

turn-on of 2S (ZCS) and 2aS (ZVS) .

4. Mode 3[2t - 3t ]

A resonant path formed by 2S , rL , 1aS , rC , 2aS , and

1S is created.

)(cos)( 21 ttVtv xCr = (4)

)(sin)()( 211

2 ttZ

Vtiti xLrS == (5)

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)()( 21 tiIti SinS = (6)

where

rr CL

11= and

r

r

C

LZ =1 .

This mode ends at 3t when )( 3tiLr = inI and )( 31 tiS = 0.

1S is turned off with zero current. Therefore,

x

in

V

ZI

ttt11

12323 sin

1

== (7)

In order to make Lri reach inI , based on (5), it is

necessary to ensure that inx IZV >1/ , giving the ZCS

criterion in (1). This means that there is enough energy in the

resonant capacitor rC to charge the resonant inductor rL . It

can be noted that for the designed values of rC and rL , the

necessary energy stored in rC for this purpose depends on

the value of the input current. At a small value of inI , less

energy is needed. The maximum energy is required at the

high end of the range of the input current (i.e., at the low

value of the range of the input voltage and at high load

current). So, xV can be calculated for each actual value of

inI . It will take a higher value only when needed. This gives

the adaptability characteristic of the proposed solution :itallows for using at each actual value of the input voltage and

load the minimum necessary of resonant energy that can

assure ZCS of the primary switch. Consequently, the resonant

energy and conduction loss are reduced.

5. Mode 4[3t - 4t ]

rC is discharging and then charged by inI , so that its

voltage is reversed. This mode ends at 4t when the voltage

on rC reaches xV . 2aS is switched off at zero voltage.

])([ 33434 xCrin

r VtvI

Cttt +== (8)

The voltage on rC is sensed. When it reaches the

calculated value xV , the control circuit dictates the end of

this mode ,by turning 2aS off .

6. Mode 5[4t - 5t ]

The junction capacitance of Sa2 is charged by inI until

)( 52 tvSa = outVn - xV .

7. Mode 6[ 5t - 6t ]

When the voltage across the primary side of rT reaches

outnV , the energy is transferred from the input to the load via

2S , rL , rT , AD , DD .

III. STEADY-STATE ANALYSIS AND DESIGN

CONSIDERATION

A. ZCS conditions

1. For the leading switches

In order to ensure soft-switching of the leading switches, it

is necessary to ensure that the switch pairs have sufficient

dead time td,lead for current transfer. In Mode 1, td,leadshouldbe long enough for the current through S3 to increase from

zero to Iinand the current through S4 to decrease from Iin to

zero. Thus, based on (3), td,leadshould satisfy the criterion

,( )

d lead in r lk ot I L L n V > + (9)

2. For the lagging switches

As shown in Mode 3, Crprovides the required energy for

achieving zero-current switching of the lagging switches.

Thus, based on (5), the dead time of the lagging switches td,lag

should satisfy the criterion

x

inlagd

V

ZIt 11

1

, sin1 >

(10)

According to (1), for the designed value of Z1, Vxdepends

solely on the value of Iin, Iin is continuously sensed and the

minimum necessary capacitor voltage for ensuring ZCS at the

measured value of the input current, Vx, is calculated with (1).

When the sensed value of vCrreaches the calculated value of

Vx, Sa1(or Sa2) will be turned off, marking the end of Mode 4.

B. DC voltage conversion ratio

As shown in Fig. 2, is defined as follows

34 45 562

s

T

Tt t t

= = + + (11)

where Tis the time duration of the phase shift.

From the conservation of energy in a half switching cycle5

12

s

in in k o

k

TV I i V

=

= (12)

where dttiik

k

t

tsk

=1

|)(|

t01, t23, and t34are obtained from (3), (7), and (8).

12 2 1 56 23 012

s

T

Tt t t t t t = = +

45 5 4 01 12 23 34 01 34

2

s

T

Tt t t t t t t t t = = =

It should be noted that t56equals t01. It can be shown that

2

1 01

1 1

2 2

r lk

in in

o

L Li n I t I

V

+= = (13)

2 3 4 0i i i= = = (14)

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5 45 01 34( )in in T i n I t n I t t = = (15)By substituting (13)-(15) into (12), the dc conversion ratio

Mis obtained

01 34(2 2 )

S

T

TM

n t t=

(16)

C. Design of the component values

1. Value of LrBased on (9), in order to assure that the leading switches

can complete the current transfer process within t01, the

maximum value ofLr,Lr,max, is found as

,max 01o

r lk

in

n VL t L

I= (17)

Lr,maxis designed at the rated load condition. Fig. 3 shows

the relationships between t01andLr,maxwith the parameters of

the experimental prototype. The parameters are given in

Table I. In Fig. 3, 0.14 s was chosen to be a reasonablevalue for t01.

The minimum value of Lr, Lr_min, is determined byconsidering the maximum rate of rise of the leading switch

currentmax

di dt . Thus, in Mode 1,

max|o

r lk

n V d i

L L d t

+

giving1

,min max( | )r o lk L n V di dt L= (18)

A value ofmax

di dt =80 A/s is used for shaping the

switching trajectory and avoiding high electromagnetic

interference.

2. Value of CrBased on (1), and, as Vx< nVo, it results

2

2 2

r inr

o

L IC

n V (19)

The time taken for reversing the polarity of the snubber

capacitor voltage in Modes 3 and 4 from Vxto Vxis equal totCr=t23+t34. By using (7) and (8), it can be shown that

r

in

xinx

x

inCr C

I

VZIV

V

ZIttt

++=+=

21

22

11

13423 sin

1

(20)

Fig. 4 shows the relationships between tCr and Cr for

different values of Vxcalculated for the parameters given inTable I. The value of Cr is determined by considering the

required values of tCrand Vx. As shown in Fig. 2, the voltage

stress on Sa1and Sa2is nVoVx. Increasing Vxwill reduce thevoltage stress on Sa1and Sa2, but will increase t34, and thus, tCr

is chosen 1.5 s with Vx= 50 V, then, Cris 100 nF.

D. Self-Adaptable Voltage for Cr

According to (1), the required value of Vx is maximum

whenIinis maximum

min,

maxmax,

inr

rx

V

P

C

LV = (21)

Fig. 5 shows the value of Vxversus the output load currentwith the parameters given in Table I. For example, when Vin

is 530 V , at the rated load, Vxis about 30 V. If Vinischanged

to 424 V, Vxbecomes about 48 V, becauseIinis increased.

E. Soft-switching range of the proposed converter

Based on (11),

12 23 01 34 452

s

T

Tt t t t t = = + + (22)

Thus, the soft-switching range of the converter can be

expressed as

01 34 232

s

T

Tt t t+ < (23)

Thus, by using (3), (7) and (8), and substituting the above

boundaries of T into (16), it is possible to calculate themaximum (M_max) and minimum (M_min) values ofM.Fig.

6 shows the relationships of M_max and M_min versus the

normalized output load current with the parameters given in

Table I. The interception point between M_max and M_min

for the minimal input voltage of 424 V gives the minimum

load for which soft-switching is assured. For the specified

input voltage range, both output voltage regulation and soft-

switching operation begins at 7% of the rated load, and it is

assured in all load range, including heavy load.

Fig. 3 t01versusLr,max.

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Fig. 4 Resonant time tCrversus Crfor different values of Vx.

Fig. 5 Vxversus per-unitIo.

Fig.6 ZCS assured load range of the proposed converter.

( )vd

G s

( )ov sPWM

K( )cc

G s

( )idG s

( )igG s

( )inv s

( )i

A s

( )o

Z s

( )o

i s

( )vg

G s

iK

vK

( )rv s

( )e

v s ( )cv s

( )i inK i s

( )in

i s

( )d s( )

vcG s

Fig.7 Closed-loop small-signal ac equivalent model of proposed converter

Fig.8 Bode diagram of Gid(s).

IV. ADAPTIVE CHARACTER OF THE ZCS-ASSISTED

RESONANT ENERGY

According to (1),Vxis calculated for each measured value

of the input current, such that to ensure ZCS for all the

specified range of input/load currents. At a low input/load

current, less resonant energy is needed. The controller will

determine the instant t4for which the actual vCr(t) reached the

calculated value Vx.

V.CONTROLLER DESIGN

A current-mode control of the proposed converter is used.

The equivalent small-signal ac model of the closed-loop

regulator is given in Fig. 7.,where ( )ev s - Small-signal error

voltage, Kv- Output voltage scaling factor. Ki- Inductor

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current scaling factor. Gvc(s) -Transfer function of voltage

loop compensator. Gcc(s) -Transfer function of current loop

compensator.

According to Fig.7, the current loop gain, Ti (s), results in

( ) ( ) ( )i i PWM cc id

T s K K G s G s= (24)

The parameters Ki and KPWM have been designed as: Ki

=0.265, KPWM =0.303. and Gcc(s) was designed as a PIcontroller:

( )cc ip ii

G s K K s= + (25)

The values of Kip and Kii were designed as Kip=30,

Kii=30000. Fig.8 presents the Bode diagram of Gid(s) which

provides the information for the PIcontroller design.The voltage loop gain, Tv, results in:

( ) ( ) ( )( )

1 ( )

PWM v vc vd cc

v

i

K K G s G s G sT s

T s=

+ (26)

where Kvis chosen as Kv=1/5000, and Gvc(s) is designed as aPI controller:

( ) vivc vp

KG s K

s= + (27)

With Kvp=2.5, Kvi=8000, Fig. 9 shows the Bode diagram

of the voltage-loop with and without compensator Gvc. The

designed cross frequency of the voltage-loop is 650Hz. The

phase margin is 50 degree.

Fig.9 Bode diagram of the voltage-loop gain Tv(s).

The voltage and current loop controllers Gvc(s) and Gcc(s)

are implemented by DSP. The bilinear transformation

2 1

1

Zs

T Z

+was applied to render discrete the above two

continuous compensators

( ) ( )( ) 30.075 29.925 1ccG z z z= (28)

1 130.075( ) 0.15n n n n nv v e e e = + + (29)

( ) ( )( ) 2.52 2.48 1vcG z z z= (30)

1 12.52( ) 0.04

n n n n nv v e e e = + + (31)

VI. ADAPTIVE CONTROL CIRCUIT

The control system was implemented by a digital signal

processor (DSP) TMS320F28335 with a soft-start scheme.

The input inductor current iL1(i.e. the input current Iin) andoutput voltage Voutwere sampled to provide the necessary

Fig. 10 Software flowchart of the control algorithm.

information for the current-mode control and calculate the

minimum snubber voltage Vx for achieving zero-current

switching [Eq. (1)]. The instantaneous value of the snubber

capacitor voltage vCr is also sensed and compared with the

calculated value of Vx. The auxiliary switches Sa1and Sa2are

synchronized to switch on with S1 and S2, respectively.

When the value of vCr equals Vxor Vx, Sa1, respectively,Sa2

are turned off. Fig. 10 shows the flowchart of the control

mechanism.

Table I Main components of the prototype

Component Value Component Value

S1~ S4 FF150R17ME3G Cr 100nFSa1~ Sa2 IPW90R340C3 Llk 8.6H

IGBT

driver2SD106AI-17 Co

0.2F /30kV

D1~D4 30kV / 3A Tr 0.05 : 1

Lr 1.5 H

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VII.PROTOTYPEANDEXPERIMENTALRESULTS

A prototype (Vin=530V, Vo =15kV, P=5kW, fs=20kHz)

was realized, with Cr= 100nF,L lk=8.6 H, Co= 0.2F/30kV,Lr =1.5uH. Table I gives the components of the prototype.

The experimental time-domain steady-state voltage and

current waveforms of the primary switches 1S , 4S , and 2aS

at full load are given in Fig11. It proves the ZCS of the main

switches and ZVS of the auxiliary switches .

Fig. 12 presents the snubber capacitor voltage )( 4tvCr (in

percentage of max,Crv ) under different line/load conditions

(a reduced input voltage attracts an increased input current at

a constant output power).

The experimental efficiency versus the load is given in

Fig. 13. It can be seen that an efficiency of almost 94 % is

obtained at full load.

(a) Waveforms of1S

v and1S

i (1S

v : 1kV/div and1S

i : 10A/div).

(b) Waveforms of 4Sv and 4Si ( 4Sv : 1kV/div and 4Si : 10A/div).

(c) Waveforms of 2Sav and 2Sai ( 2Sav :800V/div and 2Sai : 10A/div).

Fig. 11 Voltage and current waveforms of the switches 1S , 4S , and 2aS

at full load condition (Timebase: 10s/div).

VIII. CONCLUSIONS

The design and analysis of a current-driven full-bridge

converter suitable for high voltage applications has been

presented. By using a simple snubber, it can realize ZCS of

the main switches in a large input/load range, and ZVS of the

auxiliary switches. The resonant energy used for achieving

ZCS is self-adaptable. The circulation of resonant energy is

reduced at the minimum necessary for achieving ZCS of the

main switches. The voltage stress on the switches never

surpasses nVo . There is no additional current stress, as thecurrent through the primary switches never overpasses the

nominal value. A trade-off design allowed for minimizing the

Fig. 12 Measured )( 4tvCr , i.e., actual xV , in percentage from its maximum

possible value under different line/load conditions.

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Fig. 13 Experimental efficiency versus load power.

duty-cycle loss resulted from the resonant process , and

concomitantly assuring soft-switching and output voltageregulation from a low value of the load (7 % of the rated

value). Soft-switching and output voltage regulation is then

assured in all range of the load, including heavy load. The

measured efficiency of the proposed soft-switching

converter is very high :94 % at full load, being much higher

than the value for a full-bridge converter with RCD snubber.

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