mi kro kontrol er 2012

Upload: amri

Post on 07-Jul-2018

222 views

Category:

Documents


0 download

TRANSCRIPT

  • 8/18/2019 Mi Kro Kontrol Er 2012

    1/126

  • 8/18/2019 Mi Kro Kontrol Er 2012

    2/126

  • 8/18/2019 Mi Kro Kontrol Er 2012

    3/126

  • 8/18/2019 Mi Kro Kontrol Er 2012

    4/126

  • 8/18/2019 Mi Kro Kontrol Er 2012

    5/126

  • 8/18/2019 Mi Kro Kontrol Er 2012

    6/126

  • 8/18/2019 Mi Kro Kontrol Er 2012

    7/126

  • 8/18/2019 Mi Kro Kontrol Er 2012

    8/126

  • 8/18/2019 Mi Kro Kontrol Er 2012

    9/126

  • 8/18/2019 Mi Kro Kontrol Er 2012

    10/126

  • 8/18/2019 Mi Kro Kontrol Er 2012

    11/126

  • 8/18/2019 Mi Kro Kontrol Er 2012

    12/126

  • 8/18/2019 Mi Kro Kontrol Er 2012

    13/126

  • 8/18/2019 Mi Kro Kontrol Er 2012

    14/126

  • 8/18/2019 Mi Kro Kontrol Er 2012

    15/126

  • 8/18/2019 Mi Kro Kontrol Er 2012

    16/126

  • 8/18/2019 Mi Kro Kontrol Er 2012

    17/126

  • 8/18/2019 Mi Kro Kontrol Er 2012

    18/126

  • 8/18/2019 Mi Kro Kontrol Er 2012

    19/126

  • 8/18/2019 Mi Kro Kontrol Er 2012

    20/126

  • 8/18/2019 Mi Kro Kontrol Er 2012

    21/126

  • 8/18/2019 Mi Kro Kontrol Er 2012

    22/126

  • 8/18/2019 Mi Kro Kontrol Er 2012

    23/126

  • 8/18/2019 Mi Kro Kontrol Er 2012

    24/126

  • 8/18/2019 Mi Kro Kontrol Er 2012

    25/126

  • 8/18/2019 Mi Kro Kontrol Er 2012

    26/126

  • 8/18/2019 Mi Kro Kontrol Er 2012

    27/126

  • 8/18/2019 Mi Kro Kontrol Er 2012

    28/126

  • 8/18/2019 Mi Kro Kontrol Er 2012

    29/126

  • 8/18/2019 Mi Kro Kontrol Er 2012

    30/126

  • 8/18/2019 Mi Kro Kontrol Er 2012

    31/126

  • 8/18/2019 Mi Kro Kontrol Er 2012

    32/126

  • 8/18/2019 Mi Kro Kontrol Er 2012

    33/126

  • 8/18/2019 Mi Kro Kontrol Er 2012

    34/126

  • 8/18/2019 Mi Kro Kontrol Er 2012

    35/126

  • 8/18/2019 Mi Kro Kontrol Er 2012

    36/126

  • 8/18/2019 Mi Kro Kontrol Er 2012

    37/126

  • 8/18/2019 Mi Kro Kontrol Er 2012

    38/126

  • 8/18/2019 Mi Kro Kontrol Er 2012

    39/126

  • 8/18/2019 Mi Kro Kontrol Er 2012

    40/126

  • 8/18/2019 Mi Kro Kontrol Er 2012

    41/126

  • 8/18/2019 Mi Kro Kontrol Er 2012

    42/126

  • 8/18/2019 Mi Kro Kontrol Er 2012

    43/126

  • 8/18/2019 Mi Kro Kontrol Er 2012

    44/126

  • 8/18/2019 Mi Kro Kontrol Er 2012

    45/126

  • 8/18/2019 Mi Kro Kontrol Er 2012

    46/126

  • 8/18/2019 Mi Kro Kontrol Er 2012

    47/126

  • 8/18/2019 Mi Kro Kontrol Er 2012

    48/126

  • 8/18/2019 Mi Kro Kontrol Er 2012

    49/126

  • 8/18/2019 Mi Kro Kontrol Er 2012

    50/126

  • 8/18/2019 Mi Kro Kontrol Er 2012

    51/126

  • 8/18/2019 Mi Kro Kontrol Er 2012

    52/126

  • 8/18/2019 Mi Kro Kontrol Er 2012

    53/126

  • 8/18/2019 Mi Kro Kontrol Er 2012

    54/126

  • 8/18/2019 Mi Kro Kontrol Er 2012

    55/126

  • 8/18/2019 Mi Kro Kontrol Er 2012

    56/126

  • 8/18/2019 Mi Kro Kontrol Er 2012

    57/126

  • 8/18/2019 Mi Kro Kontrol Er 2012

    58/126

  • 8/18/2019 Mi Kro Kontrol Er 2012

    59/126

  • 8/18/2019 Mi Kro Kontrol Er 2012

    60/126

  • 8/18/2019 Mi Kro Kontrol Er 2012

    61/126

  • 8/18/2019 Mi Kro Kontrol Er 2012

    62/126

  • 8/18/2019 Mi Kro Kontrol Er 2012

    63/126

  • 8/18/2019 Mi Kro Kontrol Er 2012

    64/126

  • 8/18/2019 Mi Kro Kontrol Er 2012

    65/126

  • 8/18/2019 Mi Kro Kontrol Er 2012

    66/126

  • 8/18/2019 Mi Kro Kontrol Er 2012

    67/126

  • 8/18/2019 Mi Kro Kontrol Er 2012

    68/126

  • 8/18/2019 Mi Kro Kontrol Er 2012

    69/126

  • 8/18/2019 Mi Kro Kontrol Er 2012

    70/126

  • 8/18/2019 Mi Kro Kontrol Er 2012

    71/126

  • 8/18/2019 Mi Kro Kontrol Er 2012

    72/126

  • 8/18/2019 Mi Kro Kontrol Er 2012

    73/126

  • 8/18/2019 Mi Kro Kontrol Er 2012

    74/126

  • 8/18/2019 Mi Kro Kontrol Er 2012

    75/126

  • 8/18/2019 Mi Kro Kontrol Er 2012

    76/126

  • 8/18/2019 Mi Kro Kontrol Er 2012

    77/126

  • 8/18/2019 Mi Kro Kontrol Er 2012

    78/126

  • 8/18/2019 Mi Kro Kontrol Er 2012

    79/126

  • 8/18/2019 Mi Kro Kontrol Er 2012

    80/126

  • 8/18/2019 Mi Kro Kontrol Er 2012

    81/126

  • 8/18/2019 Mi Kro Kontrol Er 2012

    82/126

  • 8/18/2019 Mi Kro Kontrol Er 2012

    83/126

  • 8/18/2019 Mi Kro Kontrol Er 2012

    84/126

  • 8/18/2019 Mi Kro Kontrol Er 2012

    85/126

  • 8/18/2019 Mi Kro Kontrol Er 2012

    86/126

  • 8/18/2019 Mi Kro Kontrol Er 2012

    87/126

  • 8/18/2019 Mi Kro Kontrol Er 2012

    88/126

  • 8/18/2019 Mi Kro Kontrol Er 2012

    89/126

  • 8/18/2019 Mi Kro Kontrol Er 2012

    90/126

  • 8/18/2019 Mi Kro Kontrol Er 2012

    91/126

  • 8/18/2019 Mi Kro Kontrol Er 2012

    92/126

  • 8/18/2019 Mi Kro Kontrol Er 2012

    93/126

  • 8/18/2019 Mi Kro Kontrol Er 2012

    94/126

  • 8/18/2019 Mi Kro Kontrol Er 2012

    95/126

  • 8/18/2019 Mi Kro Kontrol Er 2012

    96/126

  • 8/18/2019 Mi Kro Kontrol Er 2012

    97/126

  • 8/18/2019 Mi Kro Kontrol Er 2012

    98/126

  • 8/18/2019 Mi Kro Kontrol Er 2012

    99/126

  • 8/18/2019 Mi Kro Kontrol Er 2012

    100/126

  • 8/18/2019 Mi Kro Kontrol Er 2012

    101/126

  • 8/18/2019 Mi Kro Kontrol Er 2012

    102/126

    84

    while(Counter > -1)

    {

    ucRTUBuffer[index++] = (uint8_t)((TEABuffer[0]>>Buffer)& 0x000000FF);

    Buffer += 8;

    Counter--;

    PORTB ^= (1

  • 8/18/2019 Mi Kro Kontrol Er 2012

    103/126

    85

    void vRTUTransmitBuffer(void)

    {

    /* Set receiver to idle state */

    eReceiveState = RX_IDLE;

    switch(eSendState)

    {

    case TX_IDLE:

    /* Enable reception */

    vRTUSerialPort(ENABLE, DISABLE);

    break;

    case TX_TRANSMIT:

    if(gusSendBufferIndex != 0)

    {

    /* Send character over serial line*/

    vRTUPutChar(*pucSendBuffer);

    /* Point to next data in buffer */

    pucSendBuffer++;

    /* Estimate current data length */

    gusSendBufferIndex--;

    }

    else

    {

    /* Update current process */

    eProcess = RTU_FRAME_SENT;

    /* Enable reception in serial port */vRTUSerialPort(ENABLE, DISABLE);

    /* Set transmitter to idle state */

    eSendState = TX_IDLE;

    }

    break;

    }

    }

  • 8/18/2019 Mi Kro Kontrol Er 2012

    104/126

    86

    void vRTUTransmit(uint8_t ucSlaveAddress, const uint8_t *pucDataFrame, uint16_t

    usDataLength)

    {

    uint32_t TEABuffer[3];

    uint16_t usCRC;

    uint8_t Buffer=0;

    int8_t Counter;

    int8_t index;

    TEABuffer[0] = 0x00000000;

    TEABuffer[1] = 0x00000000;

    cli();

    if(eReceiveState == RX_IDLE)

    {

    pucSendBuffer = (uint8_t *)pucDataFrame-1;

    gusSendBufferIndex = 1;

    /* Store slave address value in buffer*/

    pucSendBuffer[RTU_SER_ADDRESS_OFF] = ucSlaveAddress;

    gusSendBufferIndex += usDataLength;

    /* Calculate CRC value */

    usCRC = usRTUCRC((uint8_t*)pucSendBuffer, gusSendBufferIndex);

    ucRTUBuffer[gusSendBufferIndex++] = (uint8_t)(usCRC & 0xFF);

    ucRTUBuffer[gusSendBufferIndex++] = (uint8_t)(usCRC >> 8);

    /* Set transmitter to transmit state */

    eSendState = TX_TRANSMIT;

    /* Enable transmission in serial port */

    vRTUSerialPort(DISABLE, ENABLE);

    }

    Counter = 0;

  • 8/18/2019 Mi Kro Kontrol Er 2012

    105/126

    87

    while(Counter < usDataLength)

    {

    TEABuffer[0] |= ucRTUBuffer[Counter];

    TEABuffer[0] = (TEABuffer[0]> 8) & 0x000000FF);

    ucRTUBuffer[2] = ((TEABuffer[0] >> 16) & 0x000000FF);ucRTUBuffer[3] = ((TEABuffer[0] >> 24) & 0x000000FF);*/

    sei();

    }

  • 8/18/2019 Mi Kro Kontrol Er 2012

    106/126

    88

    void vTimerT35Expired()

    {

    /* Check current receiver's state */

    switch(eReceiveState)

    {

    case RX_INIT:

    /* Set event process to idle after initialization */

    eProcess = RTU_IDLE;

    break;

    case RX_RECEIVE:

    /* Report when whole frame is completely received */

    eProcess = RTU_FRAME_RECEIVED;

    break;

    default:

    break;

    }

    vTimerDisable();

    eReceiveState = RX_IDLE;

    }

    void vRTUPoll()

    {

    static uint8_t ucSlaveAddress;

    static uint8_t ucFunctionCode;static uint8_t *pucDataBuffer;

    static uint16_t usLengthBuffer;

    static eRTUException eException;

  • 8/18/2019 Mi Kro Kontrol Er 2012

    107/126

    89

    switch (eProcess)

    {

    case RTU_IDLE:

    PORTB ^= (1

  • 8/18/2019 Mi Kro Kontrol Er 2012

    108/126

    90

    /* Check function code */

    switch(ucFunctionCode)

    {

    //case RTU_READ_COILS:

    case 0x31:

    eException = eRTUReadCoil(pucDataBuffer, usLengthBuffer);

    break;

    case RTU_WRITE_COIL:

    //eException = eRTUWriteCoil();

    break;

    default:

    /* If function is not supported send exception code */

    eException = RTU_EX_ILLEGAL_FUNCTION;

    break;

    }

    if(eException == RTU_EX_NONE)

    {

    vRTUTransmit(ucSlaveAddress, pucDataBuffer, usLengthBuffer);

    }

    else

    {

    /* Prepare exception code data frame */

    PORTB ^= (1

  • 8/18/2019 Mi Kro Kontrol Er 2012

    109/126

    91

    case RTU_FRAME_SENT:

    /* Do nothing when transmit is completed */

    eProcess = RTU_IDLE;

    break;

    }

    }

    C.5 Avrwise.h

    #ifndef AVRWISE_H

    #define AVRWISE_H

    #include

    #define sbi(port, pin) port|=(1

  • 8/18/2019 Mi Kro Kontrol Er 2012

    110/126

    92

    C.6 Avrwise.c

    #include "main.h"

    #include "avrwise.h"

    uint8_t Dec7Seg[10]={0xC0,0xF9,0xA4,0xB0,0x99,0x92,0x82,0xF8,0x80,0x90};

    uint8_t

    Hex7Seg[16]={0xC0,0xF9,0xA4,0xB0,0x99,0x92,0x82,0xF8,0x80,0x90,0x88,0x83,

    0xC6,0xA1,0x86,0x8E};

    uint8_t n[3];

    void toBCD(uint8_t val){

    n[3] = val/1000;

    val -= (n[3]*1000);

    n[2] = val/100;

    val -= (n[2]*100);

    n[1] = val/10;

    n[0] = val%10;

    }

    void Set7Seg(uint8_t val, uint8_t row)

    {

    DDRB = 0xFF; // Set direction to output

    sbi(PORTA,(row+3));

    PORTB = val;cbi(PORTA,(row+3));

    }

  • 8/18/2019 Mi Kro Kontrol Er 2012

    111/126

    93

    void Clr7Seg(uint8_t row)

    {

    DDRB = 0xFF; // Set direction to output

    sbi(PORTA,(row+3));

    PORTB = 0xFF;

    cbi(PORTA,(row+3));

    }

    void ClrAll7Seg()

    {

    DDRB = 0xFF;

    PORTA = 0x78;

    PORTB = 0xFF;

    PORTA = 0;

    }

    void On7Seg(uint8_t row)

    {

    DDRB = 0xFF; // Set direction to output

    sbi(PORTA,(row+3));

    PORTB = 0;

    cbi(PORTA,(row+3));

    }

    void Idle7Seg()

    {

    DDRB = 0xFF;

    sbi(PORTA,3);

    }

  • 8/18/2019 Mi Kro Kontrol Er 2012

    112/126

    94

    uint8_t ReadDIP()

    {

    uint8_t buffer;

    DDRB = 0; // Set direction to input

    cbi(PORTD,6); //Turn on Buffer0

    _delay_ms(1); //Wait for buffer to become ready

    buffer = PINB;

    sbi(PORTD,6); //Turn off Buffer0

    DDRB = 0xFF;

    return (buffer);

    }

    uint8_t ReadPB()

    {

    uint8_t buffer, adder, rShift;

    rShift = 0;

    adder = 0;

    DDRB = 0; // Set direction to input

    cbi(PORTD,7); //Turn on Buffer1

    _delay_ms(1); //Wait for buffer to become ready

    buffer = PINB;

    sbi(PORTD,7); //Turn off Buffer1

    buffer &= 0x3F; //Encoder only gives 6-bit results. The upper 2 bits is

    random, so mask it.DDRB = 0xFF;

    if((buffer >= 0) && (buffer

  • 8/18/2019 Mi Kro Kontrol Er 2012

    113/126

    95

    else if ((buffer > 8) && (buffer != 0xFF)){

    adder = 6;

    rShift = 3;

    }

    buffer = ((~buffer>>rShift) & 0x07) + adder;

    return (buffer);

    }

    void Init_Board()

    {

    DDRA = 0x78;

    PORTA = 0;

    DDRB = 0xFF;

    PORTB = 0;

    DDRD |= (1

  • 8/18/2019 Mi Kro Kontrol Er 2012

    114/126

    96

    C.7 Rtucrc.h

    #ifndef RTUCRC_H_

    #define RTUCRC_H_

    #include

    uint16_t usRTUCRC(uint8_t *pucDataFrame, uint16_t usDataLength);

    #endif RTUCRC_H_

    C.8 Rtucrc.c

    #include "rtucrc.h"

    static const uint8_t aucCRCHi[] = {

    0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41,

    0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40,

    0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41,

    0x00, 0xC1, 0x81, 0x40, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41,

    0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41,

    0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40,

    0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40,

    0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40,0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41,

    0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40,

    0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41,

    0x00, 0xC1, 0x81, 0x40, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41,

    0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41,

    0x00, 0xC1, 0x81, 0x40, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41,

    0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41,0x00, 0xC1, 0x81, 0x40, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41,

  • 8/18/2019 Mi Kro Kontrol Er 2012

    115/126

    97

    0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41,

    0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40,

    0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41,

    0x00, 0xC1, 0x81, 0x40, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41,

    0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41,

    0x00, 0xC1, 0x81, 0x40

    };

    static const uint8_t aucCRCLo[] = {

    0x00, 0xC0, 0xC1, 0x01, 0xC3, 0x03, 0x02, 0xC2, 0xC6, 0x06, 0x07,

    0xC7, 0x05, 0xC5, 0xC4, 0x04, 0xCC, 0x0C, 0x0D, 0xCD, 0x0F, 0xCF,

    0xCE, 0x0E, 0x0A, 0xCA, 0xCB, 0x0B, 0xC9, 0x09, 0x08, 0xC8, 0xD8,

    0x18, 0x19, 0xD9, 0x1B, 0xDB, 0xDA, 0x1A, 0x1E, 0xDE, 0xDF, 0x1F,

    0xDD, 0x1D, 0x1C, 0xDC, 0x14, 0xD4, 0xD5, 0x15, 0xD7, 0x17, 0x16,

    0xD6, 0xD2, 0x12, 0x13, 0xD3, 0x11, 0xD1, 0xD0, 0x10, 0xF0, 0x30,

    0x31, 0xF1, 0x33, 0xF3, 0xF2, 0x32, 0x36, 0xF6, 0xF7, 0x37, 0xF5, 0x35,

    0x34, 0xF4, 0x3C, 0xFC, 0xFD, 0x3D, 0xFF, 0x3F, 0x3E, 0xFE, 0xFA,

    0x3A, 0x3B, 0xFB, 0x39, 0xF9, 0xF8, 0x38, 0x28, 0xE8, 0xE9, 0x29,

    0xEB, 0x2B, 0x2A, 0xEA, 0xEE, 0x2E, 0x2F, 0xEF, 0x2D, 0xED, 0xEC,

    0x2C, 0xE4, 0x24, 0x25, 0xE5, 0x27, 0xE7, 0xE6, 0x26, 0x22, 0xE2,

    0xE3, 0x23, 0xE1, 0x21, 0x20, 0xE0, 0xA0, 0x60, 0x61, 0xA1, 0x63,

    0xA3, 0xA2, 0x62, 0x66, 0xA6, 0xA7, 0x67, 0xA5, 0x65, 0x64, 0xA4,

    0x6C, 0xAC, 0xAD, 0x6D, 0xAF, 0x6F, 0x6E, 0xAE, 0xAA, 0x6A, 0x6B,

    0xAB, 0x69, 0xA9, 0xA8, 0x68, 0x78, 0xB8, 0xB9, 0x79, 0xBB, 0x7B,

    0x7A, 0xBA, 0xBE, 0x7E, 0x7F, 0xBF, 0x7D, 0xBD, 0xBC, 0x7C, 0xB4,

    0x74, 0x75, 0xB5, 0x77, 0xB7, 0xB6, 0x76, 0x72, 0xB2, 0xB3, 0x73,0xB1, 0x71, 0x70, 0xB0, 0x50, 0x90, 0x91, 0x51, 0x93, 0x53, 0x52, 0x92,

    0x96, 0x56, 0x57, 0x97, 0x55, 0x95, 0x94, 0x54, 0x9C, 0x5C, 0x5D,

    0x9D, 0x5F, 0x9F, 0x9E, 0x5E, 0x5A, 0x9A, 0x9B, 0x5B, 0x99, 0x59,

    0x58, 0x98, 0x88, 0x48, 0x49, 0x89, 0x4B, 0x8B, 0x8A, 0x4A, 0x4E,

    0x8E, 0x8F, 0x4F, 0x8D, 0x4D, 0x4C, 0x8C, 0x44, 0x84, 0x85, 0x45,

    0x87, 0x47, 0x46, 0x86, 0x82, 0x42, 0x43, 0x83, 0x41, 0x81, 0x80, 0x40

    };

  • 8/18/2019 Mi Kro Kontrol Er 2012

    116/126

    98

    uint16_t usRTUCRC(uint8_t *pucDataFrame, uint16_t usDataLength)

    {

    uint8_t ucCRCHi = 0xFF;

    uint8_t ucCRCLo = 0xFF;

    int8_t iIndex;

    while(usDataLength--)

    {

    iIndex = ucCRCLo ̂ *pucDataFrame++;

    ucCRCLo = (uint8_t)(ucCRCHi ^ aucCRCHi[iIndex]);

    ucCRCHi = aucCRCLo[iIndex];

    }

    return (uint16_t)((ucCRCHi

  • 8/18/2019 Mi Kro Kontrol Er 2012

    117/126

    99

    C.10 TEA.c

    /* ----------------------- Dependency includes -----------------------------------------------*/

    #include "tea.h"

    void Encryptor(uint32_t *const ulPlaintext, /*uint32_t *const ulCiphertext,*/

    uint32_t *const Cipherkey)

    {

    register uint32_t MSB = 0, LSB = 0, sum, delta, a = 0, b = 0, c = 0 ,d = 0, n = 32;

    MSB = ulPlaintext[0];

    LSB = ulPlaintext[1];

    sum = 0;

    delta = 0x9E3779B9;

    a = Cipherkey[0], b = Cipherkey[1], c = Cipherkey[2], d = Cipherkey[3];

    while(n-->0)

    {

    sum += delta;

    MSB += (LSB > 5)+b;

    LSB += (MSB > 5)+d;

    }

    ulPlaintext[0] = MSB; ulPlaintext[1] = LSB;

    }

    void Decryptor(/*uint32_t *const ulCiphertext,*/ uint32_t *const ulPlaintext,

    uint32_t *const Cipherkey)

    {

    register uint32_t MSB = ulPlaintext[0], LSB = ulPlaintext[1],

    sum = 0xC6EF3720, delta = 0x9E3779B9,

    a = Cipherkey[0], b = Cipherkey[1], c = Cipherkey[2],

    d = Cipherkey[3], n = 32;

  • 8/18/2019 Mi Kro Kontrol Er 2012

    118/126

    100

    while(n-->0)

    {

    LSB -= ((MSB > 5)+d);

    MSB -= ((LSB > 5)+b);

    sum -= delta;

    }

    ulPlaintext[0] = MSB; ulPlaintext[1] = LSB;

    }

    C.11 Deviceport.h

    #ifndef DEVICEPORT_H_

    #define DEVICEPORT_H_

    /* ----------------------- AVR Platform includes --------------------------------------------*/

    #include

    #include

    /* ----------------------- Defines ---------------------------------------------------------------*/

    #define ENABLE 1

    #define DISABLE 0

    /* ----------------------- AVR ATmega324p platform specifics ---------------------------*/

    #define UDR UDR0#define RXEN (1

  • 8/18/2019 Mi Kro Kontrol Er 2012

    119/126

    101

    C.12 Deviceinit.c

    /* ----------------------- Dependency includes -----------------------------------------------*/

    #include "main.h"

    #include "avrwise.h"

    #include "deviceport.h"

    /* ----------------------- Functions Implementation -----------------------------------------*/

    void Port_Init(void)

    {

    DDRA = 0x78;

    PORTA = 0;

    DDRB = 0xFF;

    PORTB = 0x00;

    DDRC = 0xD1;

    PORTC = 0;

    DDRD |= (1

  • 8/18/2019 Mi Kro Kontrol Er 2012

    120/126

    102

    void Device_Init(void)

    {

    cli();

    Port_Init();

    UART_Init();

    MCUCR = 0;

    sei();

    }

    C.13 Deviceserial.c

    /* ----------------------- Dependency includes -----------------------------------------------*/

    #include "main.h"

    #include "deviceport.h"

    //#include "avrwise.h"

    /* ----------------------- Modbus includes ----------------------------------------------------*/

    #include "modbus.h"

    /* ----------------------- Functions Implementation -----------------------------------------*/

    void vRTUSerialPort(uint8_t RXEnable, uint8_t TXEnable)

    {

    if(RXEnable == 1){

    UCSR0B |= RXEN|RXCIE;

    }

    else

    {

    UCSR0B &= ~(RXEN|RXCIE);

    //UCSR0B |= (0

  • 8/18/2019 Mi Kro Kontrol Er 2012

    121/126

    103

    if(TXEnable == 1)

    {

    UCSR0B |= TXEN|UDRIE;

    }

    else

    {

    UCSR0B &= ~(UDRIE);

    }

    }

    /* Function to receive data from serial port*/

    void vRTUGetChar(uint8_t *pucData)

    {

    *pucData = UDR;

    }

    /* Function to transmit data to serial port */

    void vRTUPutChar(uint8_t ucData)

    {

    UDR = ucData;

    }

  • 8/18/2019 Mi Kro Kontrol Er 2012

    122/126

    104

    C.14 Devicetimer.c

    /* ----------------------- AVR Platform includes --------------------------------------------*/

    #include

    #include

    #include

    /* ----------------------- Dependency includes -----------------------------------------------*/

    #include "main.h"

    /* ----------------------- Modbus includes ----------------------------------------------------*/

    #include "modbus.h"

    /* ----------------------- Defines ---------------------------------------------------------------*/

    #define TIMER_DELAY 5 // In second

    #define TIMER_MS 1000

    #define TIMER_PRESCALER 1024UL

    #define TIMER_CLOCK (F_CPU/TIMER_PRESCALER)

    /* ----------------------- Static variables ------------------------------------------------------*/

    static uint16_t usTimerCount;

    /* ----------------------- Functions Implementation -----------------------------------------*/

    void vTimerInit()

    {

    usTimerCount = (TIMER_CLOCK*TIMER_DELAY/TIMER_MS)-1;

    TCCR1A = 0x00;

    TCCR1B = 0x00;

    TCCR1C = 0x00;

    TIFR1 |= (0

  • 8/18/2019 Mi Kro Kontrol Er 2012

    123/126

    105

    void vTimerEnable()

    {

    TCNT1 = 0x0000;

    /* Enable timer compare interrupt */

    TIMSK1 = (1

  • 8/18/2019 Mi Kro Kontrol Er 2012

    124/126

    106

    C.15 Rtufunccoils.c

    /* ----------------------- AVR Platform includes --------------------------------------------*/

    #include

    #include "deviceport.h"

    /* ----------------------- Modbus includes ----------------------------------------------------*/

    #include "modbus.h"

    /* ----------------------- Defines ---------------------------------------------------------------*/

    #define RTU_PDU_FREAD_ADDR_OFF RTU_SER_PDU_DATA_OFF

    #define RTU_PDU_FREAD_COIL_OFF RTU_SER_PDU_DATA_OFF+2

    #define RTU_PDU_FREAD_SIZE 4

    #define RTU_PDU_FREAD_COIL_MAX 0xFF

    #define RTU_PDU_FWRITE_ADDR_OFF RTU_SER_PDU_DATA_OFF

    #define RTU_PDU_FWRITE_VAL_OFF RTU_SER_PDU_DATA_OFF+2

    #define RTU_PDU_FWRITE_SIZE 4

    /* ----------------------- Static variables ------------------------------------------------------*/

    static volatile uint8_t ucCoilAddress[6];

    /* ----------------------- Functions Implementation -----------------------------------------*/

    eRTUException eRTUReadCoil(uint8_t *pucDataFrame, uint16_t *pusDataLength)

    {

    uint16_t usRegisterAddress;uint16_t usCoilIndex;

    uint8_t ucData;

    uint8_t *pucFrameBuffer;

    eRTUException eXStatus = RTU_EX_NONE;

  • 8/18/2019 Mi Kro Kontrol Er 2012

    125/126

    107

    if(*pusDataLength == (RTU_PDU_FREAD_SIZE + RTU_PDU_SIZE_MIN))

    {

    /* Get target address */

    usRegisterAddress =

    (uint16_t)(pucDataFrame[RTU_PDU_FREAD_ADDR_OFF]

  • 8/18/2019 Mi Kro Kontrol Er 2012

    126/126

    108

    }

    else

    {

    /* Set exception status for invalid data */

    eXStatus = RTU_EX_ILLEGAL_DATA_VALUE;

    }

    return eXStatus;

    }

    /*eRTUException eRTUWriteCoil(uint8_t *pucDataFrame, uint16_t

    *pusDataLength)

    {

    uint16_t usRegisterAddress;

    uint8_t ucBuffer[2];

    //conditional branch if required

    usRegisterAddress =

    (pucDataFrame[RTU_PDU_FWRITE_ADDR_OFF]