oprogesp

1
2 4 6 8 1 3 5 7 10 9 CONN11 2 4 6 8 1 3 5 7 10 9 CONN12 VSS1 1 2 3 4 5 6 7 8 9 11 12 13 14 15 16 17 18 DIP20 10 19 20 U11 1 2 3 4 5 6 7 8 DIP8 U12 VDD1 VPP1 PGM1 VDD1 VSS1 2 4 6 8 1 3 5 7 10 9 CONN61 2 4 6 8 1 3 5 7 10 9 CONN62 1 2 3 4 5 6 7 8 9 25 26 27 28 15 16 17 18 DIP28N 10 19 20 11 12 13 14 21 22 23 24 U62 1 2 3 4 5 6 7 8 9 25 26 27 28 15 16 17 18 DIP40 10 19 20 11 12 13 14 21 22 23 24 33 34 35 36 29 30 31 32 37 38 39 40 U64 VPP6 VPP6 VSS6 VDD6 I2C 3 2 4 1 CONN13 CK1 SO1 SI1 2 4 1 3 5 CONN14 VPP1 VDD1 2 4 1 3 5 CONN63 VPP6 VDD6 VSS6 D6 CK6 I2C/SPI ICSP ICSP LV 2 4 6 8 1 3 5 7 10 9 CONN31 2 4 6 8 1 3 5 7 10 9 CONN32 3 2 4 1 CONN33 I2C/SPI 1 2 3 4 5 6 7 8 9 25 26 27 28 15 16 17 18 DIP40 10 19 20 11 12 13 14 21 22 23 24 33 34 35 36 29 30 31 32 37 38 39 40 U31 VDD3 X1 VSS3 VSS3 MOSI MISO SCK RESET VSS3 MISO MOSI SCK PIC24-30-33-LVICSP PIC-ICSP + I2C ATMEL-I2C VSS1 VSS1 VSS1 VSS1 VDD1 VDD1 VPP1 C101 100n CKP1 SO1 CK1 MOSI MISO SCK RESET VSS6 D6 CK6 CK6 D6 C161 100n VDD6in PGM1 CKP1 D1 CKP1 D1 CKP1 D1 C131 100n VDD3 D1 2 4 6 8 1 3 5 7 10 9 CONN51 2 4 6 8 1 3 5 7 10 9 CONN52 VSS5 1 2 3 4 5 6 7 8 DIP8 U51 VDD5 RC6-5 1 2 3 4 5 6 7 8 DIP8 U52 1 2 3 4 5 6 7 8 DIP8 U53 3 2 4 1 CONN53 CK5 SO5 SI5 R152 TBD R153 TBD VSS5 VSS5 VSS5 VSS5 VDD5 VDD5 VDD5 VDD5 VPP5 C151 100n SO5 SI5 CK5 CK5 SI5 SO5 SO5 CK5 I2C SPI uW I2C/SPI I2C SPI uW X1 X1 CK5 SO5 SI5 RC6-5 RC6-5 1 2 3 4 5 6 7 8 9 25 26 27 28 15 16 17 18 DIP28N 10 19 20 11 12 13 14 21 22 23 24 U32 VDD3 VSS3 X1 VSS3 VDD3 RESET VDD3 VSS3 VSS3 VDD3 SCK MISO MOSI X1 1 2 3 4 5 6 7 14 13 12 11 10 9 8 DIP14 U34 TCK TMS TDO TDI 1 2 3 4 5 6 7 8 9 11 12 13 14 15 16 17 18 DIP20 10 19 20 U33 1 2 3 4 5 6 7 8 DIP8 U35 MOSI MISO SCK VDD3 VSS3 X1 RESET VSS3 VDD3 SCK MISO MOSI VDD3 X1 VSS3 VPP3 VPP3 VPP3 VDD3 VDD3 VSS3 VSS3 VSS3 VSS3 VSS3 SCK MISO MOSI SCK MISO MOSI RESET RESET 2 4 6 8 1 3 5 7 10 9 CONN21 2 4 6 8 1 3 5 7 10 9 CONN22 1 2 3 4 5 6 7 8 9 25 26 27 28 15 16 17 18 DIP28N 10 19 20 11 12 13 14 21 22 23 24 U22 1 2 3 4 5 6 7 8 9 25 26 27 28 15 16 17 18 DIP40 10 19 20 11 12 13 14 21 22 23 24 33 34 35 36 29 30 31 32 37 38 39 40 U21 VPP2 VPP2 VPP2 D2 CK2 PGM2 PGM2 VSS2 VSS2 VDD2 2 4 1 3 5 CONN23 VPP2 VDD2 VSS2 D2 CK2 VSS2 VSS2 VDD2 VDD2 VSS2 D2 CK2 PGM2 CK2 D2 C121 100n VDD2 ICSP PIC-ICSP VDD6 VSS6 R161 1k R162 1k D161 D162 VDD6 VSS6 VDD6 VDD6in 1 GND 2 OUT 3 VCC LD1086V33 U63 VSS6 CK6 D6 VPP6 VSS6 C162 10u VSS6 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 DIP18 U61 VPP6 CK6 D6 C163 10u VSS6 VDD6 VSS6 1 2 3 4 5 6 7 8 9 25 26 27 28 15 16 17 18 DIP28N 10 19 20 11 12 13 14 21 22 23 24 U65 VPP6 VDD6in VSS6 VSS6 VSS6 VSS6 VSS6 VSS6 VSS6 only for layout reasons VDD6 VSS6 only for layout reasons only for layout reasons VSS6 R163 10k 2 4 6 8 1 3 5 7 10 9 CONN71 2 4 6 8 1 3 5 7 10 9 CONN72 1 2 3 4 5 6 7 8 9 25 26 27 28 15 16 17 18 DIP28N 10 19 20 11 12 13 14 21 22 23 24 U72 1 2 3 4 5 6 7 8 9 25 26 27 28 15 16 17 18 DIP40 10 19 20 11 12 13 14 21 22 23 24 33 34 35 36 29 30 31 32 37 38 39 40 U73 VPP7 VPP7 VSS7 VDD7 2 4 1 3 5 CONN73 VPP7 VDD7 VSS7 D7 CK7 VSS7 CK7 D7 C171 100n VDD7in R171 1k R172 1k D171 D172 VDD7 VDD7 VDD7in 1 GND 2 OUT 3 VCC LD1086V33 U74 VSS7 C172 10u R173 1k ICSP LV PIC1xxx-18FJ-LVICSP VDD7 VSS7 VPP7 VSS7 VDD7 D7 CK7 VSS7 Vcore D7 CK7 D7 CK7 VPP7 D7 CK7 VDD7 VSS7 VDD7 VSS7 1 2 3 4 5 6 7 8 9 11 12 13 14 15 16 17 18 DIP20 10 19 20 U71 VDD7 Vcore Vcore D173 2 1 J1 VDD7 Vcore supply for 18LFxxJxx devices VSS7 only for layout reasons D6 CK6 CK6_5V D6_5V CK6_5V D6_5V CK6_5V D6_5V VDD6in VDD6in VDD6in VDD6in VDD6in VDD6in VDD6in CK6_5V D6_5V CK6_5V D6_5V

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Page 1: OprogEsp

2

4

6

8

1

3

5

7

10

9

CONN11

2

4

6

8

1

3

5

7

10

9

CONN12

VSS1

1

2

3

4

5

6

7

8

9

11

12

13

14

15

16

17

18

DIP20

10

19

20U11

1

2

3

4 5

6

7

8

DIP8

U12

VDD1

VPP1

PGM1VDD1

VSS1

2

4

6

8

1

3

5

7

10

9

CONN61

2

4

6

8

1

3

5

7

10

9

CONN621

2

3

4

5

6

7

8

9

25

26

27

28

15

16

17

18

DIP28N

10 19

20

11

12

13

14

21

22

23

24

U62

1

2

3

4

5

6

7

8

9

25

26

27

28

15

16

17

18

DIP4010

19

20

11

12

13

14

21

22

23

24

33

34

35

36

29

30

31

32

37

38

39

40U64

VPP6

VPP6

VSS6

VDD6

I2C

3

2

4

1

CONN13

CK1

SO1

SI1

2

4

1

3

5

CONN14

VPP1

VDD1

2

4

1

3

5

CONN63

VPP6

VDD6

VSS6

D6

CK6

I2C/SPI

ICSP

ICSP LV

2

4

6

8

1

3

5

7

10

9

CONN31

2

4

6

8

1

3

5

7

10

9

CONN32

3

2

4

1

CONN33I2C/SPI

1

2

3

4

5

6

7

8

9

25

26

27

28

15

16

17

18

DIP4010

19

20

11

12

13

14

21

22

23

24

33

34

35

36

29

30

31

32

37

38

39

40U31

VDD3

X1

VSS3

VSS3

MOSI

MISO

SCK

RESET

VSS3

MISO

MOSI

SCK

PIC24−30−33−LVICSP

PIC−ICSP + I2C

ATMEL−I2C

VSS1

VSS1

VSS1

VSS1

VDD1

VDD1

VPP1C101

100n

CKP1

SO1

CK1

MOSI

MISO

SCK

RESET

VSS6

D6

CK6

CK6

D6

C161

100n

VDD6in

PGM1

CKP1

D1

CKP1

D1

CKP1

D1

C131

100n

VDD3

D1

2

4

6

8

1

3

5

7

10

9

CONN51

2

4

6

8

1

3

5

7

10

9

CONN52

VSS5

1

2

3

4 5

6

7

8

DIP8

U51

VDD5

RC6−5

1

2

3

4 5

6

7

8

DIP8

U52

1

2

3

4 5

6

7

8

DIP8

U53

3

2

4

1

CONN53

CK5

SO5

SI5

R152

TBD

R153TBD

VSS5

VSS5

VSS5

VSS5

VDD5

VDD5

VDD5

VDD5

VPP5C151

100n

SO5

SI5

CK5

CK5

SI5

SO5

SO5

CK5

I2C

SPI

uW

I2C/SPI

I2C SPI uW

X1X1

CK5

SO5

SI5

RC6−5

RC6−5

1

2

3

4

5

6

7

8

9

25

26

27

28

15

16

17

18

DIP28N

10 19

20

11

12

13

14

21

22

23

24

U32

VDD3

VSS3

X1

VSS3

VDD3

RESET

VDD3

VSS3

VSS3

VDD3

SCK

MISO

MOSI

X1

1

2

3

4

5

6

7

14

13

12

11

10

9

8

DIP14

U34

TCK

TMS

TDO

TDI

1

2

3

4

5

6

7

8

9

11

12

13

14

15

16

17

18

DIP20

10

19

20U33

1

2

3

4 5

6

7

8

DIP8

U35

MOSI

MISO

SCK

VDD3

VSS3

X1

RESET

VSS3

VDD3

SCK

MISO

MOSI

VDD3

X1

VSS3

VPP3

VPP3

VPP3

VDD3VDD3 VSS3

VSS3

VSS3

VSS3

VSS3

SCK

MISO

MOSI

SCK

MISOMOSI

RESETRESET

2

4

6

8

1

3

5

7

10

9

CONN21

2

4

6

8

1

3

5

7

10

9

CONN221

2

3

4

5

6

7

8

9

25

26

27

28

15

16

17

18

DIP28N

10 19

20

11

12

13

14

21

22

23

24

U22

1

2

3

4

5

6

7

8

9

25

26

27

28

15

16

17

18

DIP4010

19

20

11

12

13

14

21

22

23

24

33

34

35

36

29

30

31

32

37

38

39

40U21

VPP2

VPP2

VPP2 D2

CK2

PGM2

PGM2

VSS2

VSS2

VDD2

2

4

1

3

5

CONN23

VPP2

VDD2

VSS2

D2

CK2

VSS2

VSS2

VDD2

VDD2

VSS2

D2

CK2PGM2

CK2

D2

C121

100n

VDD2

ICSP

PIC−ICSP

VDD6

VSS6

R1611k

R1621k

D161

D162

VDD6

VSS6

VDD6 VDD6in

1

GND

2 OUT 3VCC

LD1086V33

U63

VSS6

CK6

D6VPP6

VSS6

C162 10uVSS6

1

2

3

4

5

6

7

8

9 10

11

12

13

14

15

16

17

18

DIP18

U61

VPP6

CK6

D6

C163 10uVSS6

VDD6

VSS6

1

2

3

4

5

6

7

8

9

25

26

27

28

15

16

17

18

DIP28N

10 19

20

11

12

13

14

21

22

23

24

U65VPP6 VDD6in

VSS6

VSS6

VSS6

VSS6

VSS6

VSS6

VSS6

only for layout reasons

VDD6

VSS6

only for layout reasons

only for layout reasons

VSS6

R16310k

2

4

6

8

1

3

5

7

10

9

CONN71

2

4

6

8

1

3

5

7

10

9

CONN721

2

3

4

5

6

7

8

9

25

26

27

28

15

16

17

18

DIP28N

10 19

20

11

12

13

14

21

22

23

24

U72

1

2

3

4

5

6

7

8

9

25

26

27

28

15

16

17

18

DIP4010

19

20

11

12

13

14

21

22

23

24

33

34

35

36

29

30

31

32

37

38

39

40U73

VPP7

VPP7

VSS7

VDD7

2

4

1

3

5

CONN73

VPP7

VDD7

VSS7

D7

CK7

VSS7

CK7

D7

C171

100n

VDD7in

R1711k

R1721k

D171

D172

VDD7

VDD7 VDD7in

1

GND

2 OUT 3VCC

LD1086V33

U74

VSS7

C172 10uR1731k

ICSP LV

PIC1xxx−18FJ−LVICSP

VDD7 VSS7

VPP7

VSS7 VDD7

D7

CK7

VSS7

Vcore

D7

CK7

D7

CK7

VPP7 D7

CK7

VDD7

VSS7

VDD7

VSS7

1

2

3

4

5

6

7

8

9

11

12

13

14

15

16

17

18

DIP20

10

19

20U71

VDD7

Vcore

Vcore

D173

2

1

J1

VDD7Vcore supply for18LFxxJxx devices

VSS7

only for layout reasons

D6

CK6CK6_5V

D6_5V

CK6_5V

D6_5V

CK6_5V

D6_5V

VDD6in

VDD6in

VDD6in

VDD6in

VDD6in

VDD6in

VDD6in

CK6_5V

D6_5V

CK6_5V

D6_5V